1 files changed, 44 insertions, 31 deletions

diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index bc3f30db8d9a..457f9f95204b 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  *
  * The code contained herein is licensed under the GNU General Public
  * License.  You may obtain a copy of the GNU General Public License
@@ -23,33 +23,21 @@
 /*
  * Define the MX51 memory map.
  */
-static struct map_desc mxc_io_desc[] __initdata = {
-        {
-                .virtual = MX51_IRAM_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(MX51_IRAM_BASE_ADDR),
-                .length = MX51_IRAM_SIZE,
-                .type = MT_DEVICE
-        }, {
-                .virtual = MX51_DEBUG_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR),
-                .length = MX51_DEBUG_SIZE,
-                .type = MT_DEVICE
-        }, {
-                .virtual = MX51_AIPS1_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
-                .length = MX51_AIPS1_SIZE,
-                .type = MT_DEVICE
-        }, {
-                .virtual = MX51_SPBA0_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(MX51_SPBA0_BASE_ADDR),
-                .length = MX51_SPBA0_SIZE,
-                .type = MT_DEVICE
-        }, {
-                .virtual = MX51_AIPS2_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR),
-                .length = MX51_AIPS2_SIZE,
-                .type = MT_DEVICE
-        },
+static struct map_desc mx51_io_desc[] __initdata = {
+        imx_map_entry(MX51, IRAM, MT_DEVICE),
+        imx_map_entry(MX51, DEBUG, MT_DEVICE),
+        imx_map_entry(MX51, AIPS1, MT_DEVICE),
+        imx_map_entry(MX51, SPBA0, MT_DEVICE),
+        imx_map_entry(MX51, AIPS2, MT_DEVICE),
+};
+
+/*
+ * Define the MX53 memory map.
+ */
+static struct map_desc mx53_io_desc[] __initdata = {
+        imx_map_entry(MX53, AIPS1, MT_DEVICE),
+        imx_map_entry(MX53, SPBA0, MT_DEVICE),
+        imx_map_entry(MX53, AIPS2, MT_DEVICE),
 };
 
 /*
@@ -61,8 +49,16 @@ void __init mx51_map_io(void)
 {
         mxc_set_cpu_type(MXC_CPU_MX51);
         mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
-        mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR));
-        iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
+        mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
+        iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
+}
+
+void __init mx53_map_io(void)
+{
+        mxc_set_cpu_type(MXC_CPU_MX53);
+        mxc_iomux_v3_init(MX53_IO_ADDRESS(MX53_IOMUXC_BASE_ADDR));
+        mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG_BASE_ADDR));
+        iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
 }
 
 int imx51_register_gpios(void);
@@ -72,7 +68,7 @@ void __init mx51_init_irq(void)
         unsigned long tzic_addr;
         void __iomem *tzic_virt;
 
-        if (mx51_revision() < MX51_CHIP_REV_2_0)
+        if (mx51_revision() < IMX_CHIP_REVISION_2_0)
                 tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
         else
                 tzic_addr = MX51_TZIC_BASE_ADDR;
@@ -84,3 +80,20 @@ void __init mx51_init_irq(void)
         tzic_init_irq(tzic_virt);
         imx51_register_gpios();
 }
+
+int imx53_register_gpios(void);
+
+void __init mx53_init_irq(void)
+{
+        unsigned long tzic_addr;
+        void __iomem *tzic_virt;
+
+        tzic_addr = MX53_TZIC_BASE_ADDR;
+
+        tzic_virt = ioremap(tzic_addr, SZ_16K);
+        if (!tzic_virt)
+                panic("unable to map TZIC interrupt controller\n");
+
+        tzic_init_irq(tzic_virt);
+        imx53_register_gpios();
+}