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Diffstat (limited to 'arch/arm/mach-mx5/mm.c')
-rw-r--r--arch/arm/mach-mx5/mm.c25
1 files changed, 19 insertions, 6 deletions
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index ff557301b42b..800bb8b21081 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -69,8 +69,6 @@ void __init imx53_init_early(void)
69 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR)); 69 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR));
70} 70}
71 71
72int imx51_register_gpios(void);
73
74void __init mx51_init_irq(void) 72void __init mx51_init_irq(void)
75{ 73{
76 unsigned long tzic_addr; 74 unsigned long tzic_addr;
@@ -86,11 +84,8 @@ void __init mx51_init_irq(void)
86 panic("unable to map TZIC interrupt controller\n"); 84 panic("unable to map TZIC interrupt controller\n");
87 85
88 tzic_init_irq(tzic_virt); 86 tzic_init_irq(tzic_virt);
89 imx51_register_gpios();
90} 87}
91 88
92int imx53_register_gpios(void);
93
94void __init mx53_init_irq(void) 89void __init mx53_init_irq(void)
95{ 90{
96 unsigned long tzic_addr; 91 unsigned long tzic_addr;
@@ -103,5 +98,23 @@ void __init mx53_init_irq(void)
103 panic("unable to map TZIC interrupt controller\n"); 98 panic("unable to map TZIC interrupt controller\n");
104 99
105 tzic_init_irq(tzic_virt); 100 tzic_init_irq(tzic_virt);
106 imx53_register_gpios(); 101}
102
103void __init imx51_soc_init(void)
104{
105 mxc_register_gpio(0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH);
106 mxc_register_gpio(1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH);
107 mxc_register_gpio(2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH);
108 mxc_register_gpio(3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH);
109}
110
111void __init imx53_soc_init(void)
112{
113 mxc_register_gpio(0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH);
114 mxc_register_gpio(1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH);
115 mxc_register_gpio(2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH);
116 mxc_register_gpio(3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH);
117 mxc_register_gpio(4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH);
118 mxc_register_gpio(5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);
119 mxc_register_gpio(6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);
107} 120}