diff options
Diffstat (limited to 'arch/arm/mach-mx5/cpu.c')
-rw-r--r-- | arch/arm/mach-mx5/cpu.c | 43 |
1 files changed, 25 insertions, 18 deletions
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c index 061ab701b6d9..8c9a29e322dc 100644 --- a/arch/arm/mach-mx5/cpu.c +++ b/arch/arm/mach-mx5/cpu.c | |||
@@ -97,24 +97,31 @@ static int __init post_cpu_init(void) | |||
97 | unsigned int reg; | 97 | unsigned int reg; |
98 | void __iomem *base; | 98 | void __iomem *base; |
99 | 99 | ||
100 | if (!cpu_is_mx51()) | 100 | if (cpu_is_mx51() || cpu_is_mx53()) { |
101 | return 0; | 101 | if (cpu_is_mx51()) |
102 | 102 | base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR); | |
103 | base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR); | 103 | else |
104 | __raw_writel(0x0, base + 0x40); | 104 | base = MX53_IO_ADDRESS(MX53_AIPS1_BASE_ADDR); |
105 | __raw_writel(0x0, base + 0x44); | 105 | |
106 | __raw_writel(0x0, base + 0x48); | 106 | __raw_writel(0x0, base + 0x40); |
107 | __raw_writel(0x0, base + 0x4C); | 107 | __raw_writel(0x0, base + 0x44); |
108 | reg = __raw_readl(base + 0x50) & 0x00FFFFFF; | 108 | __raw_writel(0x0, base + 0x48); |
109 | __raw_writel(reg, base + 0x50); | 109 | __raw_writel(0x0, base + 0x4C); |
110 | 110 | reg = __raw_readl(base + 0x50) & 0x00FFFFFF; | |
111 | base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR); | 111 | __raw_writel(reg, base + 0x50); |
112 | __raw_writel(0x0, base + 0x40); | 112 | |
113 | __raw_writel(0x0, base + 0x44); | 113 | if (cpu_is_mx51()) |
114 | __raw_writel(0x0, base + 0x48); | 114 | base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR); |
115 | __raw_writel(0x0, base + 0x4C); | 115 | else |
116 | reg = __raw_readl(base + 0x50) & 0x00FFFFFF; | 116 | base = MX53_IO_ADDRESS(MX53_AIPS2_BASE_ADDR); |
117 | __raw_writel(reg, base + 0x50); | 117 | |
118 | __raw_writel(0x0, base + 0x40); | ||
119 | __raw_writel(0x0, base + 0x44); | ||
120 | __raw_writel(0x0, base + 0x48); | ||
121 | __raw_writel(0x0, base + 0x4C); | ||
122 | reg = __raw_readl(base + 0x50) & 0x00FFFFFF; | ||
123 | __raw_writel(reg, base + 0x50); | ||
124 | } | ||
118 | 125 | ||
119 | return 0; | 126 | return 0; |
120 | } | 127 | } |