diff options
Diffstat (limited to 'arch/arm/mach-mx5/clock-mx51-mx53.c')
-rw-r--r-- | arch/arm/mach-mx5/clock-mx51-mx53.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index ca4f9d58cfeb..344ee8ef1eef 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c | |||
@@ -780,6 +780,12 @@ static struct clk ahb_clk = { | |||
780 | .round_rate = _clk_ahb_round_rate, | 780 | .round_rate = _clk_ahb_round_rate, |
781 | }; | 781 | }; |
782 | 782 | ||
783 | static struct clk iim_clk = { | ||
784 | .parent = &ipg_clk, | ||
785 | .enable_reg = MXC_CCM_CCGR0, | ||
786 | .enable_shift = MXC_CCM_CCGRx_CG15_OFFSET, | ||
787 | }; | ||
788 | |||
783 | /* Main IP interface clock for access to registers */ | 789 | /* Main IP interface clock for access to registers */ |
784 | static struct clk ipg_clk = { | 790 | static struct clk ipg_clk = { |
785 | .parent = &ahb_clk, | 791 | .parent = &ahb_clk, |
@@ -1099,6 +1105,7 @@ static struct clk_lookup mx51_lookups[] = { | |||
1099 | _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) | 1105 | _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) |
1100 | _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk) | 1106 | _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk) |
1101 | _REGISTER_CLOCK(NULL, "cpu_clk", cpu_clk) | 1107 | _REGISTER_CLOCK(NULL, "cpu_clk", cpu_clk) |
1108 | _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) | ||
1102 | }; | 1109 | }; |
1103 | 1110 | ||
1104 | static struct clk_lookup mx53_lookups[] = { | 1111 | static struct clk_lookup mx53_lookups[] = { |
@@ -1107,6 +1114,7 @@ static struct clk_lookup mx53_lookups[] = { | |||
1107 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) | 1114 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) |
1108 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) | 1115 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) |
1109 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) | 1116 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) |
1117 | _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) | ||
1110 | }; | 1118 | }; |
1111 | 1119 | ||
1112 | static void clk_tree_init(void) | 1120 | static void clk_tree_init(void) |
@@ -1147,6 +1155,10 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, | |||
1147 | clk_enable(&cpu_clk); | 1155 | clk_enable(&cpu_clk); |
1148 | clk_enable(&main_bus_clk); | 1156 | clk_enable(&main_bus_clk); |
1149 | 1157 | ||
1158 | clk_enable(&iim_clk); | ||
1159 | mx51_revision(); | ||
1160 | clk_disable(&iim_clk); | ||
1161 | |||
1150 | /* set the usboh3_clk parent to pll2_sw_clk */ | 1162 | /* set the usboh3_clk parent to pll2_sw_clk */ |
1151 | clk_set_parent(&usboh3_clk, &pll2_sw_clk); | 1163 | clk_set_parent(&usboh3_clk, &pll2_sw_clk); |
1152 | 1164 | ||
@@ -1182,6 +1194,10 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc, | |||
1182 | clk_enable(&cpu_clk); | 1194 | clk_enable(&cpu_clk); |
1183 | clk_enable(&main_bus_clk); | 1195 | clk_enable(&main_bus_clk); |
1184 | 1196 | ||
1197 | clk_enable(&iim_clk); | ||
1198 | mx53_revision(); | ||
1199 | clk_disable(&iim_clk); | ||
1200 | |||
1185 | /* System timer */ | 1201 | /* System timer */ |
1186 | mxc_timer_init(&gpt_clk, MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR), | 1202 | mxc_timer_init(&gpt_clk, MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR), |
1187 | MX53_INT_GPT); | 1203 | MX53_INT_GPT); |