diff options
Diffstat (limited to 'arch/arm/mach-mx5/board-cpuimx51.c')
-rw-r--r-- | arch/arm/mach-mx5/board-cpuimx51.c | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c index 4efa02ee1639..7fbfd0636a35 100644 --- a/arch/arm/mach-mx5/board-cpuimx51.c +++ b/arch/arm/mach-mx5/board-cpuimx51.c | |||
@@ -43,10 +43,6 @@ | |||
43 | #define CPUIMX51_QUARTB_GPIO IMX_GPIO_NR(3, 25) | 43 | #define CPUIMX51_QUARTB_GPIO IMX_GPIO_NR(3, 25) |
44 | #define CPUIMX51_QUARTC_GPIO IMX_GPIO_NR(3, 26) | 44 | #define CPUIMX51_QUARTC_GPIO IMX_GPIO_NR(3, 26) |
45 | #define CPUIMX51_QUARTD_GPIO IMX_GPIO_NR(3, 27) | 45 | #define CPUIMX51_QUARTD_GPIO IMX_GPIO_NR(3, 27) |
46 | #define CPUIMX51_QUARTA_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTA_GPIO) | ||
47 | #define CPUIMX51_QUARTB_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTB_GPIO) | ||
48 | #define CPUIMX51_QUARTC_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTC_GPIO) | ||
49 | #define CPUIMX51_QUARTD_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTD_GPIO) | ||
50 | #define CPUIMX51_QUART_XTAL 14745600 | 46 | #define CPUIMX51_QUART_XTAL 14745600 |
51 | #define CPUIMX51_QUART_REGSHIFT 17 | 47 | #define CPUIMX51_QUART_REGSHIFT 17 |
52 | 48 | ||
@@ -61,7 +57,7 @@ | |||
61 | static struct plat_serial8250_port serial_platform_data[] = { | 57 | static struct plat_serial8250_port serial_platform_data[] = { |
62 | { | 58 | { |
63 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000), | 59 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000), |
64 | .irq = CPUIMX51_QUARTA_IRQ, | 60 | .irq = gpio_to_irq(CPUIMX51_QUARTA_GPIO), |
65 | .irqflags = IRQF_TRIGGER_HIGH, | 61 | .irqflags = IRQF_TRIGGER_HIGH, |
66 | .uartclk = CPUIMX51_QUART_XTAL, | 62 | .uartclk = CPUIMX51_QUART_XTAL, |
67 | .regshift = CPUIMX51_QUART_REGSHIFT, | 63 | .regshift = CPUIMX51_QUART_REGSHIFT, |
@@ -69,7 +65,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
69 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, | 65 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, |
70 | }, { | 66 | }, { |
71 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000), | 67 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000), |
72 | .irq = CPUIMX51_QUARTB_IRQ, | 68 | .irq = gpio_to_irq(CPUIMX51_QUARTB_GPIO), |
73 | .irqflags = IRQF_TRIGGER_HIGH, | 69 | .irqflags = IRQF_TRIGGER_HIGH, |
74 | .uartclk = CPUIMX51_QUART_XTAL, | 70 | .uartclk = CPUIMX51_QUART_XTAL, |
75 | .regshift = CPUIMX51_QUART_REGSHIFT, | 71 | .regshift = CPUIMX51_QUART_REGSHIFT, |
@@ -77,7 +73,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
77 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, | 73 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, |
78 | }, { | 74 | }, { |
79 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000), | 75 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000), |
80 | .irq = CPUIMX51_QUARTC_IRQ, | 76 | .irq = gpio_to_irq(CPUIMX51_QUARTC_GPIO), |
81 | .irqflags = IRQF_TRIGGER_HIGH, | 77 | .irqflags = IRQF_TRIGGER_HIGH, |
82 | .uartclk = CPUIMX51_QUART_XTAL, | 78 | .uartclk = CPUIMX51_QUART_XTAL, |
83 | .regshift = CPUIMX51_QUART_REGSHIFT, | 79 | .regshift = CPUIMX51_QUART_REGSHIFT, |
@@ -85,7 +81,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
85 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, | 81 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, |
86 | }, { | 82 | }, { |
87 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000), | 83 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000), |
88 | .irq = CPUIMX51_QUARTD_IRQ, | 84 | .irq = irq_to_gpio(CPUIMX51_QUARTD_GPIO), |
89 | .irqflags = IRQF_TRIGGER_HIGH, | 85 | .irqflags = IRQF_TRIGGER_HIGH, |
90 | .uartclk = CPUIMX51_QUART_XTAL, | 86 | .uartclk = CPUIMX51_QUART_XTAL, |
91 | .regshift = CPUIMX51_QUART_REGSHIFT, | 87 | .regshift = CPUIMX51_QUART_REGSHIFT, |