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-rw-r--r--arch/arm/mach-mx3/Kconfig11
-rw-r--r--arch/arm/mach-mx3/Makefile1
-rw-r--r--arch/arm/mach-mx3/clock-imx31.c10
-rw-r--r--arch/arm/mach-mx3/clock-imx35.c28
-rw-r--r--arch/arm/mach-mx3/cpu.c47
-rw-r--r--arch/arm/mach-mx3/devices-imx31.h49
-rw-r--r--arch/arm/mach-mx3/devices-imx35.h48
-rw-r--r--arch/arm/mach-mx3/devices.c63
-rw-r--r--arch/arm/mach-mx3/devices.h4
-rw-r--r--arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c59
-rw-r--r--arch/arm/mach-mx3/mach-armadillo5x0.c2
-rw-r--r--arch/arm/mach-mx3/mach-cpuimx35.c54
-rw-r--r--arch/arm/mach-mx3/mach-kzm_arm11_01.c2
-rw-r--r--arch/arm/mach-mx3/mach-mx31_3ds.c2
-rw-r--r--arch/arm/mach-mx3/mach-mx31ads.c11
-rw-r--r--arch/arm/mach-mx3/mach-mx31lilly.c2
-rw-r--r--arch/arm/mach-mx3/mach-mx31lite.c2
-rw-r--r--arch/arm/mach-mx3/mach-mx31moboard.c2
-rw-r--r--arch/arm/mach-mx3/mach-mx35_3ds.c53
-rw-r--r--arch/arm/mach-mx3/mach-pcm037.c2
-rw-r--r--arch/arm/mach-mx3/mach-pcm037_eet.c3
-rw-r--r--arch/arm/mach-mx3/mach-pcm043.c17
-rw-r--r--arch/arm/mach-mx3/mach-qong.c2
-rw-r--r--arch/arm/mach-mx3/mm.c18
24 files changed, 272 insertions, 220 deletions
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index 85beece802aa..096fd33f8ab9 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -9,6 +9,7 @@ config ARCH_MX35
9 bool 9 bool
10 select ARCH_MXC_IOMUX_V3 10 select ARCH_MXC_IOMUX_V3
11 select ARCH_MXC_AUDMUX_V2 11 select ARCH_MXC_AUDMUX_V2
12 select HAVE_EPIT
12 13
13comment "MX3 platforms:" 14comment "MX3 platforms:"
14 15
@@ -16,6 +17,7 @@ config MACH_MX31ADS
16 bool "Support MX31ADS platforms" 17 bool "Support MX31ADS platforms"
17 select ARCH_MX31 18 select ARCH_MX31
18 select IMX_HAVE_PLATFORM_IMX_I2C 19 select IMX_HAVE_PLATFORM_IMX_I2C
20 select IMX_HAVE_PLATFORM_IMX_SSI
19 select IMX_HAVE_PLATFORM_IMX_UART 21 select IMX_HAVE_PLATFORM_IMX_UART
20 default y 22 default y
21 help 23 help
@@ -117,9 +119,11 @@ config MACH_PCM043
117 bool "Support Phytec pcm043 (i.MX35) platforms" 119 bool "Support Phytec pcm043 (i.MX35) platforms"
118 select ARCH_MX35 120 select ARCH_MX35
119 select IMX_HAVE_PLATFORM_IMX_I2C 121 select IMX_HAVE_PLATFORM_IMX_I2C
122 select IMX_HAVE_PLATFORM_IMX_SSI
120 select IMX_HAVE_PLATFORM_IMX_UART 123 select IMX_HAVE_PLATFORM_IMX_UART
121 select IMX_HAVE_PLATFORM_MXC_NAND 124 select IMX_HAVE_PLATFORM_MXC_NAND
122 select IMX_HAVE_PLATFORM_FLEXCAN 125 select IMX_HAVE_PLATFORM_FLEXCAN
126 select IMX_HAVE_PLATFORM_ESDHC
123 select MXC_ULPI if USB_ULPI 127 select MXC_ULPI if USB_ULPI
124 help 128 help
125 Include support for Phytec pcm043 platform. This includes 129 Include support for Phytec pcm043 platform. This includes
@@ -140,6 +144,7 @@ config MACH_MX35_3DS
140 bool "Support MX35PDK platform" 144 bool "Support MX35PDK platform"
141 select ARCH_MX35 145 select ARCH_MX35
142 select IMX_HAVE_PLATFORM_IMX_UART 146 select IMX_HAVE_PLATFORM_IMX_UART
147 select IMX_HAVE_PLATFORM_MXC_NAND
143 default n 148 default n
144 help 149 help
145 Include support for MX35PDK platform. This includes specific 150 Include support for MX35PDK platform. This includes specific
@@ -159,6 +164,8 @@ config MACH_EUKREA_CPUIMX35
159 select IMX_HAVE_PLATFORM_IMX_UART 164 select IMX_HAVE_PLATFORM_IMX_UART
160 select IMX_HAVE_PLATFORM_IMX_I2C 165 select IMX_HAVE_PLATFORM_IMX_I2C
161 select IMX_HAVE_PLATFORM_MXC_NAND 166 select IMX_HAVE_PLATFORM_MXC_NAND
167 select IMX_HAVE_PLATFORM_FLEXCAN
168 select IMX_HAVE_PLATFORM_ESDHC
162 select MXC_ULPI if USB_ULPI 169 select MXC_ULPI if USB_ULPI
163 help 170 help
164 Include support for Eukrea CPUIMX35 platform. This includes 171 Include support for Eukrea CPUIMX35 platform. This includes
@@ -170,8 +177,8 @@ choice
170 default MACH_EUKREA_MBIMXSD35_BASEBOARD 177 default MACH_EUKREA_MBIMXSD35_BASEBOARD
171 178
172config MACH_EUKREA_MBIMXSD35_BASEBOARD 179config MACH_EUKREA_MBIMXSD35_BASEBOARD
173 prompt "Eukrea MBIMXSD development board" 180 bool "Eukrea MBIMXSD development board"
174 bool 181 select IMX_HAVE_PLATFORM_IMX_SSI
175 help 182 help
176 This adds board specific devices that can be found on Eukrea's 183 This adds board specific devices that can be found on Eukrea's
177 MBIMXSD evaluation board. 184 MBIMXSD evaluation board.
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 2bd7beceb991..8a182d0a3fcf 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -7,7 +7,6 @@
7obj-y := mm.o devices.o cpu.o 7obj-y := mm.o devices.o cpu.o
8CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS 8CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
9CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS 9CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
10CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
11obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o 10obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o
12obj-$(CONFIG_ARCH_MX35) += clock-imx35.o 11obj-$(CONFIG_ARCH_MX35) += clock-imx35.o
13obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o 12obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
diff --git a/arch/arm/mach-mx3/clock-imx31.c b/arch/arm/mach-mx3/clock-imx31.c
index 9a9eb6de6127..109e98f323e0 100644
--- a/arch/arm/mach-mx3/clock-imx31.c
+++ b/arch/arm/mach-mx3/clock-imx31.c
@@ -477,7 +477,7 @@ DEFINE_CLOCK(epit1_clk, 0, MXC_CCM_CGR0, 6, NULL, NULL, &perclk_clk);
477DEFINE_CLOCK(epit2_clk, 1, MXC_CCM_CGR0, 8, NULL, NULL, &perclk_clk); 477DEFINE_CLOCK(epit2_clk, 1, MXC_CCM_CGR0, 8, NULL, NULL, &perclk_clk);
478DEFINE_CLOCK(iim_clk, 0, MXC_CCM_CGR0, 10, NULL, NULL, &ipg_clk); 478DEFINE_CLOCK(iim_clk, 0, MXC_CCM_CGR0, 10, NULL, NULL, &ipg_clk);
479DEFINE_CLOCK(ata_clk, 0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk); 479DEFINE_CLOCK(ata_clk, 0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk);
480DEFINE_CLOCK(sdma_clk1, 0, MXC_CCM_CGR0, 14, NULL, &sdma_clk1, &ahb_clk); 480DEFINE_CLOCK(sdma_clk1, 0, MXC_CCM_CGR0, 14, NULL, NULL, &ahb_clk);
481DEFINE_CLOCK(cspi3_clk, 2, MXC_CCM_CGR0, 16, NULL, NULL, &ipg_clk); 481DEFINE_CLOCK(cspi3_clk, 2, MXC_CCM_CGR0, 16, NULL, NULL, &ipg_clk);
482DEFINE_CLOCK(rng_clk, 0, MXC_CCM_CGR0, 18, NULL, NULL, &ipg_clk); 482DEFINE_CLOCK(rng_clk, 0, MXC_CCM_CGR0, 18, NULL, NULL, &ipg_clk);
483DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CGR0, 20, NULL, NULL, &perclk_clk); 483DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CGR0, 20, NULL, NULL, &perclk_clk);
@@ -525,9 +525,9 @@ DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk);
525 525
526static struct clk_lookup lookups[] = { 526static struct clk_lookup lookups[] = {
527 _REGISTER_CLOCK(NULL, "emi", emi_clk) 527 _REGISTER_CLOCK(NULL, "emi", emi_clk)
528 _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) 528 _REGISTER_CLOCK("imx31-cspi.0", NULL, cspi1_clk)
529 _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk) 529 _REGISTER_CLOCK("imx31-cspi.1", NULL, cspi2_clk)
530 _REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk) 530 _REGISTER_CLOCK("imx31-cspi.2", NULL, cspi3_clk)
531 _REGISTER_CLOCK(NULL, "gpt", gpt_clk) 531 _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
532 _REGISTER_CLOCK(NULL, "pwm", pwm_clk) 532 _REGISTER_CLOCK(NULL, "pwm", pwm_clk)
533 _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk) 533 _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk)
@@ -564,7 +564,7 @@ static struct clk_lookup lookups[] = {
564 _REGISTER_CLOCK(NULL, "ata", ata_clk) 564 _REGISTER_CLOCK(NULL, "ata", ata_clk)
565 _REGISTER_CLOCK(NULL, "rtic", rtic_clk) 565 _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
566 _REGISTER_CLOCK(NULL, "rng", rng_clk) 566 _REGISTER_CLOCK(NULL, "rng", rng_clk)
567 _REGISTER_CLOCK(NULL, "sdma_ahb", sdma_clk1) 567 _REGISTER_CLOCK("imx-sdma", NULL, sdma_clk1)
568 _REGISTER_CLOCK(NULL, "sdma_ipg", sdma_clk2) 568 _REGISTER_CLOCK(NULL, "sdma_ipg", sdma_clk2)
569 _REGISTER_CLOCK(NULL, "mstick", mstick1_clk) 569 _REGISTER_CLOCK(NULL, "mstick", mstick1_clk)
570 _REGISTER_CLOCK(NULL, "mstick", mstick2_clk) 570 _REGISTER_CLOCK(NULL, "mstick", mstick2_clk)
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 7a62e744a8b0..61e4a318980a 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -364,8 +364,8 @@ DEFINE_CLOCK(cspi2_clk, 1, CCM_CGR0, 12, get_rate_ipg, NULL);
364DEFINE_CLOCK(ect_clk, 0, CCM_CGR0, 14, get_rate_ipg, NULL); 364DEFINE_CLOCK(ect_clk, 0, CCM_CGR0, 14, get_rate_ipg, NULL);
365DEFINE_CLOCK(edio_clk, 0, CCM_CGR0, 16, NULL, NULL); 365DEFINE_CLOCK(edio_clk, 0, CCM_CGR0, 16, NULL, NULL);
366DEFINE_CLOCK(emi_clk, 0, CCM_CGR0, 18, get_rate_ipg, NULL); 366DEFINE_CLOCK(emi_clk, 0, CCM_CGR0, 18, get_rate_ipg, NULL);
367DEFINE_CLOCK(epit1_clk, 0, CCM_CGR0, 20, get_rate_ipg_per, NULL); 367DEFINE_CLOCK(epit1_clk, 0, CCM_CGR0, 20, get_rate_ipg, NULL);
368DEFINE_CLOCK(epit2_clk, 1, CCM_CGR0, 22, get_rate_ipg_per, NULL); 368DEFINE_CLOCK(epit2_clk, 1, CCM_CGR0, 22, get_rate_ipg, NULL);
369DEFINE_CLOCK(esai_clk, 0, CCM_CGR0, 24, NULL, NULL); 369DEFINE_CLOCK(esai_clk, 0, CCM_CGR0, 24, NULL, NULL);
370DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGR0, 26, get_rate_sdhc, NULL); 370DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGR0, 26, get_rate_sdhc, NULL);
371DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGR0, 28, get_rate_sdhc, NULL); 371DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGR0, 28, get_rate_sdhc, NULL);
@@ -451,17 +451,17 @@ static struct clk_lookup lookups[] = {
451 _REGISTER_CLOCK(NULL, "ata", ata_clk) 451 _REGISTER_CLOCK(NULL, "ata", ata_clk)
452 _REGISTER_CLOCK("flexcan.0", NULL, can1_clk) 452 _REGISTER_CLOCK("flexcan.0", NULL, can1_clk)
453 _REGISTER_CLOCK("flexcan.1", NULL, can2_clk) 453 _REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
454 _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) 454 _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi1_clk)
455 _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk) 455 _REGISTER_CLOCK("imx35-cspi.1", NULL, cspi2_clk)
456 _REGISTER_CLOCK(NULL, "ect", ect_clk) 456 _REGISTER_CLOCK(NULL, "ect", ect_clk)
457 _REGISTER_CLOCK(NULL, "edio", edio_clk) 457 _REGISTER_CLOCK(NULL, "edio", edio_clk)
458 _REGISTER_CLOCK(NULL, "emi", emi_clk) 458 _REGISTER_CLOCK(NULL, "emi", emi_clk)
459 _REGISTER_CLOCK(NULL, "epit", epit1_clk) 459 _REGISTER_CLOCK("imx-epit.0", NULL, epit1_clk)
460 _REGISTER_CLOCK(NULL, "epit", epit2_clk) 460 _REGISTER_CLOCK("imx-epit.1", NULL, epit2_clk)
461 _REGISTER_CLOCK(NULL, "esai", esai_clk) 461 _REGISTER_CLOCK(NULL, "esai", esai_clk)
462 _REGISTER_CLOCK(NULL, "sdhc", esdhc1_clk) 462 _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk)
463 _REGISTER_CLOCK(NULL, "sdhc", esdhc2_clk) 463 _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk)
464 _REGISTER_CLOCK(NULL, "sdhc", esdhc3_clk) 464 _REGISTER_CLOCK("sdhci-esdhc-imx.2", NULL, esdhc3_clk)
465 _REGISTER_CLOCK("fec.0", NULL, fec_clk) 465 _REGISTER_CLOCK("fec.0", NULL, fec_clk)
466 _REGISTER_CLOCK(NULL, "gpio", gpio1_clk) 466 _REGISTER_CLOCK(NULL, "gpio", gpio1_clk)
467 _REGISTER_CLOCK(NULL, "gpio", gpio2_clk) 467 _REGISTER_CLOCK(NULL, "gpio", gpio2_clk)
@@ -482,7 +482,7 @@ static struct clk_lookup lookups[] = {
482 _REGISTER_CLOCK(NULL, "rtc", rtc_clk) 482 _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
483 _REGISTER_CLOCK(NULL, "rtic", rtic_clk) 483 _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
484 _REGISTER_CLOCK(NULL, "scc", scc_clk) 484 _REGISTER_CLOCK(NULL, "scc", scc_clk)
485 _REGISTER_CLOCK(NULL, "sdma", sdma_clk) 485 _REGISTER_CLOCK("imx-sdma", NULL, sdma_clk)
486 _REGISTER_CLOCK(NULL, "spba", spba_clk) 486 _REGISTER_CLOCK(NULL, "spba", spba_clk)
487 _REGISTER_CLOCK(NULL, "spdif", spdif_clk) 487 _REGISTER_CLOCK(NULL, "spdif", spdif_clk)
488 _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) 488 _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
@@ -535,8 +535,16 @@ int __init mx35_clocks_init()
535 __raw_writel(cgr2, CCM_BASE + CCM_CGR2); 535 __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
536 __raw_writel(cgr3, CCM_BASE + CCM_CGR3); 536 __raw_writel(cgr3, CCM_BASE + CCM_CGR3);
537 537
538 clk_enable(&iim_clk);
539 mx35_read_cpu_rev();
540
541#ifdef CONFIG_MXC_USE_EPIT
542 epit_timer_init(&epit1_clk,
543 MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
544#else
538 mxc_timer_init(&gpt_clk, 545 mxc_timer_init(&gpt_clk,
539 MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT); 546 MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
547#endif
540 548
541 return 0; 549 return 0;
542} 550}
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index 861afe0fe3ad..d00a75457812 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -25,15 +25,15 @@ struct mx3_cpu_type {
25}; 25};
26 26
27static struct mx3_cpu_type mx31_cpu_type[] __initdata = { 27static struct mx3_cpu_type mx31_cpu_type[] __initdata = {
28 { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = CHIP_REV_1_0 }, 28 { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = MX3x_CHIP_REV_1_0 },
29 { .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = CHIP_REV_1_1 }, 29 { .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = MX3x_CHIP_REV_1_1 },
30 { .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = CHIP_REV_1_1 }, 30 { .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = MX3x_CHIP_REV_1_1 },
31 { .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = CHIP_REV_1_1 }, 31 { .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = MX3x_CHIP_REV_1_1 },
32 { .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = CHIP_REV_1_1 }, 32 { .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = MX3x_CHIP_REV_1_1 },
33 { .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = CHIP_REV_1_2 }, 33 { .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = MX3x_CHIP_REV_1_2 },
34 { .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = CHIP_REV_1_2 }, 34 { .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = MX3x_CHIP_REV_1_2 },
35 { .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = CHIP_REV_2_0 }, 35 { .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = MX3x_CHIP_REV_2_0 },
36 { .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = CHIP_REV_2_0 }, 36 { .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = MX3x_CHIP_REV_2_0 },
37}; 37};
38 38
39void __init mx31_read_cpu_rev(void) 39void __init mx31_read_cpu_rev(void)
@@ -41,7 +41,7 @@ void __init mx31_read_cpu_rev(void)
41 u32 i, srev; 41 u32 i, srev;
42 42
43 /* read SREV register from IIM module */ 43 /* read SREV register from IIM module */
44 srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR + MXC_IIMSREV)); 44 srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV));
45 45
46 for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) 46 for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
47 if (srev == mx31_cpu_type[i].srev) { 47 if (srev == mx31_cpu_type[i].srev) {
@@ -55,3 +55,30 @@ void __init mx31_read_cpu_rev(void)
55 55
56 printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev); 56 printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev);
57} 57}
58
59unsigned int mx35_cpu_rev;
60EXPORT_SYMBOL(mx35_cpu_rev);
61
62void __init mx35_read_cpu_rev(void)
63{
64 u32 rev;
65 char *srev = "unknown";
66
67 rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
68 switch (rev) {
69 case 0x00:
70 mx35_cpu_rev = MX3x_CHIP_REV_1_0;
71 srev = "1.0";
72 break;
73 case 0x10:
74 mx35_cpu_rev = MX3x_CHIP_REV_2_0;
75 srev = "2.0";
76 break;
77 case 0x11:
78 mx35_cpu_rev = MX3x_CHIP_REV_2_1;
79 srev = "2.1";
80 break;
81 }
82
83 printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
84}
diff --git a/arch/arm/mach-mx3/devices-imx31.h b/arch/arm/mach-mx3/devices-imx31.h
index 3b1a44a20585..de9598590eba 100644
--- a/arch/arm/mach-mx3/devices-imx31.h
+++ b/arch/arm/mach-mx3/devices-imx31.h
@@ -9,30 +9,33 @@
9#include <mach/mx31.h> 9#include <mach/mx31.h>
10#include <mach/devices-common.h> 10#include <mach/devices-common.h>
11 11
12#define imx31_add_imx_i2c0(pdata) \ 12extern const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst;
13 imx_add_imx_i2c(0, MX31_I2C1_BASE_ADDR, SZ_4K, MX31_INT_I2C1, pdata) 13#define imx31_add_imx_i2c(id, pdata) \
14#define imx31_add_imx_i2c1(pdata) \ 14 imx_add_imx_i2c(&imx31_imx_i2c_data[id], pdata)
15 imx_add_imx_i2c(1, MX31_I2C2_BASE_ADDR, SZ_4K, MX31_INT_I2C2, pdata) 15#define imx31_add_imx_i2c0(pdata) imx31_add_imx_i2c(0, pdata)
16#define imx31_add_imx_i2c2(pdata) \ 16#define imx31_add_imx_i2c1(pdata) imx31_add_imx_i2c(1, pdata)
17 imx_add_imx_i2c(2, MX31_I2C3_BASE_ADDR, SZ_4K, MX31_INT_I2C3, pdata) 17#define imx31_add_imx_i2c2(pdata) imx31_add_imx_i2c(2, pdata)
18 18
19#define imx31_add_imx_uart0(pdata) \ 19extern const struct imx_imx_ssi_data imx31_imx_ssi_data[] __initconst;
20 imx_add_imx_uart_1irq(0, MX31_UART1_BASE_ADDR, SZ_16K, MX31_INT_UART1, pdata) 20#define imx31_add_imx_ssi(id, pdata) \
21#define imx31_add_imx_uart1(pdata) \ 21 imx_add_imx_ssi(&imx31_imx_ssi_data[id], pdata)
22 imx_add_imx_uart_1irq(1, MX31_UART2_BASE_ADDR, SZ_16K, MX31_INT_UART2, pdata)
23#define imx31_add_imx_uart2(pdata) \
24 imx_add_imx_uart_1irq(2, MX31_UART3_BASE_ADDR, SZ_16K, MX31_INT_UART3, pdata)
25#define imx31_add_imx_uart3(pdata) \
26 imx_add_imx_uart_1irq(3, MX31_UART4_BASE_ADDR, SZ_16K, MX31_INT_UART4, pdata)
27#define imx31_add_imx_uart4(pdata) \
28 imx_add_imx_uart_1irq(4, MX31_UART5_BASE_ADDR, SZ_16K, MX31_INT_UART5, pdata)
29 22
23extern const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst;
24#define imx31_add_imx_uart(id, pdata) \
25 imx_add_imx_uart_1irq(&imx31_imx_uart_data[id], pdata)
26#define imx31_add_imx_uart0(pdata) imx31_add_imx_uart(0, pdata)
27#define imx31_add_imx_uart1(pdata) imx31_add_imx_uart(1, pdata)
28#define imx31_add_imx_uart2(pdata) imx31_add_imx_uart(2, pdata)
29#define imx31_add_imx_uart3(pdata) imx31_add_imx_uart(3, pdata)
30#define imx31_add_imx_uart4(pdata) imx31_add_imx_uart(4, pdata)
31
32extern const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst;
30#define imx31_add_mxc_nand(pdata) \ 33#define imx31_add_mxc_nand(pdata) \
31 imx_add_mxc_nand_v1(MX31_NFC_BASE_ADDR, MX31_INT_NANDFC, pdata) 34 imx_add_mxc_nand(&imx31_mxc_nand_data, pdata)
32 35
33#define imx31_add_spi_imx0(pdata) \ 36extern const struct imx_spi_imx_data imx31_cspi_data[] __initconst;
34 imx_add_spi_imx(0, MX31_CSPI1_BASE_ADDR, SZ_4K, MX31_INT_CSPI1, pdata) 37#define imx31_add_cspi(id, pdata) \
35#define imx31_add_spi_imx1(pdata) \ 38 imx_add_spi_imx(&imx31_cspi_data[id], pdata)
36 imx_add_spi_imx(1, MX31_CSPI2_BASE_ADDR, SZ_4K, MX31_INT_CSPI2, pdata) 39#define imx31_add_spi_imx0(pdata) imx31_add_cspi(0, pdata)
37#define imx31_add_spi_imx2(pdata) \ 40#define imx31_add_spi_imx1(pdata) imx31_add_cspi(1, pdata)
38 imx_add_spi_imx(2, MX31_CSPI3_BASE_ADDR, SZ_4K, MX31_INT_CSPI3, pdata) 41#define imx31_add_spi_imx2(pdata) imx31_add_cspi(2, pdata)
diff --git a/arch/arm/mach-mx3/devices-imx35.h b/arch/arm/mach-mx3/devices-imx35.h
index f6a431a4c3d2..5eb917b638d0 100644
--- a/arch/arm/mach-mx3/devices-imx35.h
+++ b/arch/arm/mach-mx3/devices-imx35.h
@@ -9,29 +9,43 @@
9#include <mach/mx35.h> 9#include <mach/mx35.h>
10#include <mach/devices-common.h> 10#include <mach/devices-common.h>
11 11
12extern const struct imx_fec_data imx35_fec_data __initconst;
13#define imx35_add_fec(pdata) \
14 imx_add_fec(&imx35_fec_data, pdata)
15
12#define imx35_add_flexcan0(pdata) \ 16#define imx35_add_flexcan0(pdata) \
13 imx_add_flexcan(0, MX35_CAN1_BASE_ADDR, SZ_16K, MX35_INT_CAN1, pdata) 17 imx_add_flexcan(0, MX35_CAN1_BASE_ADDR, SZ_16K, MX35_INT_CAN1, pdata)
14#define imx35_add_flexcan1(pdata) \ 18#define imx35_add_flexcan1(pdata) \
15 imx_add_flexcan(1, MX35_CAN2_BASE_ADDR, SZ_16K, MX35_INT_CAN2, pdata) 19 imx_add_flexcan(1, MX35_CAN2_BASE_ADDR, SZ_16K, MX35_INT_CAN2, pdata)
16 20
17#define imx35_add_imx_i2c0(pdata) \ 21extern const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst;
18 imx_add_imx_i2c(0, MX35_I2C1_BASE_ADDR, SZ_4K, MX35_INT_I2C1, pdata) 22#define imx35_add_imx_i2c(id, pdata) \
19#define imx35_add_imx_i2c1(pdata) \ 23 imx_add_imx_i2c(&imx35_imx_i2c_data[id], pdata)
20 imx_add_imx_i2c(1, MX35_I2C2_BASE_ADDR, SZ_4K, MX35_INT_I2C2, pdata) 24#define imx35_add_imx_i2c0(pdata) imx35_add_imx_i2c(0, pdata)
21#define imx35_add_imx_i2c2(pdata) \ 25#define imx35_add_imx_i2c1(pdata) imx35_add_imx_i2c(1, pdata)
22 imx_add_imx_i2c(2, MX35_I2C3_BASE_ADDR, SZ_4K, MX35_INT_I2C3, pdata) 26#define imx35_add_imx_i2c2(pdata) imx35_add_imx_i2c(2, pdata)
27
28extern const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst;
29#define imx35_add_imx_ssi(id, pdata) \
30 imx_add_imx_ssi(&imx35_imx_ssi_data[id], pdata)
23 31
24#define imx35_add_imx_uart0(pdata) \ 32extern const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst;
25 imx_add_imx_uart_1irq(0, MX35_UART1_BASE_ADDR, SZ_16K, MX35_INT_UART1, pdata) 33#define imx35_add_imx_uart(id, pdata) \
26#define imx35_add_imx_uart1(pdata) \ 34 imx_add_imx_uart_1irq(&imx35_imx_uart_data[id], pdata)
27 imx_add_imx_uart_1irq(1, MX35_UART2_BASE_ADDR, SZ_16K, MX35_INT_UART2, pdata) 35#define imx35_add_imx_uart0(pdata) imx35_add_imx_uart(0, pdata)
28#define imx35_add_imx_uart2(pdata) \ 36#define imx35_add_imx_uart1(pdata) imx35_add_imx_uart(1, pdata)
29 imx_add_imx_uart_1irq(2, MX35_UART3_BASE_ADDR, SZ_16K, MX35_INT_UART3, pdata) 37#define imx35_add_imx_uart2(pdata) imx35_add_imx_uart(2, pdata)
30 38
39extern const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst;
31#define imx35_add_mxc_nand(pdata) \ 40#define imx35_add_mxc_nand(pdata) \
32 imx_add_mxc_nand_v21(MX35_NFC_BASE_ADDR, MX35_INT_NANDFC, pdata) 41 imx_add_mxc_nand(&imx35_mxc_nand_data, pdata)
42
43extern const struct imx_spi_imx_data imx35_cspi_data[] __initconst;
44#define imx35_add_cspi(id, pdata) \
45 imx_add_spi_imx(&imx35_cspi_data[id], pdata)
46#define imx35_add_spi_imx0(pdata) imx35_add_cspi(0, pdata)
47#define imx35_add_spi_imx1(pdata) imx35_add_cspi(1, pdata)
33 48
34#define imx35_add_spi_imx0(pdata) \ 49extern const struct imx_esdhc_imx_data imx35_esdhc_data[] __initconst;
35 imx_add_spi_imx(0, MX35_CSPI1_BASE_ADDR, SZ_4K, MX35_INT_CSPI1, pdata) 50#define imx35_add_esdhc(id, pdata) \
36#define imx35_add_spi_imx1(pdata) \ 51 imx_add_esdhc(&imx35_esdhc_data[id], pdata)
37 imx_add_spi_imx(1, MX35_CSPI2_BASE_ADDR, SZ_4K, MX35_INT_CSPI2, pdata)
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index a4fd1a26fc91..f4dff11aaee7 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -281,65 +281,6 @@ struct platform_device mxc_usbh2 = {
281 .num_resources = ARRAY_SIZE(mxc_usbh2_resources), 281 .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
282}; 282};
283 283
284#if defined(CONFIG_ARCH_MX35)
285static struct resource mxc_fec_resources[] = {
286 {
287 .start = MXC_FEC_BASE_ADDR,
288 .end = MXC_FEC_BASE_ADDR + 0xfff,
289 .flags = IORESOURCE_MEM,
290 }, {
291 .start = MXC_INT_FEC,
292 .end = MXC_INT_FEC,
293 .flags = IORESOURCE_IRQ,
294 },
295};
296
297struct platform_device mxc_fec_device = {
298 .name = "fec",
299 .id = 0,
300 .num_resources = ARRAY_SIZE(mxc_fec_resources),
301 .resource = mxc_fec_resources,
302};
303#endif
304
305static struct resource imx_ssi_resources0[] = {
306 {
307 .start = SSI1_BASE_ADDR,
308 .end = SSI1_BASE_ADDR + 0xfff,
309 .flags = IORESOURCE_MEM,
310 }, {
311 .start = MX31_INT_SSI1,
312 .end = MX31_INT_SSI1,
313 .flags = IORESOURCE_IRQ,
314 },
315};
316
317static struct resource imx_ssi_resources1[] = {
318 {
319 .start = SSI2_BASE_ADDR,
320 .end = SSI2_BASE_ADDR + 0xfff,
321 .flags = IORESOURCE_MEM
322 }, {
323 .start = MX31_INT_SSI2,
324 .end = MX31_INT_SSI2,
325 .flags = IORESOURCE_IRQ,
326 },
327};
328
329struct platform_device imx_ssi_device0 = {
330 .name = "imx-ssi",
331 .id = 0,
332 .num_resources = ARRAY_SIZE(imx_ssi_resources0),
333 .resource = imx_ssi_resources0,
334};
335
336struct platform_device imx_ssi_device1 = {
337 .name = "imx-ssi",
338 .id = 1,
339 .num_resources = ARRAY_SIZE(imx_ssi_resources1),
340 .resource = imx_ssi_resources1,
341};
342
343static struct resource imx_wdt_resources[] = { 284static struct resource imx_wdt_resources[] = {
344 { 285 {
345 .flags = IORESOURCE_MEM, 286 .flags = IORESOURCE_MEM,
@@ -410,10 +351,6 @@ static int __init mx3_devices_init(void)
410 mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff; 351 mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff;
411 mxc_usbh1_resources[1].start = MXC_INT_USBHS; 352 mxc_usbh1_resources[1].start = MXC_INT_USBHS;
412 mxc_usbh1_resources[1].end = MXC_INT_USBHS; 353 mxc_usbh1_resources[1].end = MXC_INT_USBHS;
413 imx_ssi_resources0[1].start = MX35_INT_SSI1;
414 imx_ssi_resources0[1].end = MX35_INT_SSI1;
415 imx_ssi_resources1[1].start = MX35_INT_SSI2;
416 imx_ssi_resources1[1].end = MX35_INT_SSI2;
417 imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR; 354 imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR;
418 imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff; 355 imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff;
419 } 356 }
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h
index e5535234839f..585f814473d5 100644
--- a/arch/arm/mach-mx3/devices.h
+++ b/arch/arm/mach-mx3/devices.h
@@ -2,7 +2,6 @@ extern struct platform_device mxc_w1_master_device;
2extern struct platform_device mx3_ipu; 2extern struct platform_device mx3_ipu;
3extern struct platform_device mx3_fb; 3extern struct platform_device mx3_fb;
4extern struct platform_device mx3_camera; 4extern struct platform_device mx3_camera;
5extern struct platform_device mxc_fec_device;
6extern struct platform_device mxcsdhc_device0; 5extern struct platform_device mxcsdhc_device0;
7extern struct platform_device mxcsdhc_device1; 6extern struct platform_device mxcsdhc_device1;
8extern struct platform_device mxc_otg_udc_device; 7extern struct platform_device mxc_otg_udc_device;
@@ -10,9 +9,6 @@ extern struct platform_device mxc_otg_host;
10extern struct platform_device mxc_usbh1; 9extern struct platform_device mxc_usbh1;
11extern struct platform_device mxc_usbh2; 10extern struct platform_device mxc_usbh2;
12extern struct platform_device mxc_rnga_device; 11extern struct platform_device mxc_rnga_device;
13extern struct platform_device imx_ssi_device0;
14extern struct platform_device imx_ssi_device1;
15extern struct platform_device imx_ssi_device1;
16extern struct platform_device imx_wdt_device0; 12extern struct platform_device imx_wdt_device0;
17extern struct platform_device imx_rtc_device0; 13extern struct platform_device imx_rtc_device0;
18extern struct platform_device imx_kpp_device; 14extern struct platform_device imx_kpp_device;
diff --git a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
index f8f15e3ac7a0..1abc10d52922 100644
--- a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
@@ -43,14 +43,13 @@
43#include <mach/ipu.h> 43#include <mach/ipu.h>
44#include <mach/mx3fb.h> 44#include <mach/mx3fb.h>
45#include <mach/audmux.h> 45#include <mach/audmux.h>
46#include <mach/ssi.h>
47 46
48#include "devices-imx35.h" 47#include "devices-imx35.h"
49#include "devices.h" 48#include "devices.h"
50 49
51static const struct fb_videomode fb_modedb[] = { 50static const struct fb_videomode fb_modedb[] = {
52 { 51 {
53 .name = "CMO_QVGA", 52 .name = "CMO-QVGA",
54 .refresh = 60, 53 .refresh = 60,
55 .xres = 320, 54 .xres = 320,
56 .yres = 240, 55 .yres = 240,
@@ -65,6 +64,40 @@ static const struct fb_videomode fb_modedb[] = {
65 .vmode = FB_VMODE_NONINTERLACED, 64 .vmode = FB_VMODE_NONINTERLACED,
66 .flag = 0, 65 .flag = 0,
67 }, 66 },
67 {
68 .name = "DVI-VGA",
69 .refresh = 60,
70 .xres = 640,
71 .yres = 480,
72 .pixclock = 32000,
73 .left_margin = 100,
74 .right_margin = 100,
75 .upper_margin = 7,
76 .lower_margin = 100,
77 .hsync_len = 7,
78 .vsync_len = 7,
79 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |
80 FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
81 .vmode = FB_VMODE_NONINTERLACED,
82 .flag = 0,
83 },
84 {
85 .name = "DVI-SVGA",
86 .refresh = 60,
87 .xres = 800,
88 .yres = 600,
89 .pixclock = 25000,
90 .left_margin = 75,
91 .right_margin = 75,
92 .upper_margin = 7,
93 .lower_margin = 75,
94 .hsync_len = 7,
95 .vsync_len = 7,
96 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |
97 FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
98 .vmode = FB_VMODE_NONINTERLACED,
99 .flag = 0,
100 },
68}; 101};
69 102
70static struct ipu_platform_data mx3_ipu_data = { 103static struct ipu_platform_data mx3_ipu_data = {
@@ -73,7 +106,7 @@ static struct ipu_platform_data mx3_ipu_data = {
73 106
74static struct mx3fb_platform_data mx3fb_pdata = { 107static struct mx3fb_platform_data mx3fb_pdata = {
75 .dma_dev = &mx3_ipu.dev, 108 .dma_dev = &mx3_ipu.dev,
76 .name = "CMO_QVGA", 109 .name = "CMO-QVGA",
77 .mode = fb_modedb, 110 .mode = fb_modedb,
78 .num_modes = ARRAY_SIZE(fb_modedb), 111 .num_modes = ARRAY_SIZE(fb_modedb),
79}; 112};
@@ -120,6 +153,16 @@ static struct pad_desc eukrea_mbimxsd_pads[] = {
120 MX35_PAD_STXD4__AUDMUX_AUD4_TXD, 153 MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
121 MX35_PAD_SRXD4__AUDMUX_AUD4_RXD, 154 MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
122 MX35_PAD_SCK4__AUDMUX_AUD4_TXC, 155 MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
156 /* CAN2 */
157 MX35_PAD_TX5_RX0__CAN2_TXCAN,
158 MX35_PAD_TX4_RX1__CAN2_RXCAN,
159 /* SDCARD */
160 MX35_PAD_SD1_CMD__ESDHC1_CMD,
161 MX35_PAD_SD1_CLK__ESDHC1_CLK,
162 MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
163 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
164 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
165 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
123}; 166};
124 167
125#define GPIO_LED1 (2 * 32 + 29) 168#define GPIO_LED1 (2 * 32 + 29)
@@ -206,7 +249,8 @@ static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {
206 }, 249 },
207}; 250};
208 251
209struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata = { 252static const
253struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
210 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE, 254 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
211}; 255};
212 256
@@ -242,7 +286,10 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
242 mxc_register_device(&mx3_ipu, &mx3_ipu_data); 286 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
243 mxc_register_device(&mx3_fb, &mx3fb_pdata); 287 mxc_register_device(&mx3_fb, &mx3fb_pdata);
244 288
245 mxc_register_device(&imx_ssi_device0, &eukrea_mbimxsd_ssi_pdata); 289 imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
290
291 imx35_add_flexcan1(NULL);
292 imx35_add_esdhc(0, NULL);
246 293
247 gpio_request(GPIO_LED1, "LED1"); 294 gpio_request(GPIO_LED1, "LED1");
248 gpio_direction_output(GPIO_LED1, 1); 295 gpio_direction_output(GPIO_LED1, 1);
@@ -254,7 +301,7 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
254 301
255 gpio_request(GPIO_LCDPWR, "LCDPWR"); 302 gpio_request(GPIO_LCDPWR, "LCDPWR");
256 gpio_direction_output(GPIO_LCDPWR, 1); 303 gpio_direction_output(GPIO_LCDPWR, 1);
257 gpio_free(GPIO_SWITCH1); 304 gpio_free(GPIO_LCDPWR);
258 305
259 i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices, 306 i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
260 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); 307 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
diff --git a/arch/arm/mach-mx3/mach-armadillo5x0.c b/arch/arm/mach-mx3/mach-armadillo5x0.c
index 68879c996a55..aaa30fe18f85 100644
--- a/arch/arm/mach-mx3/mach-armadillo5x0.c
+++ b/arch/arm/mach-mx3/mach-armadillo5x0.c
@@ -571,8 +571,6 @@ static struct sys_timer armadillo5x0_timer = {
571 571
572MACHINE_START(ARMADILLO5X0, "Armadillo-500") 572MACHINE_START(ARMADILLO5X0, "Armadillo-500")
573 /* Maintainer: Alberto Panizzo */ 573 /* Maintainer: Alberto Panizzo */
574 .phys_io = MX31_AIPS1_BASE_ADDR,
575 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
576 .boot_params = MX3x_PHYS_OFFSET + 0x100, 574 .boot_params = MX3x_PHYS_OFFSET + 0x100,
577 .map_io = mx31_map_io, 575 .map_io = mx31_map_io,
578 .init_irq = mx31_init_irq, 576 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c
index 2a4f8b781ba4..8533bf04284a 100644
--- a/arch/arm/mach-mx3/mach-cpuimx35.c
+++ b/arch/arm/mach-mx3/mach-cpuimx35.c
@@ -31,6 +31,7 @@
31#include <linux/usb/otg.h> 31#include <linux/usb/otg.h>
32#include <linux/usb/ulpi.h> 32#include <linux/usb/ulpi.h>
33#include <linux/fsl_devices.h> 33#include <linux/fsl_devices.h>
34#include <linux/i2c-gpio.h>
34 35
35#include <asm/mach-types.h> 36#include <asm/mach-types.h>
36#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
@@ -43,7 +44,6 @@
43#include <mach/iomux-mx35.h> 44#include <mach/iomux-mx35.h>
44#include <mach/mxc_nand.h> 45#include <mach/mxc_nand.h>
45#include <mach/mxc_ehci.h> 46#include <mach/mxc_ehci.h>
46#include <mach/ulpi.h>
47 47
48#include "devices-imx35.h" 48#include "devices-imx35.h"
49#include "devices.h" 49#include "devices.h"
@@ -53,39 +53,16 @@ static const struct imxuart_platform_data uart_pdata __initconst = {
53}; 53};
54 54
55static const struct imxi2c_platform_data 55static const struct imxi2c_platform_data
56eukrea_cpuimx35_i2c0_data __initconst = { 56 eukrea_cpuimx35_i2c0_data __initconst = {
57 .bitrate = 50000, 57 .bitrate = 100000,
58}; 58};
59 59
60#define TSC2007_IRQGPIO (2 * 32 + 2)
61static int ts_get_pendown_state(void)
62{
63 int val = 0;
64 gpio_free(TSC2007_IRQGPIO);
65 gpio_request(TSC2007_IRQGPIO, NULL);
66 gpio_direction_input(TSC2007_IRQGPIO);
67
68 val = gpio_get_value(TSC2007_IRQGPIO);
69
70 gpio_free(TSC2007_IRQGPIO);
71 gpio_request(TSC2007_IRQGPIO, NULL);
72
73 return val ? 0 : 1;
74}
75
76static int ts_init(void)
77{
78 gpio_request(TSC2007_IRQGPIO, NULL);
79 return 0;
80}
81
82static struct tsc2007_platform_data tsc2007_info = { 60static struct tsc2007_platform_data tsc2007_info = {
83 .model = 2007, 61 .model = 2007,
84 .x_plate_ohms = 180, 62 .x_plate_ohms = 180,
85 .get_pendown_state = ts_get_pendown_state,
86 .init_platform_hw = ts_init,
87}; 63};
88 64
65#define TSC2007_IRQGPIO (2 * 32 + 2)
89static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = { 66static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
90 { 67 {
91 I2C_BOARD_INFO("pcf8563", 0x51), 68 I2C_BOARD_INFO("pcf8563", 0x51),
@@ -98,7 +75,6 @@ static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
98}; 75};
99 76
100static struct platform_device *devices[] __initdata = { 77static struct platform_device *devices[] __initdata = {
101 &mxc_fec_device,
102 &imx_wdt_device0, 78 &imx_wdt_device0,
103}; 79};
104 80
@@ -135,18 +111,18 @@ static struct pad_desc eukrea_cpuimx35_pads[] = {
135}; 111};
136 112
137static const struct mxc_nand_platform_data 113static const struct mxc_nand_platform_data
138eukrea_cpuimx35_nand_board_info __initconst = { 114 eukrea_cpuimx35_nand_board_info __initconst = {
139 .width = 1, 115 .width = 1,
140 .hw_ecc = 1, 116 .hw_ecc = 1,
141 .flash_bbt = 1, 117 .flash_bbt = 1,
142}; 118};
143 119
144static struct mxc_usbh_platform_data otg_pdata = { 120static struct mxc_usbh_platform_data __maybe_unused otg_pdata = {
145 .portsc = MXC_EHCI_MODE_UTMI, 121 .portsc = MXC_EHCI_MODE_UTMI,
146 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 122 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
147}; 123};
148 124
149static struct mxc_usbh_platform_data usbh1_pdata = { 125static struct mxc_usbh_platform_data __maybe_unused usbh1_pdata = {
150 .portsc = MXC_EHCI_MODE_SERIAL, 126 .portsc = MXC_EHCI_MODE_SERIAL,
151 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY | 127 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY |
152 MXC_EHCI_IPPUE_DOWN, 128 MXC_EHCI_IPPUE_DOWN,
@@ -180,6 +156,7 @@ static void __init mxc_board_init(void)
180 mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx35_pads, 156 mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx35_pads,
181 ARRAY_SIZE(eukrea_cpuimx35_pads)); 157 ARRAY_SIZE(eukrea_cpuimx35_pads));
182 158
159 imx35_add_fec(NULL);
183 platform_add_devices(devices, ARRAY_SIZE(devices)); 160 platform_add_devices(devices, ARRAY_SIZE(devices));
184 161
185 imx35_add_imx_uart0(&uart_pdata); 162 imx35_add_imx_uart0(&uart_pdata);
@@ -189,18 +166,13 @@ static void __init mxc_board_init(void)
189 ARRAY_SIZE(eukrea_cpuimx35_i2c_devices)); 166 ARRAY_SIZE(eukrea_cpuimx35_i2c_devices));
190 imx35_add_imx_i2c0(&eukrea_cpuimx35_i2c0_data); 167 imx35_add_imx_i2c0(&eukrea_cpuimx35_i2c0_data);
191 168
192#if defined(CONFIG_USB_ULPI) 169 if (otg_mode_host)
193 if (otg_mode_host) {
194 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
195 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
196
197 mxc_register_device(&mxc_otg_host, &otg_pdata); 170 mxc_register_device(&mxc_otg_host, &otg_pdata);
198 } 171 else
199 mxc_register_device(&mxc_usbh1, &usbh1_pdata);
200#endif
201 if (!otg_mode_host)
202 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); 172 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
203 173
174 mxc_register_device(&mxc_usbh1, &usbh1_pdata);
175
204#ifdef CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD 176#ifdef CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD
205 eukrea_mbimxsd35_baseboard_init(); 177 eukrea_mbimxsd35_baseboard_init();
206#endif 178#endif
@@ -217,8 +189,6 @@ struct sys_timer eukrea_cpuimx35_timer = {
217 189
218MACHINE_START(EUKREA_CPUIMX35, "Eukrea CPUIMX35") 190MACHINE_START(EUKREA_CPUIMX35, "Eukrea CPUIMX35")
219 /* Maintainer: Eukrea Electromatique */ 191 /* Maintainer: Eukrea Electromatique */
220 .phys_io = MX35_AIPS1_BASE_ADDR,
221 .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
222 .boot_params = MX3x_PHYS_OFFSET + 0x100, 192 .boot_params = MX3x_PHYS_OFFSET + 0x100,
223 .map_io = mx35_map_io, 193 .map_io = mx35_map_io,
224 .init_irq = mx35_init_irq, 194 .init_irq = mx35_init_irq,
diff --git a/arch/arm/mach-mx3/mach-kzm_arm11_01.c b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
index 5b23e416d6c7..042cd5655e17 100644
--- a/arch/arm/mach-mx3/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
@@ -274,8 +274,6 @@ static struct sys_timer kzm_timer = {
274 * initialize __mach_desc_KZM_ARM11_01 data structure. 274 * initialize __mach_desc_KZM_ARM11_01 data structure.
275 */ 275 */
276MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01") 276MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
277 .phys_io = MX31_AIPS1_BASE_ADDR,
278 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
279 .boot_params = MX3x_PHYS_OFFSET + 0x100, 277 .boot_params = MX3x_PHYS_OFFSET + 0x100,
280 .map_io = kzm_map_io, 278 .map_io = kzm_map_io,
281 .init_irq = mx31_init_irq, 279 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index 6fe69e124d30..5c1d0e86c91e 100644
--- a/arch/arm/mach-mx3/mach-mx31_3ds.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -301,8 +301,6 @@ static struct sys_timer mx31_3ds_timer = {
301 */ 301 */
302MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") 302MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
303 /* Maintainer: Freescale Semiconductor, Inc. */ 303 /* Maintainer: Freescale Semiconductor, Inc. */
304 .phys_io = MX31_AIPS1_BASE_ADDR,
305 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
306 .boot_params = MX3x_PHYS_OFFSET + 0x100, 304 .boot_params = MX3x_PHYS_OFFSET + 0x100,
307 .map_io = mx31_3ds_map_io, 305 .map_io = mx31_3ds_map_io,
308 .init_irq = mx31_init_irq, 306 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mach-mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c
index 94b3e7c42404..b993b9bf6179 100644
--- a/arch/arm/mach-mx3/mach-mx31ads.c
+++ b/arch/arm/mach-mx3/mach-mx31ads.c
@@ -22,13 +22,13 @@
22#include <linux/i2c.h> 22#include <linux/i2c.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24 24
25#include <mach/hardware.h>
26#include <asm/mach-types.h> 25#include <asm/mach-types.h>
27#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
28#include <asm/mach/time.h> 27#include <asm/mach/time.h>
29#include <asm/memory.h> 28#include <asm/memory.h>
30#include <asm/mach/map.h> 29#include <asm/mach/map.h>
31#include <mach/common.h> 30#include <mach/common.h>
31#include <mach/board-mx31ads.h>
32#include <mach/iomux-mx3.h> 32#include <mach/iomux-mx3.h>
33 33
34#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 34#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
@@ -40,10 +40,6 @@
40#include "devices-imx31.h" 40#include "devices-imx31.h"
41#include "devices.h" 41#include "devices.h"
42 42
43/* Base address of PBC controller */
44#define PBC_BASE_ADDRESS MX31_CS4_BASE_ADDR_VIRT
45/* Offsets for the PBC Controller register */
46
47/* PBC Board interrupt status register */ 43/* PBC Board interrupt status register */
48#define PBC_INTSTATUS 0x000016 44#define PBC_INTSTATUS 0x000016
49 45
@@ -67,7 +63,6 @@
67#define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS) 63#define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS)
68#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_4) 64#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_4)
69 65
70#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START)
71#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE) 66#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE)
72 67
73#define EXPIO_INT_XUART_INTA (MXC_EXP_IO_BASE + 10) 68#define EXPIO_INT_XUART_INTA (MXC_EXP_IO_BASE + 10)
@@ -517,7 +512,7 @@ static unsigned int ssi_pins[] = {
517 512
518static void mxc_init_audio(void) 513static void mxc_init_audio(void)
519{ 514{
520 mxc_register_device(&imx_ssi_device0, NULL); 515 imx31_add_imx_ssi(0, NULL);
521 mxc_iomux_setup_multiple_pins(ssi_pins, ARRAY_SIZE(ssi_pins), "ssi"); 516 mxc_iomux_setup_multiple_pins(ssi_pins, ARRAY_SIZE(ssi_pins), "ssi");
522} 517}
523 518
@@ -574,8 +569,6 @@ static struct sys_timer mx31ads_timer = {
574 */ 569 */
575MACHINE_START(MX31ADS, "Freescale MX31ADS") 570MACHINE_START(MX31ADS, "Freescale MX31ADS")
576 /* Maintainer: Freescale Semiconductor, Inc. */ 571 /* Maintainer: Freescale Semiconductor, Inc. */
577 .phys_io = MX31_AIPS1_BASE_ADDR,
578 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
579 .boot_params = MX3x_PHYS_OFFSET + 0x100, 572 .boot_params = MX3x_PHYS_OFFSET + 0x100,
580 .map_io = mx31ads_map_io, 573 .map_io = mx31ads_map_io,
581 .init_irq = mx31ads_init_irq, 574 .init_irq = mx31ads_init_irq,
diff --git a/arch/arm/mach-mx3/mach-mx31lilly.c b/arch/arm/mach-mx3/mach-mx31lilly.c
index 7c37daabb757..42f47faa6fd6 100644
--- a/arch/arm/mach-mx3/mach-mx31lilly.c
+++ b/arch/arm/mach-mx3/mach-mx31lilly.c
@@ -348,8 +348,6 @@ static struct sys_timer mx31lilly_timer = {
348}; 348};
349 349
350MACHINE_START(LILLY1131, "INCO startec LILLY-1131") 350MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
351 .phys_io = MX31_AIPS1_BASE_ADDR,
352 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
353 .boot_params = MX3x_PHYS_OFFSET + 0x100, 351 .boot_params = MX3x_PHYS_OFFSET + 0x100,
354 .map_io = mx31_map_io, 352 .map_io = mx31_map_io,
355 .init_irq = mx31_init_irq, 353 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mach-mx31lite.c b/arch/arm/mach-mx3/mach-mx31lite.c
index f66a9576d8c2..b93895814cdf 100644
--- a/arch/arm/mach-mx3/mach-mx31lite.c
+++ b/arch/arm/mach-mx3/mach-mx31lite.c
@@ -282,8 +282,6 @@ struct sys_timer mx31lite_timer = {
282 282
283MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM") 283MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
284 /* Maintainer: Freescale Semiconductor, Inc. */ 284 /* Maintainer: Freescale Semiconductor, Inc. */
285 .phys_io = MX31_AIPS1_BASE_ADDR,
286 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
287 .boot_params = MX3x_PHYS_OFFSET + 0x100, 285 .boot_params = MX3x_PHYS_OFFSET + 0x100,
288 .map_io = mx31lite_map_io, 286 .map_io = mx31lite_map_io,
289 .init_irq = mx31_init_irq, 287 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mach-mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c
index 7a075e8bf2d4..eb5f426df224 100644
--- a/arch/arm/mach-mx3/mach-mx31moboard.c
+++ b/arch/arm/mach-mx3/mach-mx31moboard.c
@@ -560,8 +560,6 @@ struct sys_timer mx31moboard_timer = {
560 560
561MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") 561MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
562 /* Maintainer: Valentin Longchamp, EPFL Mobots group */ 562 /* Maintainer: Valentin Longchamp, EPFL Mobots group */
563 .phys_io = MX31_AIPS1_BASE_ADDR,
564 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
565 .boot_params = MX3x_PHYS_OFFSET + 0x100, 563 .boot_params = MX3x_PHYS_OFFSET + 0x100,
566 .map_io = mx31_map_io, 564 .map_io = mx31_map_io,
567 .init_irq = mx31_init_irq, 565 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mach-mx35_3ds.c b/arch/arm/mach-mx3/mach-mx35_3ds.c
index 1c30d7212f17..05f628d90725 100644
--- a/arch/arm/mach-mx3/mach-mx35_3ds.c
+++ b/arch/arm/mach-mx3/mach-mx35_3ds.c
@@ -1,5 +1,6 @@
1/* 1/*
2 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. 2 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2009 Marc Kleine-Budde, Pengutronix
3 * 4 *
4 * Author: Fabio Estevam <fabio.estevam@freescale.com> 5 * Author: Fabio Estevam <fabio.estevam@freescale.com>
5 * 6 *
@@ -27,6 +28,8 @@
27#include <linux/gpio.h> 28#include <linux/gpio.h>
28#include <linux/fsl_devices.h> 29#include <linux/fsl_devices.h>
29 30
31#include <linux/mtd/physmap.h>
32
30#include <asm/mach-types.h> 33#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
32#include <asm/mach/time.h> 35#include <asm/mach/time.h>
@@ -35,6 +38,7 @@
35#include <mach/hardware.h> 38#include <mach/hardware.h>
36#include <mach/common.h> 39#include <mach/common.h>
37#include <mach/iomux-mx35.h> 40#include <mach/iomux-mx35.h>
41#include <mach/mxc_ehci.h>
38 42
39#include "devices-imx35.h" 43#include "devices-imx35.h"
40#include "devices.h" 44#include "devices.h"
@@ -43,8 +47,34 @@ static const struct imxuart_platform_data uart_pdata __initconst = {
43 .flags = IMXUART_HAVE_RTSCTS, 47 .flags = IMXUART_HAVE_RTSCTS,
44}; 48};
45 49
50static struct physmap_flash_data mx35pdk_flash_data = {
51 .width = 2,
52};
53
54static struct resource mx35pdk_flash_resource = {
55 .start = MX35_CS0_BASE_ADDR,
56 .end = MX35_CS0_BASE_ADDR + SZ_64M - 1,
57 .flags = IORESOURCE_MEM,
58};
59
60static struct platform_device mx35pdk_flash = {
61 .name = "physmap-flash",
62 .id = 0,
63 .dev = {
64 .platform_data = &mx35pdk_flash_data,
65 },
66 .resource = &mx35pdk_flash_resource,
67 .num_resources = 1,
68};
69
70static const struct mxc_nand_platform_data mx35pdk_nand_board_info __initconst = {
71 .width = 1,
72 .hw_ecc = 1,
73 .flash_bbt = 1,
74};
75
46static struct platform_device *devices[] __initdata = { 76static struct platform_device *devices[] __initdata = {
47 &mxc_fec_device, 77 &mx35pdk_flash,
48}; 78};
49 79
50static struct pad_desc mx35pdk_pads[] = { 80static struct pad_desc mx35pdk_pads[] = {
@@ -75,14 +105,24 @@ static struct pad_desc mx35pdk_pads[] = {
75 /* USBOTG */ 105 /* USBOTG */
76 MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR, 106 MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
77 MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC, 107 MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
108 /* USBH1 */
109 MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
110 MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
78}; 111};
79 112
80/* OTG config */ 113/* OTG config */
81static struct fsl_usb2_platform_data usb_pdata = { 114static struct fsl_usb2_platform_data usb_otg_pdata = {
82 .operating_mode = FSL_USB2_DR_DEVICE, 115 .operating_mode = FSL_USB2_DR_DEVICE,
83 .phy_mode = FSL_USB2_PHY_UTMI_WIDE, 116 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
84}; 117};
85 118
119/* USB HOST config */
120static struct mxc_usbh_platform_data usb_host_pdata = {
121 .portsc = MXC_EHCI_MODE_SERIAL,
122 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI |
123 MXC_EHCI_INTERNAL_PHY,
124};
125
86/* 126/*
87 * Board specific initialization. 127 * Board specific initialization.
88 */ 128 */
@@ -90,11 +130,16 @@ static void __init mxc_board_init(void)
90{ 130{
91 mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads)); 131 mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads));
92 132
133 imx35_add_fec(NULL);
93 platform_add_devices(devices, ARRAY_SIZE(devices)); 134 platform_add_devices(devices, ARRAY_SIZE(devices));
94 135
95 imx35_add_imx_uart0(&uart_pdata); 136 imx35_add_imx_uart0(&uart_pdata);
96 137
97 mxc_register_device(&mxc_otg_udc_device, &usb_pdata); 138 mxc_register_device(&mxc_otg_udc_device, &usb_otg_pdata);
139
140 mxc_register_device(&mxc_usbh1, &usb_host_pdata);
141
142 imx35_add_mxc_nand(&mx35pdk_nand_board_info);
98} 143}
99 144
100static void __init mx35pdk_timer_init(void) 145static void __init mx35pdk_timer_init(void)
@@ -108,8 +153,6 @@ struct sys_timer mx35pdk_timer = {
108 153
109MACHINE_START(MX35_3DS, "Freescale MX35PDK") 154MACHINE_START(MX35_3DS, "Freescale MX35PDK")
110 /* Maintainer: Freescale Semiconductor, Inc */ 155 /* Maintainer: Freescale Semiconductor, Inc */
111 .phys_io = MX35_AIPS1_BASE_ADDR,
112 .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
113 .boot_params = MX3x_PHYS_OFFSET + 0x100, 156 .boot_params = MX3x_PHYS_OFFSET + 0x100,
114 .map_io = mx35_map_io, 157 .map_io = mx35_map_io,
115 .init_irq = mx35_init_irq, 158 .init_irq = mx35_init_irq,
diff --git a/arch/arm/mach-mx3/mach-pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c
index 214de11b20b9..86e86c1300d5 100644
--- a/arch/arm/mach-mx3/mach-pcm037.c
+++ b/arch/arm/mach-mx3/mach-pcm037.c
@@ -680,8 +680,6 @@ struct sys_timer pcm037_timer = {
680 680
681MACHINE_START(PCM037, "Phytec Phycore pcm037") 681MACHINE_START(PCM037, "Phytec Phycore pcm037")
682 /* Maintainer: Pengutronix */ 682 /* Maintainer: Pengutronix */
683 .phys_io = MX31_AIPS1_BASE_ADDR,
684 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
685 .boot_params = MX3x_PHYS_OFFSET + 0x100, 683 .boot_params = MX3x_PHYS_OFFSET + 0x100,
686 .map_io = mx31_map_io, 684 .map_io = mx31_map_io,
687 .init_irq = mx31_init_irq, 685 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mach-pcm037_eet.c b/arch/arm/mach-mx3/mach-pcm037_eet.c
index c8b98218efee..99e0894e07db 100644
--- a/arch/arm/mach-mx3/mach-pcm037_eet.c
+++ b/arch/arm/mach-mx3/mach-pcm037_eet.c
@@ -19,6 +19,7 @@
19 19
20#include "pcm037.h" 20#include "pcm037.h"
21#include "devices.h" 21#include "devices.h"
22#include "devices-imx31.h"
22 23
23static unsigned int pcm037_eet_pins[] = { 24static unsigned int pcm037_eet_pins[] = {
24 /* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */ 25 /* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */
@@ -181,7 +182,7 @@ static int eet_init_devices(void)
181 /* SPI */ 182 /* SPI */
182 spi_register_board_info(pcm037_spi_dev, ARRAY_SIZE(pcm037_spi_dev)); 183 spi_register_board_info(pcm037_spi_dev, ARRAY_SIZE(pcm037_spi_dev));
183#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) 184#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
184 imx35_add_spi_imx0(&pcm037_spi1_pdata); 185 imx31_add_spi_imx0(&pcm037_spi1_pdata);
185#endif 186#endif
186 187
187 platform_device_register(&pcm037_gpio_keys_device); 188 platform_device_register(&pcm037_gpio_keys_device);
diff --git a/arch/arm/mach-mx3/mach-pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c
index 28886f0e62f9..4e1de87995d4 100644
--- a/arch/arm/mach-mx3/mach-pcm043.c
+++ b/arch/arm/mach-mx3/mach-pcm043.c
@@ -42,7 +42,6 @@
42#include <mach/mxc_ehci.h> 42#include <mach/mxc_ehci.h>
43#include <mach/ulpi.h> 43#include <mach/ulpi.h>
44#include <mach/audmux.h> 44#include <mach/audmux.h>
45#include <mach/ssi.h>
46 45
47#include "devices-imx35.h" 46#include "devices-imx35.h"
48#include "devices.h" 47#include "devices.h"
@@ -141,7 +140,6 @@ static struct i2c_board_info pcm043_i2c_devices[] = {
141 140
142static struct platform_device *devices[] __initdata = { 141static struct platform_device *devices[] __initdata = {
143 &pcm043_flash, 142 &pcm043_flash,
144 &mxc_fec_device,
145 &imx_wdt_device0, 143 &imx_wdt_device0,
146}; 144};
147 145
@@ -217,6 +215,13 @@ static struct pad_desc pcm043_pads[] = {
217 /* CAN2 */ 215 /* CAN2 */
218 MX35_PAD_TX5_RX0__CAN2_TXCAN, 216 MX35_PAD_TX5_RX0__CAN2_TXCAN,
219 MX35_PAD_TX4_RX1__CAN2_RXCAN, 217 MX35_PAD_TX4_RX1__CAN2_RXCAN,
218 /* esdhc */
219 MX35_PAD_SD1_CMD__ESDHC1_CMD,
220 MX35_PAD_SD1_CLK__ESDHC1_CLK,
221 MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
222 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
223 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
224 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
220}; 225};
221 226
222#define AC97_GPIO_TXFS (1 * 32 + 31) 227#define AC97_GPIO_TXFS (1 * 32 + 31)
@@ -293,7 +298,7 @@ err1:
293 mdelay(1); 298 mdelay(1);
294} 299}
295 300
296static struct imx_ssi_platform_data pcm043_ssi_pdata = { 301static const struct imx_ssi_platform_data pcm043_ssi_pdata __initconst = {
297 .ac97_reset = pcm043_ac97_cold_reset, 302 .ac97_reset = pcm043_ac97_cold_reset,
298 .ac97_warm_reset = pcm043_ac97_warm_reset, 303 .ac97_warm_reset = pcm043_ac97_warm_reset,
299 .flags = IMX_SSI_USE_AC97, 304 .flags = IMX_SSI_USE_AC97,
@@ -357,11 +362,12 @@ static void __init mxc_board_init(void)
357 MXC_AUDMUX_V2_PTCR_TCLKDIR, /* clock is output */ 362 MXC_AUDMUX_V2_PTCR_TCLKDIR, /* clock is output */
358 MXC_AUDMUX_V2_PDCR_RXDSEL(3)); 363 MXC_AUDMUX_V2_PDCR_RXDSEL(3));
359 364
365 imx35_add_fec(NULL);
360 platform_add_devices(devices, ARRAY_SIZE(devices)); 366 platform_add_devices(devices, ARRAY_SIZE(devices));
361 367
362 imx35_add_imx_uart0(&uart_pdata); 368 imx35_add_imx_uart0(&uart_pdata);
363 imx35_add_mxc_nand(&pcm037_nand_board_info); 369 imx35_add_mxc_nand(&pcm037_nand_board_info);
364 mxc_register_device(&imx_ssi_device0, &pcm043_ssi_pdata); 370 imx35_add_imx_ssi(0, &pcm043_ssi_pdata);
365 371
366 imx35_add_imx_uart1(&uart_pdata); 372 imx35_add_imx_uart1(&uart_pdata);
367 373
@@ -389,6 +395,7 @@ static void __init mxc_board_init(void)
389 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); 395 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
390 396
391 imx35_add_flexcan1(NULL); 397 imx35_add_flexcan1(NULL);
398 imx35_add_esdhc(0, NULL);
392} 399}
393 400
394static void __init pcm043_timer_init(void) 401static void __init pcm043_timer_init(void)
@@ -402,8 +409,6 @@ struct sys_timer pcm043_timer = {
402 409
403MACHINE_START(PCM043, "Phytec Phycore pcm043") 410MACHINE_START(PCM043, "Phytec Phycore pcm043")
404 /* Maintainer: Pengutronix */ 411 /* Maintainer: Pengutronix */
405 .phys_io = MX35_AIPS1_BASE_ADDR,
406 .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
407 .boot_params = MX3x_PHYS_OFFSET + 0x100, 412 .boot_params = MX3x_PHYS_OFFSET + 0x100,
408 .map_io = mx35_map_io, 413 .map_io = mx35_map_io,
409 .init_irq = mx35_init_irq, 414 .init_irq = mx35_init_irq,
diff --git a/arch/arm/mach-mx3/mach-qong.c b/arch/arm/mach-mx3/mach-qong.c
index c8c380eef74c..fd1050c40964 100644
--- a/arch/arm/mach-mx3/mach-qong.c
+++ b/arch/arm/mach-mx3/mach-qong.c
@@ -270,8 +270,6 @@ static struct sys_timer qong_timer = {
270 270
271MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") 271MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
272 /* Maintainer: DENX Software Engineering GmbH */ 272 /* Maintainer: DENX Software Engineering GmbH */
273 .phys_io = MX31_AIPS1_BASE_ADDR,
274 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
275 .boot_params = MX3x_PHYS_OFFSET + 0x100, 273 .boot_params = MX3x_PHYS_OFFSET + 0x100,
276 .map_io = mx31_map_io, 274 .map_io = mx31_map_io,
277 .init_irq = mx31_init_irq, 275 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c
index 20e48c0195c4..b4ffc531a82c 100644
--- a/arch/arm/mach-mx3/mm.c
+++ b/arch/arm/mach-mx3/mm.c
@@ -110,6 +110,24 @@ void __init mx35_init_irq(void)
110static int mxc_init_l2x0(void) 110static int mxc_init_l2x0(void)
111{ 111{
112 void __iomem *l2x0_base; 112 void __iomem *l2x0_base;
113 void __iomem *clkctl_base;
114/*
115 * First of all, we must repair broken chip settings. There are some
116 * i.MX35 CPUs in the wild, comming with bogus L2 cache settings. These
117 * misconfigured CPUs will run amok immediately when the L2 cache gets enabled.
118 * Workaraound is to setup the correct register setting prior enabling the
119 * L2 cache. This should not hurt already working CPUs, as they are using the
120 * same value
121 */
122#define L2_MEM_VAL 0x10
123
124 clkctl_base = ioremap(MX35_CLKCTL_BASE_ADDR, 4096);
125 if (clkctl_base != NULL) {
126 writel(0x00000515, clkctl_base + L2_MEM_VAL);
127 iounmap(clkctl_base);
128 } else {
129 pr_err("L2 cache: Cannot fix timing. Trying to continue without\n");
130 }
113 131
114 l2x0_base = ioremap(L2CC_BASE_ADDR, 4096); 132 l2x0_base = ioremap(L2CC_BASE_ADDR, 4096);
115 if (IS_ERR(l2x0_base)) { 133 if (IS_ERR(l2x0_base)) {
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-21 22:25:17 -0500