diff options
Diffstat (limited to 'arch/arm/mach-mx3')
-rw-r--r-- | arch/arm/mach-mx3/armadillo5x0.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx3/clock-imx35.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-mx3/clock.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-mx3/devices.c | 163 | ||||
-rw-r--r-- | arch/arm/mach-mx3/devices.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-mx3/mm.c | 14 | ||||
-rw-r--r-- | arch/arm/mach-mx3/mx31ads.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx3/mx31lilly.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx3/mx31lite.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-mx3/mx31moboard-devboard.c | 43 | ||||
-rw-r--r-- | arch/arm/mach-mx3/mx31moboard-marxbot.c | 55 | ||||
-rw-r--r-- | arch/arm/mach-mx3/mx31moboard.c | 134 | ||||
-rw-r--r-- | arch/arm/mach-mx3/mx31pdk.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx3/mx35pdk.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx3/pcm037.c | 42 | ||||
-rw-r--r-- | arch/arm/mach-mx3/pcm043.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-mx3/qong.c | 7 |
17 files changed, 403 insertions, 130 deletions
diff --git a/arch/arm/mach-mx3/armadillo5x0.c b/arch/arm/mach-mx3/armadillo5x0.c index ee331fd6b1bd..776c0ee1b3cd 100644 --- a/arch/arm/mach-mx3/armadillo5x0.c +++ b/arch/arm/mach-mx3/armadillo5x0.c | |||
@@ -352,7 +352,7 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500") | |||
352 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 352 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
353 | .boot_params = PHYS_OFFSET + 0x00000100, | 353 | .boot_params = PHYS_OFFSET + 0x00000100, |
354 | .map_io = mx31_map_io, | 354 | .map_io = mx31_map_io, |
355 | .init_irq = mxc_init_irq, | 355 | .init_irq = mx31_init_irq, |
356 | .timer = &armadillo5x0_timer, | 356 | .timer = &armadillo5x0_timer, |
357 | .init_machine = armadillo5x0_init, | 357 | .init_machine = armadillo5x0_init, |
358 | MACHINE_END | 358 | MACHINE_END |
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c index 577ee83d1f60..fe5c4217322e 100644 --- a/arch/arm/mach-mx3/clock-imx35.c +++ b/arch/arm/mach-mx3/clock-imx35.c | |||
@@ -273,6 +273,19 @@ static unsigned long get_rate_csi(struct clk *clk) | |||
273 | return rate / get_3_3_div((pdr2 >> 16) & 0x3f); | 273 | return rate / get_3_3_div((pdr2 >> 16) & 0x3f); |
274 | } | 274 | } |
275 | 275 | ||
276 | static unsigned long get_rate_otg(struct clk *clk) | ||
277 | { | ||
278 | unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); | ||
279 | unsigned long rate; | ||
280 | |||
281 | if (pdr4 & (1 << 9)) | ||
282 | rate = get_rate_arm(); | ||
283 | else | ||
284 | rate = get_rate_ppll(); | ||
285 | |||
286 | return rate / get_3_3_div((pdr4 >> 22) & 0x3f); | ||
287 | } | ||
288 | |||
276 | static unsigned long get_rate_ipg_per(struct clk *clk) | 289 | static unsigned long get_rate_ipg_per(struct clk *clk) |
277 | { | 290 | { |
278 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); | 291 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); |
@@ -365,7 +378,7 @@ DEFINE_CLOCK(ssi2_clk, 1, CCM_CGR2, 14, get_rate_ssi, NULL); | |||
365 | DEFINE_CLOCK(uart1_clk, 0, CCM_CGR2, 16, get_rate_uart, NULL); | 378 | DEFINE_CLOCK(uart1_clk, 0, CCM_CGR2, 16, get_rate_uart, NULL); |
366 | DEFINE_CLOCK(uart2_clk, 1, CCM_CGR2, 18, get_rate_uart, NULL); | 379 | DEFINE_CLOCK(uart2_clk, 1, CCM_CGR2, 18, get_rate_uart, NULL); |
367 | DEFINE_CLOCK(uart3_clk, 2, CCM_CGR2, 20, get_rate_uart, NULL); | 380 | DEFINE_CLOCK(uart3_clk, 2, CCM_CGR2, 20, get_rate_uart, NULL); |
368 | DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, NULL, NULL); | 381 | DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, get_rate_otg, NULL); |
369 | DEFINE_CLOCK(wdog_clk, 0, CCM_CGR2, 24, NULL, NULL); | 382 | DEFINE_CLOCK(wdog_clk, 0, CCM_CGR2, 24, NULL, NULL); |
370 | DEFINE_CLOCK(max_clk, 0, CCM_CGR2, 26, NULL, NULL); | 383 | DEFINE_CLOCK(max_clk, 0, CCM_CGR2, 26, NULL, NULL); |
371 | DEFINE_CLOCK(admux_clk, 0, CCM_CGR2, 30, NULL, NULL); | 384 | DEFINE_CLOCK(admux_clk, 0, CCM_CGR2, 30, NULL, NULL); |
@@ -426,7 +439,10 @@ static struct clk_lookup lookups[] = { | |||
426 | _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) | 439 | _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) |
427 | _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) | 440 | _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) |
428 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) | 441 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) |
429 | _REGISTER_CLOCK(NULL, "usbotg", usbotg_clk) | 442 | _REGISTER_CLOCK("mxc-ehci.0", "usb", usbotg_clk) |
443 | _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk) | ||
444 | _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk) | ||
445 | _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk) | ||
430 | _REGISTER_CLOCK("mxc_wdt.0", NULL, wdog_clk) | 446 | _REGISTER_CLOCK("mxc_wdt.0", NULL, wdog_clk) |
431 | _REGISTER_CLOCK(NULL, "max", max_clk) | 447 | _REGISTER_CLOCK(NULL, "max", max_clk) |
432 | _REGISTER_CLOCK(NULL, "admux", admux_clk) | 448 | _REGISTER_CLOCK(NULL, "admux", admux_clk) |
@@ -456,7 +472,7 @@ int __init mx35_clocks_init() | |||
456 | __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2); | 472 | __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2); |
457 | __raw_writel(0, CCM_BASE + CCM_CGR3); | 473 | __raw_writel(0, CCM_BASE + CCM_CGR3); |
458 | 474 | ||
459 | mxc_timer_init(&gpt_clk); | 475 | mxc_timer_init(&gpt_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); |
460 | 476 | ||
461 | return 0; | 477 | return 0; |
462 | } | 478 | } |
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c index 8b14239724c9..06bd6180bfc3 100644 --- a/arch/arm/mach-mx3/clock.c +++ b/arch/arm/mach-mx3/clock.c | |||
@@ -29,6 +29,7 @@ | |||
29 | 29 | ||
30 | #include <mach/clock.h> | 30 | #include <mach/clock.h> |
31 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
32 | #include <mach/mx31.h> | ||
32 | #include <mach/common.h> | 33 | #include <mach/common.h> |
33 | 34 | ||
34 | #include "crm_regs.h" | 35 | #include "crm_regs.h" |
@@ -402,6 +403,11 @@ static unsigned long clk_ckih_get_rate(struct clk *clk) | |||
402 | return ckih_rate; | 403 | return ckih_rate; |
403 | } | 404 | } |
404 | 405 | ||
406 | static unsigned long clk_ckil_get_rate(struct clk *clk) | ||
407 | { | ||
408 | return CKIL_CLK_FREQ; | ||
409 | } | ||
410 | |||
405 | static struct clk ckih_clk = { | 411 | static struct clk ckih_clk = { |
406 | .get_rate = clk_ckih_get_rate, | 412 | .get_rate = clk_ckih_get_rate, |
407 | }; | 413 | }; |
@@ -508,6 +514,7 @@ DEFINE_CLOCK(usb_clk1, 0, NULL, 0, usb_get_rate, NULL, &usb_pll_clk) | |||
508 | DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk); | 514 | DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk); |
509 | DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); | 515 | DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); |
510 | DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); | 516 | DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); |
517 | DEFINE_CLOCK(ckil_clk, 0, NULL, 0, clk_ckil_get_rate, NULL, NULL); | ||
511 | 518 | ||
512 | #define _REGISTER_CLOCK(d, n, c) \ | 519 | #define _REGISTER_CLOCK(d, n, c) \ |
513 | { \ | 520 | { \ |
@@ -518,9 +525,9 @@ DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); | |||
518 | 525 | ||
519 | static struct clk_lookup lookups[] = { | 526 | static struct clk_lookup lookups[] = { |
520 | _REGISTER_CLOCK(NULL, "emi", emi_clk) | 527 | _REGISTER_CLOCK(NULL, "emi", emi_clk) |
521 | _REGISTER_CLOCK(NULL, "cspi", cspi1_clk) | 528 | _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) |
522 | _REGISTER_CLOCK(NULL, "cspi", cspi2_clk) | 529 | _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk) |
523 | _REGISTER_CLOCK(NULL, "cspi", cspi3_clk) | 530 | _REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk) |
524 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) | 531 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) |
525 | _REGISTER_CLOCK(NULL, "pwm", pwm_clk) | 532 | _REGISTER_CLOCK(NULL, "pwm", pwm_clk) |
526 | _REGISTER_CLOCK(NULL, "wdog", wdog_clk) | 533 | _REGISTER_CLOCK(NULL, "wdog", wdog_clk) |
@@ -531,6 +538,12 @@ static struct clk_lookup lookups[] = { | |||
531 | _REGISTER_CLOCK("ipu-core", NULL, ipu_clk) | 538 | _REGISTER_CLOCK("ipu-core", NULL, ipu_clk) |
532 | _REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk) | 539 | _REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk) |
533 | _REGISTER_CLOCK(NULL, "kpp", kpp_clk) | 540 | _REGISTER_CLOCK(NULL, "kpp", kpp_clk) |
541 | _REGISTER_CLOCK("mxc-ehci.0", "usb", usb_clk1) | ||
542 | _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_clk2) | ||
543 | _REGISTER_CLOCK("mxc-ehci.1", "usb", usb_clk1) | ||
544 | _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_clk2) | ||
545 | _REGISTER_CLOCK("mxc-ehci.2", "usb", usb_clk1) | ||
546 | _REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_clk2) | ||
534 | _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1) | 547 | _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1) |
535 | _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2) | 548 | _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2) |
536 | _REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk) | 549 | _REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk) |
@@ -559,6 +572,7 @@ static struct clk_lookup lookups[] = { | |||
559 | _REGISTER_CLOCK(NULL, "iim", iim_clk) | 572 | _REGISTER_CLOCK(NULL, "iim", iim_clk) |
560 | _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk) | 573 | _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk) |
561 | _REGISTER_CLOCK(NULL, "mbx", mbx_clk) | 574 | _REGISTER_CLOCK(NULL, "mbx", mbx_clk) |
575 | _REGISTER_CLOCK("mxc_rtc", NULL, ckil_clk) | ||
562 | }; | 576 | }; |
563 | 577 | ||
564 | int __init mx31_clocks_init(unsigned long fref) | 578 | int __init mx31_clocks_init(unsigned long fref) |
@@ -609,7 +623,7 @@ int __init mx31_clocks_init(unsigned long fref) | |||
609 | __raw_writel(reg, MXC_CCM_PMCR1); | 623 | __raw_writel(reg, MXC_CCM_PMCR1); |
610 | } | 624 | } |
611 | 625 | ||
612 | mxc_timer_init(&ipg_clk); | 626 | mxc_timer_init(&ipg_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); |
613 | 627 | ||
614 | return 0; | 628 | return 0; |
615 | } | 629 | } |
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index 9e87e08fb121..8a577f367250 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c | |||
@@ -129,19 +129,17 @@ struct platform_device mxc_uart_device4 = { | |||
129 | 129 | ||
130 | /* GPIO port description */ | 130 | /* GPIO port description */ |
131 | static struct mxc_gpio_port imx_gpio_ports[] = { | 131 | static struct mxc_gpio_port imx_gpio_ports[] = { |
132 | [0] = { | 132 | { |
133 | .chip.label = "gpio-0", | 133 | .chip.label = "gpio-0", |
134 | .base = IO_ADDRESS(GPIO1_BASE_ADDR), | 134 | .base = IO_ADDRESS(GPIO1_BASE_ADDR), |
135 | .irq = MXC_INT_GPIO1, | 135 | .irq = MXC_INT_GPIO1, |
136 | .virtual_irq_start = MXC_GPIO_IRQ_START, | 136 | .virtual_irq_start = MXC_GPIO_IRQ_START, |
137 | }, | 137 | }, { |
138 | [1] = { | ||
139 | .chip.label = "gpio-1", | 138 | .chip.label = "gpio-1", |
140 | .base = IO_ADDRESS(GPIO2_BASE_ADDR), | 139 | .base = IO_ADDRESS(GPIO2_BASE_ADDR), |
141 | .irq = MXC_INT_GPIO2, | 140 | .irq = MXC_INT_GPIO2, |
142 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32, | 141 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32, |
143 | }, | 142 | }, { |
144 | [2] = { | ||
145 | .chip.label = "gpio-2", | 143 | .chip.label = "gpio-2", |
146 | .base = IO_ADDRESS(GPIO3_BASE_ADDR), | 144 | .base = IO_ADDRESS(GPIO3_BASE_ADDR), |
147 | .irq = MXC_INT_GPIO3, | 145 | .irq = MXC_INT_GPIO3, |
@@ -173,11 +171,11 @@ static struct resource mxc_nand_resources[] = { | |||
173 | { | 171 | { |
174 | .start = 0, /* runtime dependent */ | 172 | .start = 0, /* runtime dependent */ |
175 | .end = 0, | 173 | .end = 0, |
176 | .flags = IORESOURCE_MEM | 174 | .flags = IORESOURCE_MEM, |
177 | }, { | 175 | }, { |
178 | .start = MXC_INT_NANDFC, | 176 | .start = MXC_INT_NANDFC, |
179 | .end = MXC_INT_NANDFC, | 177 | .end = MXC_INT_NANDFC, |
180 | .flags = IORESOURCE_IRQ | 178 | .flags = IORESOURCE_IRQ, |
181 | }, | 179 | }, |
182 | }; | 180 | }; |
183 | 181 | ||
@@ -193,8 +191,7 @@ static struct resource mxc_i2c0_resources[] = { | |||
193 | .start = I2C_BASE_ADDR, | 191 | .start = I2C_BASE_ADDR, |
194 | .end = I2C_BASE_ADDR + SZ_4K - 1, | 192 | .end = I2C_BASE_ADDR + SZ_4K - 1, |
195 | .flags = IORESOURCE_MEM, | 193 | .flags = IORESOURCE_MEM, |
196 | }, | 194 | }, { |
197 | { | ||
198 | .start = MXC_INT_I2C, | 195 | .start = MXC_INT_I2C, |
199 | .end = MXC_INT_I2C, | 196 | .end = MXC_INT_I2C, |
200 | .flags = IORESOURCE_IRQ, | 197 | .flags = IORESOURCE_IRQ, |
@@ -213,8 +210,7 @@ static struct resource mxc_i2c1_resources[] = { | |||
213 | .start = I2C2_BASE_ADDR, | 210 | .start = I2C2_BASE_ADDR, |
214 | .end = I2C2_BASE_ADDR + SZ_4K - 1, | 211 | .end = I2C2_BASE_ADDR + SZ_4K - 1, |
215 | .flags = IORESOURCE_MEM, | 212 | .flags = IORESOURCE_MEM, |
216 | }, | 213 | }, { |
217 | { | ||
218 | .start = MXC_INT_I2C2, | 214 | .start = MXC_INT_I2C2, |
219 | .end = MXC_INT_I2C2, | 215 | .end = MXC_INT_I2C2, |
220 | .flags = IORESOURCE_IRQ, | 216 | .flags = IORESOURCE_IRQ, |
@@ -233,8 +229,7 @@ static struct resource mxc_i2c2_resources[] = { | |||
233 | .start = I2C3_BASE_ADDR, | 229 | .start = I2C3_BASE_ADDR, |
234 | .end = I2C3_BASE_ADDR + SZ_4K - 1, | 230 | .end = I2C3_BASE_ADDR + SZ_4K - 1, |
235 | .flags = IORESOURCE_MEM, | 231 | .flags = IORESOURCE_MEM, |
236 | }, | 232 | }, { |
237 | { | ||
238 | .start = MXC_INT_I2C3, | 233 | .start = MXC_INT_I2C3, |
239 | .end = MXC_INT_I2C3, | 234 | .end = MXC_INT_I2C3, |
240 | .flags = IORESOURCE_IRQ, | 235 | .flags = IORESOURCE_IRQ, |
@@ -371,8 +366,8 @@ struct platform_device mx3_camera = { | |||
371 | 366 | ||
372 | static struct resource otg_resources[] = { | 367 | static struct resource otg_resources[] = { |
373 | { | 368 | { |
374 | .start = OTG_BASE_ADDR, | 369 | .start = MX31_OTG_BASE_ADDR, |
375 | .end = OTG_BASE_ADDR + 0x1ff, | 370 | .end = MX31_OTG_BASE_ADDR + 0x1ff, |
376 | .flags = IORESOURCE_MEM, | 371 | .flags = IORESOURCE_MEM, |
377 | }, { | 372 | }, { |
378 | .start = MXC_INT_USB3, | 373 | .start = MXC_INT_USB3, |
@@ -395,16 +390,142 @@ struct platform_device mxc_otg_udc_device = { | |||
395 | .num_resources = ARRAY_SIZE(otg_resources), | 390 | .num_resources = ARRAY_SIZE(otg_resources), |
396 | }; | 391 | }; |
397 | 392 | ||
393 | /* OTG host */ | ||
394 | struct platform_device mxc_otg_host = { | ||
395 | .name = "mxc-ehci", | ||
396 | .id = 0, | ||
397 | .dev = { | ||
398 | .coherent_dma_mask = 0xffffffff, | ||
399 | .dma_mask = &otg_dmamask, | ||
400 | }, | ||
401 | .resource = otg_resources, | ||
402 | .num_resources = ARRAY_SIZE(otg_resources), | ||
403 | }; | ||
404 | |||
405 | /* USB host 1 */ | ||
406 | |||
407 | static u64 usbh1_dmamask = ~(u32)0; | ||
408 | |||
409 | static struct resource mxc_usbh1_resources[] = { | ||
410 | { | ||
411 | .start = MX31_OTG_BASE_ADDR + 0x200, | ||
412 | .end = MX31_OTG_BASE_ADDR + 0x3ff, | ||
413 | .flags = IORESOURCE_MEM, | ||
414 | }, { | ||
415 | .start = MXC_INT_USB1, | ||
416 | .end = MXC_INT_USB1, | ||
417 | .flags = IORESOURCE_IRQ, | ||
418 | }, | ||
419 | }; | ||
420 | |||
421 | struct platform_device mxc_usbh1 = { | ||
422 | .name = "mxc-ehci", | ||
423 | .id = 1, | ||
424 | .dev = { | ||
425 | .coherent_dma_mask = 0xffffffff, | ||
426 | .dma_mask = &usbh1_dmamask, | ||
427 | }, | ||
428 | .resource = mxc_usbh1_resources, | ||
429 | .num_resources = ARRAY_SIZE(mxc_usbh1_resources), | ||
430 | }; | ||
431 | |||
432 | /* USB host 2 */ | ||
433 | static u64 usbh2_dmamask = ~(u32)0; | ||
434 | |||
435 | static struct resource mxc_usbh2_resources[] = { | ||
436 | { | ||
437 | .start = MX31_OTG_BASE_ADDR + 0x400, | ||
438 | .end = MX31_OTG_BASE_ADDR + 0x5ff, | ||
439 | .flags = IORESOURCE_MEM, | ||
440 | }, { | ||
441 | .start = MXC_INT_USB2, | ||
442 | .end = MXC_INT_USB2, | ||
443 | .flags = IORESOURCE_IRQ, | ||
444 | }, | ||
445 | }; | ||
446 | |||
447 | struct platform_device mxc_usbh2 = { | ||
448 | .name = "mxc-ehci", | ||
449 | .id = 2, | ||
450 | .dev = { | ||
451 | .coherent_dma_mask = 0xffffffff, | ||
452 | .dma_mask = &usbh2_dmamask, | ||
453 | }, | ||
454 | .resource = mxc_usbh2_resources, | ||
455 | .num_resources = ARRAY_SIZE(mxc_usbh2_resources), | ||
456 | }; | ||
457 | |||
458 | /* | ||
459 | * SPI master controller | ||
460 | * 3 channels | ||
461 | */ | ||
462 | static struct resource imx_spi_0_resources[] = { | ||
463 | { | ||
464 | .start = CSPI1_BASE_ADDR, | ||
465 | .end = CSPI1_BASE_ADDR + SZ_4K - 1, | ||
466 | .flags = IORESOURCE_MEM, | ||
467 | }, { | ||
468 | .start = MXC_INT_CSPI1, | ||
469 | .end = MXC_INT_CSPI1, | ||
470 | .flags = IORESOURCE_IRQ, | ||
471 | }, | ||
472 | }; | ||
473 | |||
474 | static struct resource imx_spi_1_resources[] = { | ||
475 | { | ||
476 | .start = CSPI2_BASE_ADDR, | ||
477 | .end = CSPI2_BASE_ADDR + SZ_4K - 1, | ||
478 | .flags = IORESOURCE_MEM, | ||
479 | }, { | ||
480 | .start = MXC_INT_CSPI2, | ||
481 | .end = MXC_INT_CSPI2, | ||
482 | .flags = IORESOURCE_IRQ, | ||
483 | }, | ||
484 | }; | ||
485 | |||
486 | static struct resource imx_spi_2_resources[] = { | ||
487 | { | ||
488 | .start = CSPI3_BASE_ADDR, | ||
489 | .end = CSPI3_BASE_ADDR + SZ_4K - 1, | ||
490 | .flags = IORESOURCE_MEM, | ||
491 | }, { | ||
492 | .start = MXC_INT_CSPI3, | ||
493 | .end = MXC_INT_CSPI3, | ||
494 | .flags = IORESOURCE_IRQ, | ||
495 | }, | ||
496 | }; | ||
497 | |||
498 | struct platform_device imx_spi_device0 = { | ||
499 | .name = "spi_imx", | ||
500 | .id = 0, | ||
501 | .num_resources = ARRAY_SIZE(imx_spi_0_resources), | ||
502 | .resource = imx_spi_0_resources, | ||
503 | }; | ||
504 | |||
505 | struct platform_device imx_spi_device1 = { | ||
506 | .name = "spi_imx", | ||
507 | .id = 1, | ||
508 | .num_resources = ARRAY_SIZE(imx_spi_1_resources), | ||
509 | .resource = imx_spi_1_resources, | ||
510 | }; | ||
511 | |||
512 | struct platform_device imx_spi_device2 = { | ||
513 | .name = "spi_imx", | ||
514 | .id = 2, | ||
515 | .num_resources = ARRAY_SIZE(imx_spi_2_resources), | ||
516 | .resource = imx_spi_2_resources, | ||
517 | }; | ||
518 | |||
398 | #ifdef CONFIG_ARCH_MX35 | 519 | #ifdef CONFIG_ARCH_MX35 |
399 | static struct resource mxc_fec_resources[] = { | 520 | static struct resource mxc_fec_resources[] = { |
400 | { | 521 | { |
401 | .start = MXC_FEC_BASE_ADDR, | 522 | .start = MXC_FEC_BASE_ADDR, |
402 | .end = MXC_FEC_BASE_ADDR + 0xfff, | 523 | .end = MXC_FEC_BASE_ADDR + 0xfff, |
403 | .flags = IORESOURCE_MEM | 524 | .flags = IORESOURCE_MEM, |
404 | }, { | 525 | }, { |
405 | .start = MXC_INT_FEC, | 526 | .start = MXC_INT_FEC, |
406 | .end = MXC_INT_FEC, | 527 | .end = MXC_INT_FEC, |
407 | .flags = IORESOURCE_IRQ | 528 | .flags = IORESOURCE_IRQ, |
408 | }, | 529 | }, |
409 | }; | 530 | }; |
410 | 531 | ||
@@ -426,6 +547,14 @@ static int mx3_devices_init(void) | |||
426 | if (cpu_is_mx35()) { | 547 | if (cpu_is_mx35()) { |
427 | mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; | 548 | mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; |
428 | mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff; | 549 | mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff; |
550 | otg_resources[0].start = MX35_OTG_BASE_ADDR; | ||
551 | otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff; | ||
552 | otg_resources[1].start = MXC_INT_USBOTG; | ||
553 | otg_resources[1].end = MXC_INT_USBOTG; | ||
554 | mxc_usbh1_resources[0].start = MX35_OTG_BASE_ADDR + 0x400; | ||
555 | mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff; | ||
556 | mxc_usbh1_resources[1].start = MXC_INT_USBHS; | ||
557 | mxc_usbh1_resources[1].end = MXC_INT_USBHS; | ||
429 | } | 558 | } |
430 | 559 | ||
431 | return 0; | 560 | return 0; |
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h index ffd494ddd4ac..79f2be45d139 100644 --- a/arch/arm/mach-mx3/devices.h +++ b/arch/arm/mach-mx3/devices.h | |||
@@ -16,5 +16,11 @@ extern struct platform_device mxc_fec_device; | |||
16 | extern struct platform_device mxcsdhc_device0; | 16 | extern struct platform_device mxcsdhc_device0; |
17 | extern struct platform_device mxcsdhc_device1; | 17 | extern struct platform_device mxcsdhc_device1; |
18 | extern struct platform_device mxc_otg_udc_device; | 18 | extern struct platform_device mxc_otg_udc_device; |
19 | extern struct platform_device mxc_otg_host; | ||
20 | extern struct platform_device mxc_usbh1; | ||
21 | extern struct platform_device mxc_usbh2; | ||
19 | extern struct platform_device mxc_rnga_device; | 22 | extern struct platform_device mxc_rnga_device; |
23 | extern struct platform_device imx_spi_device0; | ||
24 | extern struct platform_device imx_spi_device1; | ||
25 | extern struct platform_device imx_spi_device2; | ||
20 | 26 | ||
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c index 1f5fdd456cb9..ad5a1122d765 100644 --- a/arch/arm/mach-mx3/mm.c +++ b/arch/arm/mach-mx3/mm.c | |||
@@ -30,6 +30,7 @@ | |||
30 | 30 | ||
31 | #include <mach/common.h> | 31 | #include <mach/common.h> |
32 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
33 | #include <mach/iomux-v3.h> | ||
33 | 34 | ||
34 | /*! | 35 | /*! |
35 | * @file mm.c | 36 | * @file mm.c |
@@ -75,6 +76,7 @@ static struct map_desc mxc_io_desc[] __initdata = { | |||
75 | void __init mx31_map_io(void) | 76 | void __init mx31_map_io(void) |
76 | { | 77 | { |
77 | mxc_set_cpu_type(MXC_CPU_MX31); | 78 | mxc_set_cpu_type(MXC_CPU_MX31); |
79 | mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); | ||
78 | 80 | ||
79 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | 81 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); |
80 | } | 82 | } |
@@ -82,10 +84,22 @@ void __init mx31_map_io(void) | |||
82 | void __init mx35_map_io(void) | 84 | void __init mx35_map_io(void) |
83 | { | 85 | { |
84 | mxc_set_cpu_type(MXC_CPU_MX35); | 86 | mxc_set_cpu_type(MXC_CPU_MX35); |
87 | mxc_iomux_v3_init(IO_ADDRESS(IOMUXC_BASE_ADDR)); | ||
88 | mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); | ||
85 | 89 | ||
86 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | 90 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); |
87 | } | 91 | } |
88 | 92 | ||
93 | void __init mx31_init_irq(void) | ||
94 | { | ||
95 | mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR)); | ||
96 | } | ||
97 | |||
98 | void __init mx35_init_irq(void) | ||
99 | { | ||
100 | mx31_init_irq(); | ||
101 | } | ||
102 | |||
89 | #ifdef CONFIG_CACHE_L2X0 | 103 | #ifdef CONFIG_CACHE_L2X0 |
90 | static int mxc_init_l2x0(void) | 104 | static int mxc_init_l2x0(void) |
91 | { | 105 | { |
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c index 30e2767a78ae..0497c152be18 100644 --- a/arch/arm/mach-mx3/mx31ads.c +++ b/arch/arm/mach-mx3/mx31ads.c | |||
@@ -517,7 +517,7 @@ static void __init mx31ads_map_io(void) | |||
517 | 517 | ||
518 | static void __init mx31ads_init_irq(void) | 518 | static void __init mx31ads_init_irq(void) |
519 | { | 519 | { |
520 | mxc_init_irq(); | 520 | mx31_init_irq(); |
521 | mx31ads_init_expio(); | 521 | mx31ads_init_expio(); |
522 | } | 522 | } |
523 | 523 | ||
diff --git a/arch/arm/mach-mx3/mx31lilly.c b/arch/arm/mach-mx3/mx31lilly.c index 6ab2f163cb95..423025150f6f 100644 --- a/arch/arm/mach-mx3/mx31lilly.c +++ b/arch/arm/mach-mx3/mx31lilly.c | |||
@@ -148,7 +148,7 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131") | |||
148 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 148 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
149 | .boot_params = PHYS_OFFSET + 0x100, | 149 | .boot_params = PHYS_OFFSET + 0x100, |
150 | .map_io = mx31_map_io, | 150 | .map_io = mx31_map_io, |
151 | .init_irq = mxc_init_irq, | 151 | .init_irq = mx31_init_irq, |
152 | .init_machine = mx31lilly_board_init, | 152 | .init_machine = mx31lilly_board_init, |
153 | .timer = &mx31lilly_timer, | 153 | .timer = &mx31lilly_timer, |
154 | MACHINE_END | 154 | MACHINE_END |
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c index 86fe70fa3e13..a8d57decdfdb 100644 --- a/arch/arm/mach-mx3/mx31lite.c +++ b/arch/arm/mach-mx3/mx31lite.c | |||
@@ -71,12 +71,11 @@ static struct smsc911x_platform_config smsc911x_config = { | |||
71 | }; | 71 | }; |
72 | 72 | ||
73 | static struct resource smsc911x_resources[] = { | 73 | static struct resource smsc911x_resources[] = { |
74 | [0] = { | 74 | { |
75 | .start = CS4_BASE_ADDR, | 75 | .start = CS4_BASE_ADDR, |
76 | .end = CS4_BASE_ADDR + 0x100, | 76 | .end = CS4_BASE_ADDR + 0x100, |
77 | .flags = IORESOURCE_MEM, | 77 | .flags = IORESOURCE_MEM, |
78 | }, | 78 | }, { |
79 | [1] = { | ||
80 | .start = IOMUX_TO_IRQ(MX31_PIN_SFS6), | 79 | .start = IOMUX_TO_IRQ(MX31_PIN_SFS6), |
81 | .end = IOMUX_TO_IRQ(MX31_PIN_SFS6), | 80 | .end = IOMUX_TO_IRQ(MX31_PIN_SFS6), |
82 | .flags = IORESOURCE_IRQ, | 81 | .flags = IORESOURCE_IRQ, |
@@ -162,7 +161,7 @@ MACHINE_START(MX31LITE, "LogicPD MX31 LITEKIT") | |||
162 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 161 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
163 | .boot_params = PHYS_OFFSET + 0x100, | 162 | .boot_params = PHYS_OFFSET + 0x100, |
164 | .map_io = mx31lite_map_io, | 163 | .map_io = mx31lite_map_io, |
165 | .init_irq = mxc_init_irq, | 164 | .init_irq = mx31_init_irq, |
166 | .init_machine = mxc_board_init, | 165 | .init_machine = mxc_board_init, |
167 | .timer = &mx31lite_timer, | 166 | .timer = &mx31lite_timer, |
168 | MACHINE_END | 167 | MACHINE_END |
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c index b48581e7dedd..5592cdb8d0ad 100644 --- a/arch/arm/mach-mx3/mx31moboard-devboard.c +++ b/arch/arm/mach-mx3/mx31moboard-devboard.c | |||
@@ -16,7 +16,6 @@ | |||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
17 | */ | 17 | */ |
18 | 18 | ||
19 | #include <linux/fsl_devices.h> | ||
20 | #include <linux/gpio.h> | 19 | #include <linux/gpio.h> |
21 | #include <linux/init.h> | 20 | #include <linux/init.h> |
22 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
@@ -40,18 +39,6 @@ static unsigned int devboard_pins[] = { | |||
40 | MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0, | 39 | MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0, |
41 | MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD, | 40 | MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD, |
42 | MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29, | 41 | MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29, |
43 | /* USB OTG */ | ||
44 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | ||
45 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | ||
46 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | ||
47 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | ||
48 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | ||
49 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | ||
50 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | ||
51 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | ||
52 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, | ||
53 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, | ||
54 | MX31_PIN_USB_OC__GPIO1_30, | ||
55 | }; | 42 | }; |
56 | 43 | ||
57 | static struct imxuart_platform_data uart_pdata = { | 44 | static struct imxuart_platform_data uart_pdata = { |
@@ -111,33 +98,6 @@ static struct imxmmc_platform_data sdhc2_pdata = { | |||
111 | .exit = devboard_sdhc2_exit, | 98 | .exit = devboard_sdhc2_exit, |
112 | }; | 99 | }; |
113 | 100 | ||
114 | static struct fsl_usb2_platform_data usb_pdata = { | ||
115 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
116 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
117 | }; | ||
118 | |||
119 | #define OTG_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST) | ||
120 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) | ||
121 | |||
122 | static void devboard_usbotg_init(void) | ||
123 | { | ||
124 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, OTG_PAD_CFG); | ||
125 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, OTG_PAD_CFG); | ||
126 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, OTG_PAD_CFG); | ||
127 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, OTG_PAD_CFG); | ||
128 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, OTG_PAD_CFG); | ||
129 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, OTG_PAD_CFG); | ||
130 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, OTG_PAD_CFG); | ||
131 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, OTG_PAD_CFG); | ||
132 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, OTG_PAD_CFG); | ||
133 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, OTG_PAD_CFG); | ||
134 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, OTG_PAD_CFG); | ||
135 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, OTG_PAD_CFG); | ||
136 | |||
137 | gpio_request(OTG_EN_B, "usb-udc-en"); | ||
138 | gpio_direction_output(OTG_EN_B, 0); | ||
139 | } | ||
140 | |||
141 | /* | 101 | /* |
142 | * system init for baseboard usage. Will be called by mx31moboard init. | 102 | * system init for baseboard usage. Will be called by mx31moboard init. |
143 | */ | 103 | */ |
@@ -151,7 +111,4 @@ void __init mx31moboard_devboard_init(void) | |||
151 | mxc_register_device(&mxc_uart_device1, &uart_pdata); | 111 | mxc_register_device(&mxc_uart_device1, &uart_pdata); |
152 | 112 | ||
153 | mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); | 113 | mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); |
154 | |||
155 | devboard_usbotg_init(); | ||
156 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
157 | } | 114 | } |
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c index 901fb0166c0e..2bfaffb344f0 100644 --- a/arch/arm/mach-mx3/mx31moboard-marxbot.c +++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c | |||
@@ -16,7 +16,6 @@ | |||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
17 | */ | 17 | */ |
18 | 18 | ||
19 | #include <linux/fsl_devices.h> | ||
20 | #include <linux/gpio.h> | 19 | #include <linux/gpio.h> |
21 | #include <linux/init.h> | 20 | #include <linux/init.h> |
22 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
@@ -48,18 +47,8 @@ static unsigned int marxbot_pins[] = { | |||
48 | MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC, | 47 | MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC, |
49 | MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1, | 48 | MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1, |
50 | MX31_PIN_TXD2__GPIO1_28, | 49 | MX31_PIN_TXD2__GPIO1_28, |
51 | /* USB OTG */ | 50 | /* dsPIC resets */ |
52 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | 51 | MX31_PIN_STXD5__GPIO1_21, MX31_PIN_SRXD5__GPIO1_22, |
53 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | ||
54 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | ||
55 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | ||
56 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | ||
57 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | ||
58 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | ||
59 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | ||
60 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, | ||
61 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, | ||
62 | MX31_PIN_USB_OC__GPIO1_30, | ||
63 | }; | 52 | }; |
64 | 53 | ||
65 | #define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR) | 54 | #define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR) |
@@ -115,31 +104,20 @@ static struct imxmmc_platform_data sdhc2_pdata = { | |||
115 | .exit = marxbot_sdhc2_exit, | 104 | .exit = marxbot_sdhc2_exit, |
116 | }; | 105 | }; |
117 | 106 | ||
118 | static struct fsl_usb2_platform_data usb_pdata = { | 107 | #define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_STXD5) |
119 | .operating_mode = FSL_USB2_DR_DEVICE, | 108 | #define DSPICS_RST_B IOMUX_TO_GPIO(MX31_PIN_SRXD5) |
120 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
121 | }; | ||
122 | |||
123 | #define OTG_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST) | ||
124 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) | ||
125 | 109 | ||
126 | static void marxbot_usbotg_init(void) | 110 | static void dspics_resets_init(void) |
127 | { | 111 | { |
128 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, OTG_PAD_CFG); | 112 | if (!gpio_request(TRSLAT_RST_B, "translator-rst")) { |
129 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, OTG_PAD_CFG); | 113 | gpio_direction_output(TRSLAT_RST_B, 1); |
130 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, OTG_PAD_CFG); | 114 | gpio_export(TRSLAT_RST_B, false); |
131 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, OTG_PAD_CFG); | 115 | } |
132 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, OTG_PAD_CFG); | 116 | |
133 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, OTG_PAD_CFG); | 117 | if (!gpio_request(DSPICS_RST_B, "dspics-rst")) { |
134 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, OTG_PAD_CFG); | 118 | gpio_direction_output(DSPICS_RST_B, 1); |
135 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, OTG_PAD_CFG); | 119 | gpio_export(DSPICS_RST_B, false); |
136 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, OTG_PAD_CFG); | 120 | } |
137 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, OTG_PAD_CFG); | ||
138 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, OTG_PAD_CFG); | ||
139 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, OTG_PAD_CFG); | ||
140 | |||
141 | gpio_request(OTG_EN_B, "usb-udc-en"); | ||
142 | gpio_direction_output(OTG_EN_B, 0); | ||
143 | } | 121 | } |
144 | 122 | ||
145 | /* | 123 | /* |
@@ -152,8 +130,7 @@ void __init mx31moboard_marxbot_init(void) | |||
152 | mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins), | 130 | mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins), |
153 | "marxbot"); | 131 | "marxbot"); |
154 | 132 | ||
155 | mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); | 133 | dspics_resets_init(); |
156 | 134 | ||
157 | marxbot_usbotg_init(); | 135 | mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); |
158 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
159 | } | 136 | } |
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mx31moboard.c index 2a2da4739ecf..9243de54041a 100644 --- a/arch/arm/mach-mx3/mx31moboard.c +++ b/arch/arm/mach-mx3/mx31moboard.c | |||
@@ -16,9 +16,12 @@ | |||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
17 | */ | 17 | */ |
18 | 18 | ||
19 | #include <linux/delay.h> | ||
20 | #include <linux/fsl_devices.h> | ||
19 | #include <linux/gpio.h> | 21 | #include <linux/gpio.h> |
20 | #include <linux/init.h> | 22 | #include <linux/init.h> |
21 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
24 | #include <linux/leds.h> | ||
22 | #include <linux/memory.h> | 25 | #include <linux/memory.h> |
23 | #include <linux/mtd/physmap.h> | 26 | #include <linux/mtd/physmap.h> |
24 | #include <linux/mtd/partitions.h> | 27 | #include <linux/mtd/partitions.h> |
@@ -36,6 +39,7 @@ | |||
36 | #include <mach/iomux-mx3.h> | 39 | #include <mach/iomux-mx3.h> |
37 | #include <mach/i2c.h> | 40 | #include <mach/i2c.h> |
38 | #include <mach/mmc.h> | 41 | #include <mach/mmc.h> |
42 | #include <mach/mx31.h> | ||
39 | 43 | ||
40 | #include "devices.h" | 44 | #include "devices.h" |
41 | 45 | ||
@@ -55,6 +59,26 @@ static unsigned int moboard_pins[] = { | |||
55 | MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0, | 59 | MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0, |
56 | MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD, | 60 | MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD, |
57 | MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27, | 61 | MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27, |
62 | /* USB reset */ | ||
63 | MX31_PIN_GPIO1_0__GPIO1_0, | ||
64 | /* USB OTG */ | ||
65 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | ||
66 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | ||
67 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | ||
68 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | ||
69 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | ||
70 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | ||
71 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | ||
72 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | ||
73 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, | ||
74 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, | ||
75 | MX31_PIN_USB_OC__GPIO1_30, | ||
76 | /* LEDs */ | ||
77 | MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1, | ||
78 | MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3, | ||
79 | /* SEL */ | ||
80 | MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9, | ||
81 | MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11, | ||
58 | }; | 82 | }; |
59 | 83 | ||
60 | static struct physmap_flash_data mx31moboard_flash_data = { | 84 | static struct physmap_flash_data mx31moboard_flash_data = { |
@@ -142,8 +166,109 @@ static struct imxmmc_platform_data sdhc1_pdata = { | |||
142 | .exit = moboard_sdhc1_exit, | 166 | .exit = moboard_sdhc1_exit, |
143 | }; | 167 | }; |
144 | 168 | ||
169 | /* | ||
170 | * this pin is dedicated for all mx31moboard systems, so we do it here | ||
171 | */ | ||
172 | #define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0) | ||
173 | |||
174 | static void usb_xcvr_reset(void) | ||
175 | { | ||
176 | gpio_request(USB_RESET_B, "usb-reset"); | ||
177 | gpio_direction_output(USB_RESET_B, 0); | ||
178 | mdelay(1); | ||
179 | gpio_set_value(USB_RESET_B, 1); | ||
180 | } | ||
181 | |||
182 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | ||
183 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | ||
184 | |||
185 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) | ||
186 | |||
187 | static void moboard_usbotg_init(void) | ||
188 | { | ||
189 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); | ||
190 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); | ||
191 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); | ||
192 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); | ||
193 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); | ||
194 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); | ||
195 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); | ||
196 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); | ||
197 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); | ||
198 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); | ||
199 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); | ||
200 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); | ||
201 | |||
202 | gpio_request(OTG_EN_B, "usb-udc-en"); | ||
203 | gpio_direction_output(OTG_EN_B, 0); | ||
204 | } | ||
205 | |||
206 | static struct fsl_usb2_platform_data usb_pdata = { | ||
207 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
208 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
209 | }; | ||
210 | |||
211 | static struct gpio_led mx31moboard_leds[] = { | ||
212 | { | ||
213 | .name = "coreboard-led-0:red:running", | ||
214 | .default_trigger = "heartbeat", | ||
215 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SVEN0), | ||
216 | }, { | ||
217 | .name = "coreboard-led-1:red", | ||
218 | .gpio = IOMUX_TO_GPIO(MX31_PIN_STX0), | ||
219 | }, { | ||
220 | .name = "coreboard-led-2:red", | ||
221 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SRX0), | ||
222 | }, { | ||
223 | .name = "coreboard-led-3:red", | ||
224 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SIMPD0), | ||
225 | }, | ||
226 | }; | ||
227 | |||
228 | static struct gpio_led_platform_data mx31moboard_led_pdata = { | ||
229 | .num_leds = ARRAY_SIZE(mx31moboard_leds), | ||
230 | .leds = mx31moboard_leds, | ||
231 | }; | ||
232 | |||
233 | static struct platform_device mx31moboard_leds_device = { | ||
234 | .name = "leds-gpio", | ||
235 | .id = -1, | ||
236 | .dev = { | ||
237 | .platform_data = &mx31moboard_led_pdata, | ||
238 | }, | ||
239 | }; | ||
240 | |||
241 | #define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1) | ||
242 | #define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1) | ||
243 | #define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1) | ||
244 | #define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1) | ||
245 | |||
246 | static void mx31moboard_init_sel_gpios(void) | ||
247 | { | ||
248 | if (!gpio_request(SEL0, "sel0")) { | ||
249 | gpio_direction_input(SEL0); | ||
250 | gpio_export(SEL0, true); | ||
251 | } | ||
252 | |||
253 | if (!gpio_request(SEL1, "sel1")) { | ||
254 | gpio_direction_input(SEL1); | ||
255 | gpio_export(SEL1, true); | ||
256 | } | ||
257 | |||
258 | if (!gpio_request(SEL2, "sel2")) { | ||
259 | gpio_direction_input(SEL2); | ||
260 | gpio_export(SEL2, true); | ||
261 | } | ||
262 | |||
263 | if (!gpio_request(SEL3, "sel3")) { | ||
264 | gpio_direction_input(SEL3); | ||
265 | gpio_export(SEL3, true); | ||
266 | } | ||
267 | } | ||
268 | |||
145 | static struct platform_device *devices[] __initdata = { | 269 | static struct platform_device *devices[] __initdata = { |
146 | &mx31moboard_flash, | 270 | &mx31moboard_flash, |
271 | &mx31moboard_leds_device, | ||
147 | }; | 272 | }; |
148 | 273 | ||
149 | static int mx31moboard_baseboard; | 274 | static int mx31moboard_baseboard; |
@@ -162,11 +287,18 @@ static void __init mxc_board_init(void) | |||
162 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 287 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
163 | mxc_register_device(&mxc_uart_device4, &uart_pdata); | 288 | mxc_register_device(&mxc_uart_device4, &uart_pdata); |
164 | 289 | ||
290 | mx31moboard_init_sel_gpios(); | ||
291 | |||
165 | mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata); | 292 | mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata); |
166 | mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata); | 293 | mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata); |
167 | 294 | ||
168 | mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata); | 295 | mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata); |
169 | 296 | ||
297 | usb_xcvr_reset(); | ||
298 | |||
299 | moboard_usbotg_init(); | ||
300 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
301 | |||
170 | switch (mx31moboard_baseboard) { | 302 | switch (mx31moboard_baseboard) { |
171 | case MX31NOBOARD: | 303 | case MX31NOBOARD: |
172 | break; | 304 | break; |
@@ -197,7 +329,7 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") | |||
197 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 329 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
198 | .boot_params = PHYS_OFFSET + 0x100, | 330 | .boot_params = PHYS_OFFSET + 0x100, |
199 | .map_io = mx31_map_io, | 331 | .map_io = mx31_map_io, |
200 | .init_irq = mxc_init_irq, | 332 | .init_irq = mx31_init_irq, |
201 | .init_machine = mxc_board_init, | 333 | .init_machine = mxc_board_init, |
202 | .timer = &mx31moboard_timer, | 334 | .timer = &mx31moboard_timer, |
203 | MACHINE_END | 335 | MACHINE_END |
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mx31pdk.c index c19838d2e369..0f7a2f06bc2d 100644 --- a/arch/arm/mach-mx3/mx31pdk.c +++ b/arch/arm/mach-mx3/mx31pdk.c | |||
@@ -265,7 +265,7 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") | |||
265 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 265 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
266 | .boot_params = PHYS_OFFSET + 0x100, | 266 | .boot_params = PHYS_OFFSET + 0x100, |
267 | .map_io = mx31pdk_map_io, | 267 | .map_io = mx31pdk_map_io, |
268 | .init_irq = mxc_init_irq, | 268 | .init_irq = mx31_init_irq, |
269 | .init_machine = mxc_board_init, | 269 | .init_machine = mxc_board_init, |
270 | .timer = &mx31pdk_timer, | 270 | .timer = &mx31pdk_timer, |
271 | MACHINE_END | 271 | MACHINE_END |
diff --git a/arch/arm/mach-mx3/mx35pdk.c b/arch/arm/mach-mx3/mx35pdk.c index 6d15374414b9..6ff186e46ceb 100644 --- a/arch/arm/mach-mx3/mx35pdk.c +++ b/arch/arm/mach-mx3/mx35pdk.c | |||
@@ -98,7 +98,7 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK") | |||
98 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 98 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
99 | .boot_params = PHYS_OFFSET + 0x100, | 99 | .boot_params = PHYS_OFFSET + 0x100, |
100 | .map_io = mx35_map_io, | 100 | .map_io = mx35_map_io, |
101 | .init_irq = mxc_init_irq, | 101 | .init_irq = mx35_init_irq, |
102 | .init_machine = mxc_board_init, | 102 | .init_machine = mxc_board_init, |
103 | .timer = &mx35pdk_timer, | 103 | .timer = &mx35pdk_timer, |
104 | MACHINE_END | 104 | MACHINE_END |
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c index 840cfda341d0..6cbaabedf386 100644 --- a/arch/arm/mach-mx3/pcm037.c +++ b/arch/arm/mach-mx3/pcm037.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/spi/spi.h> | 32 | #include <linux/spi/spi.h> |
33 | #include <linux/irq.h> | 33 | #include <linux/irq.h> |
34 | #include <linux/fsl_devices.h> | 34 | #include <linux/fsl_devices.h> |
35 | #include <linux/can/platform/sja1000.h> | ||
35 | 36 | ||
36 | #include <media/soc_camera.h> | 37 | #include <media/soc_camera.h> |
37 | 38 | ||
@@ -169,6 +170,8 @@ static unsigned int pcm037_pins[] = { | |||
169 | MX31_PIN_CSI_MCLK__CSI_MCLK, | 170 | MX31_PIN_CSI_MCLK__CSI_MCLK, |
170 | MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, | 171 | MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, |
171 | MX31_PIN_CSI_VSYNC__CSI_VSYNC, | 172 | MX31_PIN_CSI_VSYNC__CSI_VSYNC, |
173 | /* GPIO */ | ||
174 | IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO), | ||
172 | }; | 175 | }; |
173 | 176 | ||
174 | static struct physmap_flash_data pcm037_flash_data = { | 177 | static struct physmap_flash_data pcm037_flash_data = { |
@@ -244,12 +247,11 @@ static struct imxuart_platform_data uart_pdata = { | |||
244 | }; | 247 | }; |
245 | 248 | ||
246 | static struct resource smsc911x_resources[] = { | 249 | static struct resource smsc911x_resources[] = { |
247 | [0] = { | 250 | { |
248 | .start = CS1_BASE_ADDR + 0x300, | 251 | .start = CS1_BASE_ADDR + 0x300, |
249 | .end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1, | 252 | .end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1, |
250 | .flags = IORESOURCE_MEM, | 253 | .flags = IORESOURCE_MEM, |
251 | }, | 254 | }, { |
252 | [1] = { | ||
253 | .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), | 255 | .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), |
254 | .end = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), | 256 | .end = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), |
255 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | 257 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, |
@@ -339,8 +341,7 @@ static struct i2c_board_info pcm037_i2c_devices[] = { | |||
339 | I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ | 341 | I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ |
340 | .platform_data = &board_eeprom, | 342 | .platform_data = &board_eeprom, |
341 | }, { | 343 | }, { |
342 | I2C_BOARD_INFO("rtc-pcf8563", 0x51), | 344 | I2C_BOARD_INFO("pcf8563", 0x51), |
343 | .type = "pcf8563", | ||
344 | } | 345 | } |
345 | }; | 346 | }; |
346 | 347 | ||
@@ -515,6 +516,33 @@ static struct mx3fb_platform_data mx3fb_pdata = { | |||
515 | .num_modes = ARRAY_SIZE(fb_modedb), | 516 | .num_modes = ARRAY_SIZE(fb_modedb), |
516 | }; | 517 | }; |
517 | 518 | ||
519 | static struct resource pcm970_sja1000_resources[] = { | ||
520 | { | ||
521 | .start = CS5_BASE_ADDR, | ||
522 | .end = CS5_BASE_ADDR + 0x100 - 1, | ||
523 | .flags = IORESOURCE_MEM, | ||
524 | }, { | ||
525 | .start = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)), | ||
526 | .end = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)), | ||
527 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, | ||
528 | }, | ||
529 | }; | ||
530 | |||
531 | struct sja1000_platform_data pcm970_sja1000_platform_data = { | ||
532 | .clock = 16000000 / 2, | ||
533 | .ocr = 0x40 | 0x18, | ||
534 | .cdr = 0x40, | ||
535 | }; | ||
536 | |||
537 | static struct platform_device pcm970_sja1000 = { | ||
538 | .name = "sja1000_platform", | ||
539 | .dev = { | ||
540 | .platform_data = &pcm970_sja1000_platform_data, | ||
541 | }, | ||
542 | .resource = pcm970_sja1000_resources, | ||
543 | .num_resources = ARRAY_SIZE(pcm970_sja1000_resources), | ||
544 | }; | ||
545 | |||
518 | /* | 546 | /* |
519 | * Board specific initialization. | 547 | * Board specific initialization. |
520 | */ | 548 | */ |
@@ -575,6 +603,8 @@ static void __init mxc_board_init(void) | |||
575 | 603 | ||
576 | if (!pcm037_camera_alloc_dma(4 * 1024 * 1024)) | 604 | if (!pcm037_camera_alloc_dma(4 * 1024 * 1024)) |
577 | mxc_register_device(&mx3_camera, &camera_pdata); | 605 | mxc_register_device(&mx3_camera, &camera_pdata); |
606 | |||
607 | platform_device_register(&pcm970_sja1000); | ||
578 | } | 608 | } |
579 | 609 | ||
580 | static void __init pcm037_timer_init(void) | 610 | static void __init pcm037_timer_init(void) |
@@ -592,7 +622,7 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037") | |||
592 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 622 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
593 | .boot_params = PHYS_OFFSET + 0x100, | 623 | .boot_params = PHYS_OFFSET + 0x100, |
594 | .map_io = mx31_map_io, | 624 | .map_io = mx31_map_io, |
595 | .init_irq = mxc_init_irq, | 625 | .init_irq = mx31_init_irq, |
596 | .init_machine = mxc_board_init, | 626 | .init_machine = mxc_board_init, |
597 | .timer = &pcm037_timer, | 627 | .timer = &pcm037_timer, |
598 | MACHINE_END | 628 | MACHINE_END |
diff --git a/arch/arm/mach-mx3/pcm043.c b/arch/arm/mach-mx3/pcm043.c index 8d27c324abf2..e18a224671fa 100644 --- a/arch/arm/mach-mx3/pcm043.c +++ b/arch/arm/mach-mx3/pcm043.c | |||
@@ -133,8 +133,7 @@ static struct i2c_board_info pcm043_i2c_devices[] = { | |||
133 | I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ | 133 | I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ |
134 | .platform_data = &board_eeprom, | 134 | .platform_data = &board_eeprom, |
135 | }, { | 135 | }, { |
136 | I2C_BOARD_INFO("rtc-pcf8563", 0x51), | 136 | I2C_BOARD_INFO("pcf8563", 0x51), |
137 | .type = "pcf8563", | ||
138 | } | 137 | } |
139 | }; | 138 | }; |
140 | #endif | 139 | #endif |
@@ -203,7 +202,8 @@ static struct pad_desc pcm043_pads[] = { | |||
203 | MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC, | 202 | MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC, |
204 | MX35_PAD_D3_REV__IPU_DISPB_D3_REV, | 203 | MX35_PAD_D3_REV__IPU_DISPB_D3_REV, |
205 | MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS, | 204 | MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS, |
206 | MX35_PAD_D3_SPL__IPU_DISPB_D3_SPL | 205 | /* gpio */ |
206 | MX35_PAD_ATA_CS0__GPIO2_6, | ||
207 | }; | 207 | }; |
208 | 208 | ||
209 | /* | 209 | /* |
@@ -245,7 +245,7 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043") | |||
245 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 245 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
246 | .boot_params = PHYS_OFFSET + 0x100, | 246 | .boot_params = PHYS_OFFSET + 0x100, |
247 | .map_io = mx35_map_io, | 247 | .map_io = mx35_map_io, |
248 | .init_irq = mxc_init_irq, | 248 | .init_irq = mx35_init_irq, |
249 | .init_machine = mxc_board_init, | 249 | .init_machine = mxc_board_init, |
250 | .timer = &pcm043_timer, | 250 | .timer = &pcm043_timer, |
251 | MACHINE_END | 251 | MACHINE_END |
diff --git a/arch/arm/mach-mx3/qong.c b/arch/arm/mach-mx3/qong.c index 82b31c4ab11f..044511f1b9a9 100644 --- a/arch/arm/mach-mx3/qong.c +++ b/arch/arm/mach-mx3/qong.c | |||
@@ -81,13 +81,12 @@ static inline void mxc_init_imx_uart(void) | |||
81 | } | 81 | } |
82 | 82 | ||
83 | static struct resource dnet_resources[] = { | 83 | static struct resource dnet_resources[] = { |
84 | [0] = { | 84 | { |
85 | .name = "dnet-memory", | 85 | .name = "dnet-memory", |
86 | .start = QONG_DNET_BASEADDR, | 86 | .start = QONG_DNET_BASEADDR, |
87 | .end = QONG_DNET_BASEADDR + QONG_DNET_SIZE - 1, | 87 | .end = QONG_DNET_BASEADDR + QONG_DNET_SIZE - 1, |
88 | .flags = IORESOURCE_MEM, | 88 | .flags = IORESOURCE_MEM, |
89 | }, | 89 | }, { |
90 | [1] = { | ||
91 | .start = QONG_FPGA_IRQ, | 90 | .start = QONG_FPGA_IRQ, |
92 | .end = QONG_FPGA_IRQ, | 91 | .end = QONG_FPGA_IRQ, |
93 | .flags = IORESOURCE_IRQ, | 92 | .flags = IORESOURCE_IRQ, |
@@ -280,7 +279,7 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") | |||
280 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 279 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
281 | .boot_params = PHYS_OFFSET + 0x100, | 280 | .boot_params = PHYS_OFFSET + 0x100, |
282 | .map_io = mx31_map_io, | 281 | .map_io = mx31_map_io, |
283 | .init_irq = mxc_init_irq, | 282 | .init_irq = mx31_init_irq, |
284 | .init_machine = mxc_board_init, | 283 | .init_machine = mxc_board_init, |
285 | .timer = &qong_timer, | 284 | .timer = &qong_timer, |
286 | MACHINE_END | 285 | MACHINE_END |