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-rw-r--r--arch/arm/mach-mx3/mx31lite.c60
1 files changed, 60 insertions, 0 deletions
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c
index 03762a36d29f..4651e2376a71 100644
--- a/arch/arm/mach-mx3/mx31lite.c
+++ b/arch/arm/mach-mx3/mx31lite.c
@@ -28,6 +28,8 @@
28#include <linux/smsc911x.h> 28#include <linux/smsc911x.h>
29#include <linux/mfd/mc13783.h> 29#include <linux/mfd/mc13783.h>
30#include <linux/spi/spi.h> 30#include <linux/spi/spi.h>
31#include <linux/usb/otg.h>
32#include <linux/usb/ulpi.h>
31 33
32#include <asm/mach-types.h> 34#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
@@ -44,6 +46,8 @@
44#include <mach/irqs.h> 46#include <mach/irqs.h>
45#include <mach/mxc_nand.h> 47#include <mach/mxc_nand.h>
46#include <mach/spi.h> 48#include <mach/spi.h>
49#include <mach/mxc_ehci.h>
50#include <mach/ulpi.h>
47 51
48#include "devices.h" 52#include "devices.h"
49 53
@@ -127,6 +131,56 @@ static struct spi_board_info mc13783_spi_dev __initdata = {
127}; 131};
128 132
129/* 133/*
134 * USB
135 */
136
137#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
138 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
139
140static int usbh2_init(struct platform_device *pdev)
141{
142 int pins[] = {
143 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
144 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
145 MX31_PIN_USBH2_CLK__USBH2_CLK,
146 MX31_PIN_USBH2_DIR__USBH2_DIR,
147 MX31_PIN_USBH2_NXT__USBH2_NXT,
148 MX31_PIN_USBH2_STP__USBH2_STP,
149 };
150
151 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
152
153 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
154 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
155 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
156 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
157 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
158 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
159 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
160 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
161 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
162 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
163 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
164 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
165
166 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
167
168 /* chip select */
169 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
170 "USBH2_CS");
171 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
172 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
173
174 return 0;
175}
176
177static struct mxc_usbh_platform_data usbh2_pdata = {
178 .init = usbh2_init,
179 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
180 .flags = MXC_EHCI_POWER_PINS_ENABLED,
181};
182
183/*
130 * This structure defines the MX31 memory map. 184 * This structure defines the MX31 memory map.
131 */ 185 */
132static struct map_desc mx31lite_io_desc[] __initdata = { 186static struct map_desc mx31lite_io_desc[] __initdata = {
@@ -177,6 +231,12 @@ static void __init mxc_board_init(void)
177 mxc_register_device(&mxc_spi_device1, &spi1_pdata); 231 mxc_register_device(&mxc_spi_device1, &spi1_pdata);
178 spi_register_board_info(&mc13783_spi_dev, 1); 232 spi_register_board_info(&mc13783_spi_dev, 1);
179 233
234 /* USB */
235 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
236 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
237
238 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
239
180 /* SMSC9117 IRQ pin */ 240 /* SMSC9117 IRQ pin */
181 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); 241 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
182 if (ret) 242 if (ret)