aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-mx3
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-mx3')
-rw-r--r--arch/arm/mach-mx3/Kconfig9
-rw-r--r--arch/arm/mach-mx3/Makefile1
-rw-r--r--arch/arm/mach-mx3/clock-imx35.c38
-rw-r--r--arch/arm/mach-mx3/clock.c8
-rw-r--r--arch/arm/mach-mx3/devices.c66
-rw-r--r--arch/arm/mach-mx3/devices.h2
-rw-r--r--arch/arm/mach-mx3/iomux.c25
-rw-r--r--arch/arm/mach-mx3/mm.c11
-rw-r--r--arch/arm/mach-mx3/mx31ads.c4
-rw-r--r--arch/arm/mach-mx3/mx31lite.c74
-rw-r--r--arch/arm/mach-mx3/mx31moboard-devboard.c123
-rw-r--r--arch/arm/mach-mx3/mx31moboard-marxbot.c128
-rw-r--r--arch/arm/mach-mx3/mx31moboard.c117
-rw-r--r--arch/arm/mach-mx3/mx31pdk.c164
-rw-r--r--arch/arm/mach-mx3/pcm037.c282
-rw-r--r--arch/arm/mach-mx3/pcm043.c252
-rw-r--r--arch/arm/mach-mx3/qong.c2
17 files changed, 1162 insertions, 144 deletions
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index 194b8428bba4..32e45155089a 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -1,10 +1,12 @@
1if ARCH_MX3 1if ARCH_MX3
2 2
3config ARCH_MX31 3config ARCH_MX31
4 select ARCH_HAS_RNGA
4 bool 5 bool
5 6
6config ARCH_MX35 7config ARCH_MX35
7 bool 8 bool
9 select ARCH_MXC_IOMUX_V3
8 10
9comment "MX3 platforms:" 11comment "MX3 platforms:"
10 12
@@ -66,4 +68,11 @@ config MACH_QONG
66 Include support for Dave/DENX QongEVB-LITE platform. This includes 68 Include support for Dave/DENX QongEVB-LITE platform. This includes
67 specific configurations for the board and its peripherals. 69 specific configurations for the board and its peripherals.
68 70
71config MACH_PCM043
72 bool "Support Phytec pcm043 (i.MX35) platforms"
73 select ARCH_MX35
74 help
75 Include support for Phytec pcm043 platform. This includes
76 specific configurations for the board and its peripherals.
77
69endif 78endif
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 272c8a953b30..cd6547b61b1e 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o
14obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o mx31moboard-devboard.o \ 14obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o mx31moboard-devboard.o \
15 mx31moboard-marxbot.o 15 mx31moboard-marxbot.o
16obj-$(CONFIG_MACH_QONG) += qong.o 16obj-$(CONFIG_MACH_QONG) += qong.o
17obj-$(CONFIG_MACH_PCM043) += pcm043.o
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 53a112d4e04a..0d76521cb491 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -147,34 +147,16 @@ static struct arm_ahb_div clk_consumer[] = {
147 { .arm = 0, .ahb = 0, .sel = 0}, 147 { .arm = 0, .ahb = 0, .sel = 0},
148}; 148};
149 149
150static struct arm_ahb_div clk_automotive[] = {
151 { .arm = 1, .ahb = 3, .sel = 0},
152 { .arm = 1, .ahb = 2, .sel = 1},
153 { .arm = 2, .ahb = 1, .sel = 1},
154 { .arm = 0, .ahb = 0, .sel = 0},
155 { .arm = 1, .ahb = 6, .sel = 0},
156 { .arm = 1, .ahb = 4, .sel = 1},
157 { .arm = 2, .ahb = 2, .sel = 1},
158 { .arm = 0, .ahb = 0, .sel = 0},
159};
160
161static unsigned long get_rate_arm(void) 150static unsigned long get_rate_arm(void)
162{ 151{
163 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); 152 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
164 struct arm_ahb_div *aad; 153 struct arm_ahb_div *aad;
165 unsigned long fref = get_rate_mpll(); 154 unsigned long fref = get_rate_mpll();
166 155
167 if (pdr0 & 1) { 156 aad = &clk_consumer[(pdr0 >> 16) & 0xf];
168 /* consumer path */ 157 if (aad->sel)
169 aad = &clk_consumer[(pdr0 >> 16) & 0xf]; 158 fref = fref * 2 / 3;
170 if (aad->sel) 159
171 fref = fref * 2 / 3;
172 } else {
173 /* auto path */
174 aad = &clk_automotive[(pdr0 >> 9) & 0x7];
175 if (aad->sel)
176 fref = fref * 3 / 4;
177 }
178 return fref / aad->arm; 160 return fref / aad->arm;
179} 161}
180 162
@@ -184,12 +166,7 @@ static unsigned long get_rate_ahb(struct clk *clk)
184 struct arm_ahb_div *aad; 166 struct arm_ahb_div *aad;
185 unsigned long fref = get_rate_mpll(); 167 unsigned long fref = get_rate_mpll();
186 168
187 if (pdr0 & 1) 169 aad = &clk_consumer[(pdr0 >> 16) & 0xf];
188 /* consumer path */
189 aad = &clk_consumer[(pdr0 >> 16) & 0xf];
190 else
191 /* auto path */
192 aad = &clk_automotive[(pdr0 >> 9) & 0x7];
193 170
194 return fref / aad->ahb; 171 return fref / aad->ahb;
195} 172}
@@ -430,7 +407,8 @@ static struct clk_lookup lookups[] __initdata = {
430 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) 407 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
431 _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk) 408 _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk)
432 _REGISTER_CLOCK(NULL, "iomuxc", iomuxc_clk) 409 _REGISTER_CLOCK(NULL, "iomuxc", iomuxc_clk)
433 _REGISTER_CLOCK(NULL, "ipu", ipu_clk) 410 _REGISTER_CLOCK("ipu-core", NULL, ipu_clk)
411 _REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk)
434 _REGISTER_CLOCK(NULL, "kpp", kpp_clk) 412 _REGISTER_CLOCK(NULL, "kpp", kpp_clk)
435 _REGISTER_CLOCK(NULL, "mlb", mlb_clk) 413 _REGISTER_CLOCK(NULL, "mlb", mlb_clk)
436 _REGISTER_CLOCK(NULL, "mshc", mshc_clk) 414 _REGISTER_CLOCK(NULL, "mshc", mshc_clk)
@@ -462,8 +440,6 @@ int __init mx35_clocks_init()
462 int i; 440 int i;
463 unsigned int ll = 0; 441 unsigned int ll = 0;
464 442
465 mxc_set_cpu_type(MXC_CPU_MX35);
466
467#ifdef CONFIG_DEBUG_LL_CONSOLE 443#ifdef CONFIG_DEBUG_LL_CONSOLE
468 ll = (3 << 16); 444 ll = (3 << 16);
469#endif 445#endif
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c
index 9957a11533a4..28bd11dc89b8 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock.c
@@ -566,8 +566,6 @@ int __init mx31_clocks_init(unsigned long fref)
566 u32 reg; 566 u32 reg;
567 int i; 567 int i;
568 568
569 mxc_set_cpu_type(MXC_CPU_MX31);
570
571 ckih_rate = fref; 569 ckih_rate = fref;
572 570
573 for (i = 0; i < ARRAY_SIZE(lookups); i++) 571 for (i = 0; i < ARRAY_SIZE(lookups); i++)
@@ -581,6 +579,12 @@ int __init mx31_clocks_init(unsigned long fref)
581 MX32, but still required to be set */ 579 MX32, but still required to be set */
582 MXC_CCM_CGR2); 580 MXC_CCM_CGR2);
583 581
582 /*
583 * Before turning off usb_pll make sure ipg_per_clk is generated
584 * by ipg_clk and not usb_pll.
585 */
586 __raw_writel(__raw_readl(MXC_CCM_CCMR) | (1 << 24), MXC_CCM_CCMR);
587
584 usb_pll_disable(&usb_pll_clk); 588 usb_pll_disable(&usb_pll_clk);
585 589
586 pr_info("Clock input source is %ld\n", clk_get_rate(&ckih_clk)); 590 pr_info("Clock input source is %ld\n", clk_get_rate(&ckih_clk));
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index 380be0c9b213..d927eddcad46 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -17,13 +17,17 @@
17 * Boston, MA 02110-1301, USA. 17 * Boston, MA 02110-1301, USA.
18 */ 18 */
19 19
20#include <linux/dma-mapping.h>
20#include <linux/module.h> 21#include <linux/module.h>
21#include <linux/platform_device.h> 22#include <linux/platform_device.h>
22#include <linux/serial.h> 23#include <linux/serial.h>
23#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/dma-mapping.h>
24#include <mach/hardware.h> 26#include <mach/hardware.h>
25#include <mach/irqs.h> 27#include <mach/irqs.h>
28#include <mach/common.h>
26#include <mach/imx-uart.h> 29#include <mach/imx-uart.h>
30#include <mach/mx3_camera.h>
27 31
28#include "devices.h" 32#include "devices.h"
29 33
@@ -283,6 +287,21 @@ struct platform_device mxcsdhc_device1 = {
283 .num_resources = ARRAY_SIZE(mxcsdhc1_resources), 287 .num_resources = ARRAY_SIZE(mxcsdhc1_resources),
284 .resource = mxcsdhc1_resources, 288 .resource = mxcsdhc1_resources,
285}; 289};
290
291static struct resource rnga_resources[] = {
292 {
293 .start = RNGA_BASE_ADDR,
294 .end = RNGA_BASE_ADDR + 0x28,
295 .flags = IORESOURCE_MEM,
296 },
297};
298
299struct platform_device mxc_rnga_device = {
300 .name = "mxc_rnga",
301 .id = -1,
302 .num_resources = 1,
303 .resource = rnga_resources,
304};
286#endif /* CONFIG_ARCH_MX31 */ 305#endif /* CONFIG_ARCH_MX31 */
287 306
288/* i.MX31 Image Processing Unit */ 307/* i.MX31 Image Processing Unit */
@@ -329,10 +348,54 @@ struct platform_device mx3_fb = {
329 .num_resources = ARRAY_SIZE(fb_resources), 348 .num_resources = ARRAY_SIZE(fb_resources),
330 .resource = fb_resources, 349 .resource = fb_resources,
331 .dev = { 350 .dev = {
332 .coherent_dma_mask = 0xffffffff, 351 .coherent_dma_mask = DMA_BIT_MASK(32),
333 }, 352 },
334}; 353};
335 354
355static struct resource camera_resources[] = {
356 {
357 .start = IPU_CTRL_BASE_ADDR + 0x60,
358 .end = IPU_CTRL_BASE_ADDR + 0x87,
359 .flags = IORESOURCE_MEM,
360 },
361};
362
363struct platform_device mx3_camera = {
364 .name = "mx3-camera",
365 .id = 0,
366 .num_resources = ARRAY_SIZE(camera_resources),
367 .resource = camera_resources,
368 .dev = {
369 .coherent_dma_mask = DMA_BIT_MASK(32),
370 },
371};
372
373static struct resource otg_resources[] = {
374 {
375 .start = OTG_BASE_ADDR,
376 .end = OTG_BASE_ADDR + 0x1ff,
377 .flags = IORESOURCE_MEM,
378 }, {
379 .start = MXC_INT_USB3,
380 .end = MXC_INT_USB3,
381 .flags = IORESOURCE_IRQ,
382 },
383};
384
385static u64 otg_dmamask = DMA_BIT_MASK(32);
386
387/* OTG gadget device */
388struct platform_device mxc_otg_udc_device = {
389 .name = "fsl-usb2-udc",
390 .id = -1,
391 .dev = {
392 .dma_mask = &otg_dmamask,
393 .coherent_dma_mask = DMA_BIT_MASK(32),
394 },
395 .resource = otg_resources,
396 .num_resources = ARRAY_SIZE(otg_resources),
397};
398
336#ifdef CONFIG_ARCH_MX35 399#ifdef CONFIG_ARCH_MX35
337static struct resource mxc_fec_resources[] = { 400static struct resource mxc_fec_resources[] = {
338 { 401 {
@@ -359,6 +422,7 @@ static int mx3_devices_init(void)
359 if (cpu_is_mx31()) { 422 if (cpu_is_mx31()) {
360 mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR; 423 mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR;
361 mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff; 424 mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff;
425 mxc_register_device(&mxc_rnga_device, NULL);
362 } 426 }
363 if (cpu_is_mx35()) { 427 if (cpu_is_mx35()) {
364 mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; 428 mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR;
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h
index 88c04b296fab..475410ada60a 100644
--- a/arch/arm/mach-mx3/devices.h
+++ b/arch/arm/mach-mx3/devices.h
@@ -11,6 +11,8 @@ extern struct platform_device mxc_i2c_device1;
11extern struct platform_device mxc_i2c_device2; 11extern struct platform_device mxc_i2c_device2;
12extern struct platform_device mx3_ipu; 12extern struct platform_device mx3_ipu;
13extern struct platform_device mx3_fb; 13extern struct platform_device mx3_fb;
14extern struct platform_device mx3_camera;
14extern struct platform_device mxc_fec_device; 15extern struct platform_device mxc_fec_device;
15extern struct platform_device mxcsdhc_device0; 16extern struct platform_device mxcsdhc_device0;
16extern struct platform_device mxcsdhc_device1; 17extern struct platform_device mxcsdhc_device1;
18extern struct platform_device mxc_otg_udc_device;
diff --git a/arch/arm/mach-mx3/iomux.c b/arch/arm/mach-mx3/iomux.c
index 40ffc5a664d9..c66ccbcdc11b 100644
--- a/arch/arm/mach-mx3/iomux.c
+++ b/arch/arm/mach-mx3/iomux.c
@@ -21,7 +21,6 @@
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/spinlock.h> 22#include <linux/spinlock.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/gpio.h>
25#include <linux/kernel.h> 24#include <linux/kernel.h>
26#include <mach/hardware.h> 25#include <mach/hardware.h>
27#include <mach/gpio.h> 26#include <mach/gpio.h>
@@ -94,15 +93,13 @@ void mxc_iomux_set_pad(enum iomux_pins pin, u32 config)
94EXPORT_SYMBOL(mxc_iomux_set_pad); 93EXPORT_SYMBOL(mxc_iomux_set_pad);
95 94
96/* 95/*
97 * setups a single pin: 96 * allocs a single pin:
98 * - reserves the pin so that it is not claimed by another driver 97 * - reserves the pin so that it is not claimed by another driver
99 * - setups the iomux according to the configuration 98 * - setups the iomux according to the configuration
100 * - if the pin is configured as a GPIO, we claim it through kernel gpiolib
101 */ 99 */
102int mxc_iomux_setup_pin(const unsigned int pin, const char *label) 100int mxc_iomux_alloc_pin(const unsigned int pin, const char *label)
103{ 101{
104 unsigned pad = pin & IOMUX_PADNUM_MASK; 102 unsigned pad = pin & IOMUX_PADNUM_MASK;
105 unsigned gpio;
106 103
107 if (pad >= (PIN_MAX + 1)) { 104 if (pad >= (PIN_MAX + 1)) {
108 printk(KERN_ERR "mxc_iomux: Attempt to request nonexistant pin %u for \"%s\"\n", 105 printk(KERN_ERR "mxc_iomux: Attempt to request nonexistant pin %u for \"%s\"\n",
@@ -113,19 +110,13 @@ int mxc_iomux_setup_pin(const unsigned int pin, const char *label)
113 if (test_and_set_bit(pad, mxc_pin_alloc_map)) { 110 if (test_and_set_bit(pad, mxc_pin_alloc_map)) {
114 printk(KERN_ERR "mxc_iomux: pin %u already used. Allocation for \"%s\" failed\n", 111 printk(KERN_ERR "mxc_iomux: pin %u already used. Allocation for \"%s\" failed\n",
115 pad, label ? label : "?"); 112 pad, label ? label : "?");
116 return -EINVAL; 113 return -EBUSY;
117 } 114 }
118 mxc_iomux_mode(pin); 115 mxc_iomux_mode(pin);
119 116
120 /* if we have a gpio, we can allocate it */
121 gpio = (pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT;
122 if (gpio < (GPIO_PORT_MAX + 1) * 32)
123 if (gpio_request(gpio, label))
124 return -EINVAL;
125
126 return 0; 117 return 0;
127} 118}
128EXPORT_SYMBOL(mxc_iomux_setup_pin); 119EXPORT_SYMBOL(mxc_iomux_alloc_pin);
129 120
130int mxc_iomux_setup_multiple_pins(unsigned int *pin_list, unsigned count, 121int mxc_iomux_setup_multiple_pins(unsigned int *pin_list, unsigned count,
131 const char *label) 122 const char *label)
@@ -135,7 +126,8 @@ int mxc_iomux_setup_multiple_pins(unsigned int *pin_list, unsigned count,
135 int ret = -EINVAL; 126 int ret = -EINVAL;
136 127
137 for (i = 0; i < count; i++) { 128 for (i = 0; i < count; i++) {
138 if (mxc_iomux_setup_pin(*p, label)) 129 ret = mxc_iomux_alloc_pin(*p, label);
130 if (ret)
139 goto setup_error; 131 goto setup_error;
140 p++; 132 p++;
141 } 133 }
@@ -150,14 +142,9 @@ EXPORT_SYMBOL(mxc_iomux_setup_multiple_pins);
150void mxc_iomux_release_pin(const unsigned int pin) 142void mxc_iomux_release_pin(const unsigned int pin)
151{ 143{
152 unsigned pad = pin & IOMUX_PADNUM_MASK; 144 unsigned pad = pin & IOMUX_PADNUM_MASK;
153 unsigned gpio;
154 145
155 if (pad < (PIN_MAX + 1)) 146 if (pad < (PIN_MAX + 1))
156 clear_bit(pad, mxc_pin_alloc_map); 147 clear_bit(pad, mxc_pin_alloc_map);
157
158 gpio = (pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT;
159 if (gpio < (GPIO_PORT_MAX + 1) * 32)
160 gpio_free(gpio);
161} 148}
162EXPORT_SYMBOL(mxc_iomux_release_pin); 149EXPORT_SYMBOL(mxc_iomux_release_pin);
163 150
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c
index 9e1459cb4b74..1f5fdd456cb9 100644
--- a/arch/arm/mach-mx3/mm.c
+++ b/arch/arm/mach-mx3/mm.c
@@ -72,8 +72,17 @@ static struct map_desc mxc_io_desc[] __initdata = {
72 * system startup to create static physical to virtual memory mappings 72 * system startup to create static physical to virtual memory mappings
73 * for the IO modules. 73 * for the IO modules.
74 */ 74 */
75void __init mxc_map_io(void) 75void __init mx31_map_io(void)
76{ 76{
77 mxc_set_cpu_type(MXC_CPU_MX31);
78
79 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
80}
81
82void __init mx35_map_io(void)
83{
84 mxc_set_cpu_type(MXC_CPU_MX35);
85
77 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 86 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
78} 87}
79 88
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c
index a6d6efefa6aa..30e2767a78ae 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mx31ads.c
@@ -187,7 +187,7 @@ static void __init mx31ads_init_expio(void)
187 /* 187 /*
188 * Configure INT line as GPIO input 188 * Configure INT line as GPIO input
189 */ 189 */
190 mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO), "expio"); 190 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO), "expio");
191 191
192 /* disable the interrupt and clear the status */ 192 /* disable the interrupt and clear the status */
193 __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG); 193 __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG);
@@ -511,7 +511,7 @@ static struct map_desc mx31ads_io_desc[] __initdata = {
511 */ 511 */
512static void __init mx31ads_map_io(void) 512static void __init mx31ads_map_io(void)
513{ 513{
514 mxc_map_io(); 514 mx31_map_io();
515 iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc)); 515 iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc));
516} 516}
517 517
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c
index 894d98cd9941..86fe70fa3e13 100644
--- a/arch/arm/mach-mx3/mx31lite.c
+++ b/arch/arm/mach-mx3/mx31lite.c
@@ -22,6 +22,9 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/memory.h> 24#include <linux/memory.h>
25#include <linux/platform_device.h>
26#include <linux/gpio.h>
27#include <linux/smsc911x.h>
25 28
26#include <mach/hardware.h> 29#include <mach/hardware.h>
27#include <asm/mach-types.h> 30#include <asm/mach-types.h>
@@ -32,11 +35,64 @@
32#include <asm/page.h> 35#include <asm/page.h>
33#include <asm/setup.h> 36#include <asm/setup.h>
34#include <mach/board-mx31lite.h> 37#include <mach/board-mx31lite.h>
38#include <mach/imx-uart.h>
39#include <mach/iomux-mx3.h>
40#include <mach/irqs.h>
41#include <mach/mxc_nand.h>
42#include "devices.h"
35 43
36/* 44/*
37 * This file contains the board-specific initialization routines. 45 * This file contains the board-specific initialization routines.
38 */ 46 */
39 47
48static unsigned int mx31lite_pins[] = {
49 /* UART1 */
50 MX31_PIN_CTS1__CTS1,
51 MX31_PIN_RTS1__RTS1,
52 MX31_PIN_TXD1__TXD1,
53 MX31_PIN_RXD1__RXD1,
54 /* LAN9117 IRQ pin */
55 IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
56};
57
58static struct imxuart_platform_data uart_pdata = {
59 .flags = IMXUART_HAVE_RTSCTS,
60};
61
62static struct mxc_nand_platform_data mx31lite_nand_board_info = {
63 .width = 1,
64 .hw_ecc = 1,
65};
66
67static struct smsc911x_platform_config smsc911x_config = {
68 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
69 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
70 .flags = SMSC911X_USE_16BIT,
71};
72
73static struct resource smsc911x_resources[] = {
74 [0] = {
75 .start = CS4_BASE_ADDR,
76 .end = CS4_BASE_ADDR + 0x100,
77 .flags = IORESOURCE_MEM,
78 },
79 [1] = {
80 .start = IOMUX_TO_IRQ(MX31_PIN_SFS6),
81 .end = IOMUX_TO_IRQ(MX31_PIN_SFS6),
82 .flags = IORESOURCE_IRQ,
83 },
84};
85
86static struct platform_device smsc911x_device = {
87 .name = "smsc911x",
88 .id = -1,
89 .num_resources = ARRAY_SIZE(smsc911x_resources),
90 .resource = smsc911x_resources,
91 .dev = {
92 .platform_data = &smsc911x_config,
93 },
94};
95
40/* 96/*
41 * This structure defines the MX31 memory map. 97 * This structure defines the MX31 memory map.
42 */ 98 */
@@ -59,7 +115,7 @@ static struct map_desc mx31lite_io_desc[] __initdata = {
59 */ 115 */
60void __init mx31lite_map_io(void) 116void __init mx31lite_map_io(void)
61{ 117{
62 mxc_map_io(); 118 mx31_map_io();
63 iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc)); 119 iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
64} 120}
65 121
@@ -68,6 +124,22 @@ void __init mx31lite_map_io(void)
68 */ 124 */
69static void __init mxc_board_init(void) 125static void __init mxc_board_init(void)
70{ 126{
127 int ret;
128
129 mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
130 "mx31lite");
131
132 mxc_register_device(&mxc_uart_device0, &uart_pdata);
133 mxc_register_device(&mxc_nand_device, &mx31lite_nand_board_info);
134
135 /* SMSC9117 IRQ pin */
136 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
137 if (ret)
138 pr_warning("could not get LAN irq gpio\n");
139 else {
140 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
141 platform_device_register(&smsc911x_device);
142 }
71} 143}
72 144
73static void __init mx31lite_timer_init(void) 145static void __init mx31lite_timer_init(void)
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c
index d080b4add79c..4704405165a1 100644
--- a/arch/arm/mach-mx3/mx31moboard-devboard.c
+++ b/arch/arm/mach-mx3/mx31moboard-devboard.c
@@ -16,33 +16,142 @@
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */ 17 */
18 18
19#include <linux/types.h> 19#include <linux/fsl_devices.h>
20#include <linux/gpio.h>
20#include <linux/init.h> 21#include <linux/init.h>
21 22#include <linux/interrupt.h>
22#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/types.h>
23 25
24#include <mach/hardware.h>
25#include <mach/common.h> 26#include <mach/common.h>
26#include <mach/imx-uart.h> 27#include <mach/imx-uart.h>
27#include <mach/iomux-mx3.h> 28#include <mach/iomux-mx3.h>
29#include <mach/hardware.h>
30#include <mach/mmc.h>
28 31
29#include "devices.h" 32#include "devices.h"
30 33
34static unsigned int devboard_pins[] = {
35 /* UART1 */
36 MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
37 MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
38 /* SDHC2 */
39 MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
40 MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
41 MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
42 MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
43 /* USB OTG */
44 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
45 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
46 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
47 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
48 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
49 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
50 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
51 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
52 MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR,
53 MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP,
54 MX31_PIN_USB_OC__GPIO1_30,
55};
56
31static struct imxuart_platform_data uart_pdata = { 57static struct imxuart_platform_data uart_pdata = {
32 .flags = IMXUART_HAVE_RTSCTS, 58 .flags = IMXUART_HAVE_RTSCTS,
33}; 59};
34 60
35static int mxc_uart1_pins[] = { 61#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
36 MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2, 62#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
37 MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2, 63
64static int devboard_sdhc2_get_ro(struct device *dev)
65{
66 return gpio_get_value(SDHC2_WP);
67}
68
69static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
70 void *data)
71{
72 int ret;
73
74 ret = gpio_request(SDHC2_CD, "sdhc-detect");
75 if (ret)
76 return ret;
77
78 gpio_direction_input(SDHC2_CD);
79
80 ret = gpio_request(SDHC2_WP, "sdhc-wp");
81 if (ret)
82 goto err_gpio_free;
83 gpio_direction_input(SDHC2_WP);
84
85 ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
86 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
87 "sdhc2-card-detect", data);
88 if (ret)
89 goto err_gpio_free_2;
90
91 return 0;
92
93err_gpio_free_2:
94 gpio_free(SDHC2_WP);
95err_gpio_free:
96 gpio_free(SDHC2_CD);
97
98 return ret;
99}
100
101static void devboard_sdhc2_exit(struct device *dev, void *data)
102{
103 free_irq(gpio_to_irq(SDHC2_CD), data);
104 gpio_free(SDHC2_WP);
105 gpio_free(SDHC2_CD);
106}
107
108static struct imxmmc_platform_data sdhc2_pdata = {
109 .get_ro = devboard_sdhc2_get_ro,
110 .init = devboard_sdhc2_init,
111 .exit = devboard_sdhc2_exit,
112};
113
114static struct fsl_usb2_platform_data usb_pdata = {
115 .operating_mode = FSL_USB2_DR_DEVICE,
116 .phy_mode = FSL_USB2_PHY_ULPI,
38}; 117};
39 118
119#define OTG_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)
120#define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC)
121
122static void devboard_usbotg_init(void)
123{
124 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, OTG_PAD_CFG);
125 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, OTG_PAD_CFG);
126 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, OTG_PAD_CFG);
127 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, OTG_PAD_CFG);
128 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, OTG_PAD_CFG);
129 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, OTG_PAD_CFG);
130 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, OTG_PAD_CFG);
131 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, OTG_PAD_CFG);
132 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, OTG_PAD_CFG);
133 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, OTG_PAD_CFG);
134 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, OTG_PAD_CFG);
135 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, OTG_PAD_CFG);
136
137 gpio_request(OTG_EN_B, "usb-udc-en");
138 gpio_direction_output(OTG_EN_B, 0);
139}
140
40/* 141/*
41 * system init for baseboard usage. Will be called by mx31moboard init. 142 * system init for baseboard usage. Will be called by mx31moboard init.
42 */ 143 */
43void __init mx31moboard_devboard_init(void) 144void __init mx31moboard_devboard_init(void)
44{ 145{
45 printk(KERN_INFO "Initializing mx31devboard peripherals\n"); 146 printk(KERN_INFO "Initializing mx31devboard peripherals\n");
46 mxc_iomux_setup_multiple_pins(mxc_uart1_pins, ARRAY_SIZE(mxc_uart1_pins), "uart1"); 147
148 mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
149 "devboard");
150
47 mxc_register_device(&mxc_uart_device1, &uart_pdata); 151 mxc_register_device(&mxc_uart_device1, &uart_pdata);
152
153 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
154
155 devboard_usbotg_init();
156 mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
48} 157}
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c
index 9ef9566823fb..641c3d6153ae 100644
--- a/arch/arm/mach-mx3/mx31moboard-marxbot.c
+++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c
@@ -16,22 +16,144 @@
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */ 17 */
18 18
19#include <linux/types.h> 19#include <linux/fsl_devices.h>
20#include <linux/gpio.h>
20#include <linux/init.h> 21#include <linux/init.h>
21 22#include <linux/interrupt.h>
22#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/types.h>
23 25
24#include <mach/hardware.h>
25#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/hardware.h>
26#include <mach/imx-uart.h> 28#include <mach/imx-uart.h>
27#include <mach/iomux-mx3.h> 29#include <mach/iomux-mx3.h>
30#include <mach/mmc.h>
28 31
29#include "devices.h" 32#include "devices.h"
30 33
34static unsigned int marxbot_pins[] = {
35 /* SDHC2 */
36 MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
37 MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
38 MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
39 MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
40 /* CSI */
41 MX31_PIN_CSI_D4__CSI_D4, MX31_PIN_CSI_D5__CSI_D5,
42 MX31_PIN_CSI_D6__CSI_D6, MX31_PIN_CSI_D7__CSI_D7,
43 MX31_PIN_CSI_D8__CSI_D8, MX31_PIN_CSI_D9__CSI_D9,
44 MX31_PIN_CSI_D10__CSI_D10, MX31_PIN_CSI_D11__CSI_D11,
45 MX31_PIN_CSI_D12__CSI_D12, MX31_PIN_CSI_D13__CSI_D13,
46 MX31_PIN_CSI_D14__CSI_D14, MX31_PIN_CSI_D15__CSI_D15,
47 MX31_PIN_CSI_HSYNC__CSI_HSYNC, MX31_PIN_CSI_MCLK__CSI_MCLK,
48 MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC,
49 MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1,
50 MX31_PIN_TXD2__GPIO1_28,
51 /* USB OTG */
52 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
53 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
54 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
55 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
56 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
57 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
58 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
59 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
60 MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR,
61 MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP,
62 MX31_PIN_USB_OC__GPIO1_30,
63};
64
65#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
66#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
67
68static int marxbot_sdhc2_get_ro(struct device *dev)
69{
70 return gpio_get_value(SDHC2_WP);
71}
72
73static int marxbot_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
74 void *data)
75{
76 int ret;
77
78 ret = gpio_request(SDHC2_CD, "sdhc-detect");
79 if (ret)
80 return ret;
81
82 gpio_direction_input(SDHC2_CD);
83
84 ret = gpio_request(SDHC2_WP, "sdhc-wp");
85 if (ret)
86 goto err_gpio_free;
87 gpio_direction_input(SDHC2_WP);
88
89 ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
90 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
91 "sdhc2-card-detect", data);
92 if (ret)
93 goto err_gpio_free_2;
94
95 return 0;
96
97err_gpio_free_2:
98 gpio_free(SDHC2_WP);
99err_gpio_free:
100 gpio_free(SDHC2_CD);
101
102 return ret;
103}
104
105static void marxbot_sdhc2_exit(struct device *dev, void *data)
106{
107 free_irq(gpio_to_irq(SDHC2_CD), data);
108 gpio_free(SDHC2_WP);
109 gpio_free(SDHC2_CD);
110}
111
112static struct imxmmc_platform_data sdhc2_pdata = {
113 .get_ro = marxbot_sdhc2_get_ro,
114 .init = marxbot_sdhc2_init,
115 .exit = marxbot_sdhc2_exit,
116};
117
118static struct fsl_usb2_platform_data usb_pdata = {
119 .operating_mode = FSL_USB2_DR_DEVICE,
120 .phy_mode = FSL_USB2_PHY_ULPI,
121};
122
123#define OTG_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)
124#define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC)
125
126static void marxbot_usbotg_init(void)
127{
128 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, OTG_PAD_CFG);
129 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, OTG_PAD_CFG);
130 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, OTG_PAD_CFG);
131 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, OTG_PAD_CFG);
132 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, OTG_PAD_CFG);
133 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, OTG_PAD_CFG);
134 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, OTG_PAD_CFG);
135 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, OTG_PAD_CFG);
136 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, OTG_PAD_CFG);
137 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, OTG_PAD_CFG);
138 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, OTG_PAD_CFG);
139 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, OTG_PAD_CFG);
140
141 gpio_request(OTG_EN_B, "usb-udc-en");
142 gpio_direction_output(OTG_EN_B, 0);
143}
144
31/* 145/*
32 * system init for baseboard usage. Will be called by mx31moboard init. 146 * system init for baseboard usage. Will be called by mx31moboard init.
33 */ 147 */
34void __init mx31moboard_marxbot_init(void) 148void __init mx31moboard_marxbot_init(void)
35{ 149{
36 printk(KERN_INFO "Initializing mx31marxbot peripherals\n"); 150 printk(KERN_INFO "Initializing mx31marxbot peripherals\n");
151
152 mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins),
153 "marxbot");
154
155 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
156
157 marxbot_usbotg_init();
158 mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
37} 159}
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mx31moboard.c
index 34c2a1b99d4f..a17f2e411609 100644
--- a/arch/arm/mach-mx3/mx31moboard.c
+++ b/arch/arm/mach-mx3/mx31moboard.c
@@ -16,26 +16,47 @@
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */ 17 */
18 18
19#include <linux/types.h> 19#include <linux/gpio.h>
20#include <linux/init.h> 20#include <linux/init.h>
21 21#include <linux/interrupt.h>
22#include <linux/platform_device.h> 22#include <linux/memory.h>
23#include <linux/mtd/physmap.h> 23#include <linux/mtd/physmap.h>
24#include <linux/mtd/partitions.h> 24#include <linux/mtd/partitions.h>
25#include <linux/memory.h> 25#include <linux/platform_device.h>
26#include <linux/types.h>
26 27
27#include <mach/hardware.h>
28#include <asm/mach-types.h> 28#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
30#include <asm/mach/time.h> 30#include <asm/mach/time.h>
31#include <asm/mach/map.h> 31#include <asm/mach/map.h>
32#include <mach/board-mx31moboard.h>
32#include <mach/common.h> 33#include <mach/common.h>
34#include <mach/hardware.h>
33#include <mach/imx-uart.h> 35#include <mach/imx-uart.h>
34#include <mach/iomux-mx3.h> 36#include <mach/iomux-mx3.h>
35#include <mach/board-mx31moboard.h> 37#include <mach/i2c.h>
38#include <mach/mmc.h>
36 39
37#include "devices.h" 40#include "devices.h"
38 41
42static unsigned int moboard_pins[] = {
43 /* UART0 */
44 MX31_PIN_CTS1__CTS1, MX31_PIN_RTS1__RTS1,
45 MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1,
46 /* UART4 */
47 MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5,
48 MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5,
49 /* I2C0 */
50 MX31_PIN_I2C_DAT__I2C1_SDA, MX31_PIN_I2C_CLK__I2C1_SCL,
51 /* I2C1 */
52 MX31_PIN_DCD_DTE1__I2C2_SDA, MX31_PIN_RI_DTE1__I2C2_SCL,
53 /* SDHC1 */
54 MX31_PIN_SD1_DATA3__SD1_DATA3, MX31_PIN_SD1_DATA2__SD1_DATA2,
55 MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0,
56 MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD,
57 MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27,
58};
59
39static struct physmap_flash_data mx31moboard_flash_data = { 60static struct physmap_flash_data mx31moboard_flash_data = {
40 .width = 2, 61 .width = 2,
41}; 62};
@@ -60,17 +81,69 @@ static struct imxuart_platform_data uart_pdata = {
60 .flags = IMXUART_HAVE_RTSCTS, 81 .flags = IMXUART_HAVE_RTSCTS,
61}; 82};
62 83
63static struct platform_device *devices[] __initdata = { 84static struct imxi2c_platform_data moboard_i2c0_pdata = {
64 &mx31moboard_flash, 85 .bitrate = 400000,
65}; 86};
66 87
67static int mxc_uart0_pins[] = { 88static struct imxi2c_platform_data moboard_i2c1_pdata = {
68 MX31_PIN_CTS1__CTS1, MX31_PIN_RTS1__RTS1, 89 .bitrate = 100000,
69 MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1,
70}; 90};
71static int mxc_uart4_pins[] = { 91
72 MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, 92#define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0)
73 MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, 93#define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1)
94
95static int moboard_sdhc1_get_ro(struct device *dev)
96{
97 return gpio_get_value(SDHC1_WP);
98}
99
100static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
101 void *data)
102{
103 int ret;
104
105 ret = gpio_request(SDHC1_CD, "sdhc-detect");
106 if (ret)
107 return ret;
108
109 gpio_direction_input(SDHC1_CD);
110
111 ret = gpio_request(SDHC1_WP, "sdhc-wp");
112 if (ret)
113 goto err_gpio_free;
114 gpio_direction_input(SDHC1_WP);
115
116 ret = request_irq(gpio_to_irq(SDHC1_CD), detect_irq,
117 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
118 "sdhc1-card-detect", data);
119 if (ret)
120 goto err_gpio_free_2;
121
122 return 0;
123
124err_gpio_free_2:
125 gpio_free(SDHC1_WP);
126err_gpio_free:
127 gpio_free(SDHC1_CD);
128
129 return ret;
130}
131
132static void moboard_sdhc1_exit(struct device *dev, void *data)
133{
134 free_irq(gpio_to_irq(SDHC1_CD), data);
135 gpio_free(SDHC1_WP);
136 gpio_free(SDHC1_CD);
137}
138
139static struct imxmmc_platform_data sdhc1_pdata = {
140 .get_ro = moboard_sdhc1_get_ro,
141 .init = moboard_sdhc1_init,
142 .exit = moboard_sdhc1_exit,
143};
144
145static struct platform_device *devices[] __initdata = {
146 &mx31moboard_flash,
74}; 147};
75 148
76static int mx31moboard_baseboard; 149static int mx31moboard_baseboard;
@@ -81,14 +154,19 @@ core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444);
81 */ 154 */
82static void __init mxc_board_init(void) 155static void __init mxc_board_init(void)
83{ 156{
157 mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins),
158 "moboard");
159
84 platform_add_devices(devices, ARRAY_SIZE(devices)); 160 platform_add_devices(devices, ARRAY_SIZE(devices));
85 161
86 mxc_iomux_setup_multiple_pins(mxc_uart0_pins, ARRAY_SIZE(mxc_uart0_pins), "uart0");
87 mxc_register_device(&mxc_uart_device0, &uart_pdata); 162 mxc_register_device(&mxc_uart_device0, &uart_pdata);
88
89 mxc_iomux_setup_multiple_pins(mxc_uart4_pins, ARRAY_SIZE(mxc_uart4_pins), "uart4");
90 mxc_register_device(&mxc_uart_device4, &uart_pdata); 163 mxc_register_device(&mxc_uart_device4, &uart_pdata);
91 164
165 mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata);
166 mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata);
167
168 mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata);
169
92 switch (mx31moboard_baseboard) { 170 switch (mx31moboard_baseboard) {
93 case MX31NOBOARD: 171 case MX31NOBOARD:
94 break; 172 break;
@@ -99,7 +177,8 @@ static void __init mxc_board_init(void)
99 mx31moboard_marxbot_init(); 177 mx31moboard_marxbot_init();
100 break; 178 break;
101 default: 179 default:
102 printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", mx31moboard_baseboard); 180 printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n",
181 mx31moboard_baseboard);
103 } 182 }
104} 183}
105 184
@@ -117,7 +196,7 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
117 .phys_io = AIPS1_BASE_ADDR, 196 .phys_io = AIPS1_BASE_ADDR,
118 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 197 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
119 .boot_params = PHYS_OFFSET + 0x100, 198 .boot_params = PHYS_OFFSET + 0x100,
120 .map_io = mxc_map_io, 199 .map_io = mx31_map_io,
121 .init_irq = mxc_init_irq, 200 .init_irq = mxc_init_irq,
122 .init_machine = mxc_board_init, 201 .init_machine = mxc_board_init,
123 .timer = &mx31moboard_timer, 202 .timer = &mx31moboard_timer,
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mx31pdk.c
index bc63f1785691..32599e507534 100644
--- a/arch/arm/mach-mx3/mx31pdk.c
+++ b/arch/arm/mach-mx3/mx31pdk.c
@@ -20,6 +20,7 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/gpio.h>
23 24
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <asm/mach-types.h> 26#include <asm/mach-types.h>
@@ -41,21 +42,159 @@
41 * @ingroup System 42 * @ingroup System
42 */ 43 */
43 44
45static int mx31pdk_pins[] = {
46 /* UART1 */
47 MX31_PIN_CTS1__CTS1,
48 MX31_PIN_RTS1__RTS1,
49 MX31_PIN_TXD1__TXD1,
50 MX31_PIN_RXD1__RXD1,
51 IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
52};
53
44static struct imxuart_platform_data uart_pdata = { 54static struct imxuart_platform_data uart_pdata = {
45 .flags = IMXUART_HAVE_RTSCTS, 55 .flags = IMXUART_HAVE_RTSCTS,
46}; 56};
47 57
48static int uart_pins[] = { 58/*
49 MX31_PIN_CTS1__CTS1, 59 * Routines for the CPLD on the debug board. It contains a CPLD handling
50 MX31_PIN_RTS1__RTS1, 60 * LEDs, switches, interrupts for Ethernet.
51 MX31_PIN_TXD1__TXD1, 61 */
52 MX31_PIN_RXD1__RXD1 62
63static void mx31pdk_expio_irq_handler(uint32_t irq, struct irq_desc *desc)
64{
65 uint32_t imr_val;
66 uint32_t int_valid;
67 uint32_t expio_irq;
68
69 imr_val = __raw_readw(CPLD_INT_MASK_REG);
70 int_valid = __raw_readw(CPLD_INT_STATUS_REG) & ~imr_val;
71
72 expio_irq = MXC_EXP_IO_BASE;
73 for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
74 if ((int_valid & 1) == 0)
75 continue;
76 generic_handle_irq(expio_irq);
77 }
78}
79
80/*
81 * Disable an expio pin's interrupt by setting the bit in the imr.
82 * @param irq an expio virtual irq number
83 */
84static void expio_mask_irq(uint32_t irq)
85{
86 uint16_t reg;
87 uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
88
89 /* mask the interrupt */
90 reg = __raw_readw(CPLD_INT_MASK_REG);
91 reg |= 1 << expio;
92 __raw_writew(reg, CPLD_INT_MASK_REG);
93}
94
95/*
96 * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr.
97 * @param irq an expanded io virtual irq number
98 */
99static void expio_ack_irq(uint32_t irq)
100{
101 uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
102
103 /* clear the interrupt status */
104 __raw_writew(1 << expio, CPLD_INT_RESET_REG);
105 __raw_writew(0, CPLD_INT_RESET_REG);
106 /* mask the interrupt */
107 expio_mask_irq(irq);
108}
109
110/*
111 * Enable a expio pin's interrupt by clearing the bit in the imr.
112 * @param irq a expio virtual irq number
113 */
114static void expio_unmask_irq(uint32_t irq)
115{
116 uint16_t reg;
117 uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
118
119 /* unmask the interrupt */
120 reg = __raw_readw(CPLD_INT_MASK_REG);
121 reg &= ~(1 << expio);
122 __raw_writew(reg, CPLD_INT_MASK_REG);
123}
124
125static struct irq_chip expio_irq_chip = {
126 .ack = expio_ack_irq,
127 .mask = expio_mask_irq,
128 .unmask = expio_unmask_irq,
53}; 129};
54 130
55static inline void mxc_init_imx_uart(void) 131static int __init mx31pdk_init_expio(void)
56{ 132{
57 mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), "uart-0"); 133 int i;
58 mxc_register_device(&mxc_uart_device0, &uart_pdata); 134 int ret;
135
136 /* Check if there's a debug board connected */
137 if ((__raw_readw(CPLD_MAGIC_NUMBER1_REG) != 0xAAAA) ||
138 (__raw_readw(CPLD_MAGIC_NUMBER2_REG) != 0x5555) ||
139 (__raw_readw(CPLD_MAGIC_NUMBER3_REG) != 0xCAFE)) {
140 /* No Debug board found */
141 return -ENODEV;
142 }
143
144 pr_info("i.MX31PDK Debug board detected, rev = 0x%04X\n",
145 __raw_readw(CPLD_CODE_VER_REG));
146
147 /*
148 * Configure INT line as GPIO input
149 */
150 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "sms9217-irq");
151 if (ret)
152 pr_warning("could not get LAN irq gpio\n");
153 else
154 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
155
156 /* Disable the interrupts and clear the status */
157 __raw_writew(0, CPLD_INT_MASK_REG);
158 __raw_writew(0xFFFF, CPLD_INT_RESET_REG);
159 __raw_writew(0, CPLD_INT_RESET_REG);
160 __raw_writew(0x1F, CPLD_INT_MASK_REG);
161 for (i = MXC_EXP_IO_BASE;
162 i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES);
163 i++) {
164 set_irq_chip(i, &expio_irq_chip);
165 set_irq_handler(i, handle_level_irq);
166 set_irq_flags(i, IRQF_VALID);
167 }
168 set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_LOW);
169 set_irq_chained_handler(EXPIO_PARENT_INT, mx31pdk_expio_irq_handler);
170
171 return 0;
172}
173
174/*
175 * This structure defines the MX31 memory map.
176 */
177static struct map_desc mx31pdk_io_desc[] __initdata = {
178 {
179 .virtual = SPBA0_BASE_ADDR_VIRT,
180 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
181 .length = SPBA0_SIZE,
182 .type = MT_DEVICE_NONSHARED,
183 }, {
184 .virtual = CS5_BASE_ADDR_VIRT,
185 .pfn = __phys_to_pfn(CS5_BASE_ADDR),
186 .length = CS5_SIZE,
187 .type = MT_DEVICE,
188 },
189};
190
191/*
192 * Set up static virtual mappings.
193 */
194static void __init mx31pdk_map_io(void)
195{
196 mx31_map_io();
197 iotable_init(mx31pdk_io_desc, ARRAY_SIZE(mx31pdk_io_desc));
59} 198}
60 199
61/*! 200/*!
@@ -63,7 +202,12 @@ static inline void mxc_init_imx_uart(void)
63 */ 202 */
64static void __init mxc_board_init(void) 203static void __init mxc_board_init(void)
65{ 204{
66 mxc_init_imx_uart(); 205 mxc_iomux_setup_multiple_pins(mx31pdk_pins, ARRAY_SIZE(mx31pdk_pins),
206 "mx31pdk");
207
208 mxc_register_device(&mxc_uart_device0, &uart_pdata);
209
210 mx31pdk_init_expio();
67} 211}
68 212
69static void __init mx31pdk_timer_init(void) 213static void __init mx31pdk_timer_init(void)
@@ -84,7 +228,7 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
84 .phys_io = AIPS1_BASE_ADDR, 228 .phys_io = AIPS1_BASE_ADDR,
85 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 229 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
86 .boot_params = PHYS_OFFSET + 0x100, 230 .boot_params = PHYS_OFFSET + 0x100,
87 .map_io = mxc_map_io, 231 .map_io = mx31pdk_map_io,
88 .init_irq = mxc_init_irq, 232 .init_irq = mxc_init_irq,
89 .init_machine = mxc_board_init, 233 .init_machine = mxc_board_init,
90 .timer = &mx31pdk_timer, 234 .timer = &mx31pdk_timer,
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index b5227d837b2f..c6f61a1f06c8 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -28,6 +28,10 @@
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29#include <linux/i2c.h> 29#include <linux/i2c.h>
30#include <linux/i2c/at24.h> 30#include <linux/i2c/at24.h>
31#include <linux/delay.h>
32#include <linux/spi/spi.h>
33#include <linux/irq.h>
34#include <linux/fsl_devices.h>
31 35
32#include <mach/hardware.h> 36#include <mach/hardware.h>
33#include <asm/mach-types.h> 37#include <asm/mach-types.h>
@@ -37,7 +41,9 @@
37#include <mach/common.h> 41#include <mach/common.h>
38#include <mach/imx-uart.h> 42#include <mach/imx-uart.h>
39#include <mach/iomux-mx3.h> 43#include <mach/iomux-mx3.h>
44#include <mach/ipu.h>
40#include <mach/board-pcm037.h> 45#include <mach/board-pcm037.h>
46#include <mach/mx3fb.h>
41#include <mach/mxc_nand.h> 47#include <mach/mxc_nand.h>
42#include <mach/mmc.h> 48#include <mach/mmc.h>
43#ifdef CONFIG_I2C_IMX 49#ifdef CONFIG_I2C_IMX
@@ -46,6 +52,76 @@
46 52
47#include "devices.h" 53#include "devices.h"
48 54
55static unsigned int pcm037_pins[] = {
56 /* I2C */
57 MX31_PIN_CSPI2_MOSI__SCL,
58 MX31_PIN_CSPI2_MISO__SDA,
59 /* SDHC1 */
60 MX31_PIN_SD1_DATA3__SD1_DATA3,
61 MX31_PIN_SD1_DATA2__SD1_DATA2,
62 MX31_PIN_SD1_DATA1__SD1_DATA1,
63 MX31_PIN_SD1_DATA0__SD1_DATA0,
64 MX31_PIN_SD1_CLK__SD1_CLK,
65 MX31_PIN_SD1_CMD__SD1_CMD,
66 IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */
67 IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */
68 /* SPI1 */
69 MX31_PIN_CSPI1_MOSI__MOSI,
70 MX31_PIN_CSPI1_MISO__MISO,
71 MX31_PIN_CSPI1_SCLK__SCLK,
72 MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
73 MX31_PIN_CSPI1_SS0__SS0,
74 MX31_PIN_CSPI1_SS1__SS1,
75 MX31_PIN_CSPI1_SS2__SS2,
76 /* UART1 */
77 MX31_PIN_CTS1__CTS1,
78 MX31_PIN_RTS1__RTS1,
79 MX31_PIN_TXD1__TXD1,
80 MX31_PIN_RXD1__RXD1,
81 /* UART2 */
82 MX31_PIN_TXD2__TXD2,
83 MX31_PIN_RXD2__RXD2,
84 MX31_PIN_CTS2__CTS2,
85 MX31_PIN_RTS2__RTS2,
86 /* UART3 */
87 MX31_PIN_CSPI3_MOSI__RXD3,
88 MX31_PIN_CSPI3_MISO__TXD3,
89 MX31_PIN_CSPI3_SCLK__RTS3,
90 MX31_PIN_CSPI3_SPI_RDY__CTS3,
91 /* LAN9217 irq pin */
92 IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
93 /* Onewire */
94 MX31_PIN_BATT_LINE__OWIRE,
95 /* Framebuffer */
96 MX31_PIN_LD0__LD0,
97 MX31_PIN_LD1__LD1,
98 MX31_PIN_LD2__LD2,
99 MX31_PIN_LD3__LD3,
100 MX31_PIN_LD4__LD4,
101 MX31_PIN_LD5__LD5,
102 MX31_PIN_LD6__LD6,
103 MX31_PIN_LD7__LD7,
104 MX31_PIN_LD8__LD8,
105 MX31_PIN_LD9__LD9,
106 MX31_PIN_LD10__LD10,
107 MX31_PIN_LD11__LD11,
108 MX31_PIN_LD12__LD12,
109 MX31_PIN_LD13__LD13,
110 MX31_PIN_LD14__LD14,
111 MX31_PIN_LD15__LD15,
112 MX31_PIN_LD16__LD16,
113 MX31_PIN_LD17__LD17,
114 MX31_PIN_VSYNC3__VSYNC3,
115 MX31_PIN_HSYNC__HSYNC,
116 MX31_PIN_FPSHIFT__FPSHIFT,
117 MX31_PIN_DRDY0__DRDY0,
118 MX31_PIN_D3_REV__D3_REV,
119 MX31_PIN_CONTRAST__CONTRAST,
120 MX31_PIN_D3_SPL__D3_SPL,
121 MX31_PIN_D3_CLS__D3_CLS,
122 MX31_PIN_LCS0__GPI03_23,
123};
124
49static struct physmap_flash_data pcm037_flash_data = { 125static struct physmap_flash_data pcm037_flash_data = {
50 .width = 2, 126 .width = 2,
51}; 127};
@@ -56,6 +132,54 @@ static struct resource pcm037_flash_resource = {
56 .flags = IORESOURCE_MEM, 132 .flags = IORESOURCE_MEM,
57}; 133};
58 134
135static int usbotg_pins[] = {
136 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
137 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
138 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
139 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
140 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
141 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
142 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
143 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
144 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
145 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
146 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
147 MX31_PIN_USBOTG_STP__USBOTG_STP,
148};
149
150/* USB OTG HS port */
151static int __init gpio_usbotg_hs_activate(void)
152{
153 int ret = mxc_iomux_setup_multiple_pins(usbotg_pins,
154 ARRAY_SIZE(usbotg_pins), "usbotg");
155
156 if (ret < 0) {
157 printk(KERN_ERR "Cannot set up OTG pins\n");
158 return ret;
159 }
160
161 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
162 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
163 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
164 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
165 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
166 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
167 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
168 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
169 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
170 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
171 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
172 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
173
174 return 0;
175}
176
177/* OTG config */
178static struct fsl_usb2_platform_data usb_pdata = {
179 .operating_mode = FSL_USB2_DR_DEVICE,
180 .phy_mode = FSL_USB2_PHY_ULPI,
181};
182
59static struct platform_device pcm037_flash = { 183static struct platform_device pcm037_flash = {
60 .name = "physmap-flash", 184 .name = "physmap-flash",
61 .id = 0, 185 .id = 0,
@@ -127,26 +251,8 @@ static struct mxc_nand_platform_data pcm037_nand_board_info = {
127}; 251};
128 252
129#ifdef CONFIG_I2C_IMX 253#ifdef CONFIG_I2C_IMX
130static int i2c_1_pins[] = {
131 MX31_PIN_CSPI2_MOSI__SCL,
132 MX31_PIN_CSPI2_MISO__SDA,
133};
134
135static int pcm037_i2c_1_init(struct device *dev)
136{
137 return mxc_iomux_setup_multiple_pins(i2c_1_pins, ARRAY_SIZE(i2c_1_pins),
138 "i2c-1");
139}
140
141static void pcm037_i2c_1_exit(struct device *dev)
142{
143 mxc_iomux_release_multiple_pins(i2c_1_pins, ARRAY_SIZE(i2c_1_pins));
144}
145
146static struct imxi2c_platform_data pcm037_i2c_1_data = { 254static struct imxi2c_platform_data pcm037_i2c_1_data = {
147 .bitrate = 100000, 255 .bitrate = 100000,
148 .init = pcm037_i2c_1_init,
149 .exit = pcm037_i2c_1_exit,
150}; 256};
151 257
152static struct at24_platform_data board_eeprom = { 258static struct at24_platform_data board_eeprom = {
@@ -166,48 +272,119 @@ static struct i2c_board_info pcm037_i2c_devices[] = {
166}; 272};
167#endif 273#endif
168 274
169static int sdhc1_pins[] = { 275/* Not connected by default */
170 MX31_PIN_SD1_DATA3__SD1_DATA3, 276#ifdef PCM970_SDHC_RW_SWITCH
171 MX31_PIN_SD1_DATA2__SD1_DATA2, 277static int pcm970_sdhc1_get_ro(struct device *dev)
172 MX31_PIN_SD1_DATA1__SD1_DATA1, 278{
173 MX31_PIN_SD1_DATA0__SD1_DATA0, 279 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6));
174 MX31_PIN_SD1_CLK__SD1_CLK, 280}
175 MX31_PIN_SD1_CMD__SD1_CMD, 281#endif
176}; 282
283#define SDHC1_GPIO_WP IOMUX_TO_GPIO(MX31_PIN_SFS6)
284#define SDHC1_GPIO_DET IOMUX_TO_GPIO(MX31_PIN_SCK6)
177 285
178static int pcm970_sdhc1_init(struct device *dev, irq_handler_t h, void *data) 286static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
287 void *data)
179{ 288{
180 return mxc_iomux_setup_multiple_pins(sdhc1_pins, ARRAY_SIZE(sdhc1_pins), 289 int ret;
181 "sdhc-1"); 290
291 ret = gpio_request(SDHC1_GPIO_DET, "sdhc-detect");
292 if (ret)
293 return ret;
294
295 gpio_direction_input(SDHC1_GPIO_DET);
296
297#ifdef PCM970_SDHC_RW_SWITCH
298 ret = gpio_request(SDHC1_GPIO_WP, "sdhc-wp");
299 if (ret)
300 goto err_gpio_free;
301 gpio_direction_input(SDHC1_GPIO_WP);
302#endif
303
304 ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), detect_irq,
305 IRQF_DISABLED | IRQF_TRIGGER_FALLING,
306 "sdhc-detect", data);
307 if (ret)
308 goto err_gpio_free_2;
309
310 return 0;
311
312err_gpio_free_2:
313#ifdef PCM970_SDHC_RW_SWITCH
314 gpio_free(SDHC1_GPIO_WP);
315err_gpio_free:
316#endif
317 gpio_free(SDHC1_GPIO_DET);
318
319 return ret;
182} 320}
183 321
184static void pcm970_sdhc1_exit(struct device *dev, void *data) 322static void pcm970_sdhc1_exit(struct device *dev, void *data)
185{ 323{
186 mxc_iomux_release_multiple_pins(sdhc1_pins, ARRAY_SIZE(sdhc1_pins)); 324 free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), data);
325 gpio_free(SDHC1_GPIO_DET);
326 gpio_free(SDHC1_GPIO_WP);
187} 327}
188 328
189/* No card and rw detection at the moment */
190static struct imxmmc_platform_data sdhc_pdata = { 329static struct imxmmc_platform_data sdhc_pdata = {
330#ifdef PCM970_SDHC_RW_SWITCH
331 .get_ro = pcm970_sdhc1_get_ro,
332#endif
191 .init = pcm970_sdhc1_init, 333 .init = pcm970_sdhc1_init,
192 .exit = pcm970_sdhc1_exit, 334 .exit = pcm970_sdhc1_exit,
193}; 335};
194 336
195static struct platform_device *devices[] __initdata = { 337static struct platform_device *devices[] __initdata = {
196 &pcm037_flash, 338 &pcm037_flash,
197 &pcm037_eth,
198 &pcm037_sram_device, 339 &pcm037_sram_device,
199}; 340};
200 341
201static int uart0_pins[] = { 342static struct ipu_platform_data mx3_ipu_data = {
202 MX31_PIN_CTS1__CTS1, 343 .irq_base = MXC_IPU_IRQ_START,
203 MX31_PIN_RTS1__RTS1,
204 MX31_PIN_TXD1__TXD1,
205 MX31_PIN_RXD1__RXD1
206}; 344};
207 345
208static int uart2_pins[] = { 346static const struct fb_videomode fb_modedb[] = {
209 MX31_PIN_CSPI3_MOSI__RXD3, 347 {
210 MX31_PIN_CSPI3_MISO__TXD3 348 /* 240x320 @ 60 Hz Sharp */
349 .name = "Sharp-LQ035Q7DH06-QVGA",
350 .refresh = 60,
351 .xres = 240,
352 .yres = 320,
353 .pixclock = 185925,
354 .left_margin = 9,
355 .right_margin = 16,
356 .upper_margin = 7,
357 .lower_margin = 9,
358 .hsync_len = 1,
359 .vsync_len = 1,
360 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
361 FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
362 .vmode = FB_VMODE_NONINTERLACED,
363 .flag = 0,
364 }, {
365 /* 240x320 @ 60 Hz */
366 .name = "TX090",
367 .refresh = 60,
368 .xres = 240,
369 .yres = 320,
370 .pixclock = 38255,
371 .left_margin = 144,
372 .right_margin = 0,
373 .upper_margin = 7,
374 .lower_margin = 40,
375 .hsync_len = 96,
376 .vsync_len = 1,
377 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
378 .vmode = FB_VMODE_NONINTERLACED,
379 .flag = 0,
380 },
381};
382
383static struct mx3fb_platform_data mx3fb_pdata = {
384 .dma_dev = &mx3_ipu.dev,
385 .name = "Sharp-LQ035Q7DH06-QVGA",
386 .mode = fb_modedb,
387 .num_modes = ARRAY_SIZE(fb_modedb),
211}; 388};
212 389
213/* 390/*
@@ -215,21 +392,28 @@ static int uart2_pins[] = {
215 */ 392 */
216static void __init mxc_board_init(void) 393static void __init mxc_board_init(void)
217{ 394{
395 int ret;
396
397 mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
398 "pcm037");
399
218 platform_add_devices(devices, ARRAY_SIZE(devices)); 400 platform_add_devices(devices, ARRAY_SIZE(devices));
219 401
220 mxc_iomux_setup_multiple_pins(uart0_pins, ARRAY_SIZE(uart0_pins), "uart-0");
221 mxc_register_device(&mxc_uart_device0, &uart_pdata); 402 mxc_register_device(&mxc_uart_device0, &uart_pdata);
222 403 mxc_register_device(&mxc_uart_device1, &uart_pdata);
223 mxc_iomux_setup_multiple_pins(uart2_pins, ARRAY_SIZE(uart2_pins), "uart-2");
224 mxc_register_device(&mxc_uart_device2, &uart_pdata); 404 mxc_register_device(&mxc_uart_device2, &uart_pdata);
225 405
226 mxc_iomux_setup_pin(MX31_PIN_BATT_LINE__OWIRE, "batt-0wire");
227 mxc_register_device(&mxc_w1_master_device, NULL); 406 mxc_register_device(&mxc_w1_master_device, NULL);
228 407
229 /* LAN9217 IRQ pin */ 408 /* LAN9217 IRQ pin */
230 if (!mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO), 409 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq");
231 "pcm037-eth")) 410 if (ret)
411 pr_warning("could not get LAN irq gpio\n");
412 else {
232 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)); 413 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
414 platform_device_register(&pcm037_eth);
415 }
416
233 417
234#ifdef CONFIG_I2C_IMX 418#ifdef CONFIG_I2C_IMX
235 i2c_register_board_info(1, pcm037_i2c_devices, 419 i2c_register_board_info(1, pcm037_i2c_devices,
@@ -239,6 +423,10 @@ static void __init mxc_board_init(void)
239#endif 423#endif
240 mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); 424 mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
241 mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); 425 mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
426 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
427 mxc_register_device(&mx3_fb, &mx3fb_pdata);
428 if (!gpio_usbotg_hs_activate())
429 mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
242} 430}
243 431
244static void __init pcm037_timer_init(void) 432static void __init pcm037_timer_init(void)
@@ -255,7 +443,7 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037")
255 .phys_io = AIPS1_BASE_ADDR, 443 .phys_io = AIPS1_BASE_ADDR,
256 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 444 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
257 .boot_params = PHYS_OFFSET + 0x100, 445 .boot_params = PHYS_OFFSET + 0x100,
258 .map_io = mxc_map_io, 446 .map_io = mx31_map_io,
259 .init_irq = mxc_init_irq, 447 .init_irq = mxc_init_irq,
260 .init_machine = mxc_board_init, 448 .init_machine = mxc_board_init,
261 .timer = &pcm037_timer, 449 .timer = &pcm037_timer,
diff --git a/arch/arm/mach-mx3/pcm043.c b/arch/arm/mach-mx3/pcm043.c
new file mode 100644
index 000000000000..8d27c324abf2
--- /dev/null
+++ b/arch/arm/mach-mx3/pcm043.c
@@ -0,0 +1,252 @@
1/*
2 * Copyright (C) 2009 Sascha Hauer, Pengutronix
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#include <linux/types.h>
20#include <linux/init.h>
21
22#include <linux/platform_device.h>
23#include <linux/mtd/physmap.h>
24#include <linux/mtd/plat-ram.h>
25#include <linux/memory.h>
26#include <linux/gpio.h>
27#include <linux/smc911x.h>
28#include <linux/interrupt.h>
29#include <linux/i2c.h>
30#include <linux/i2c/at24.h>
31
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <asm/mach/time.h>
35#include <asm/mach/map.h>
36
37#include <mach/hardware.h>
38#include <mach/common.h>
39#include <mach/imx-uart.h>
40#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE
41#include <mach/i2c.h>
42#endif
43#include <mach/iomux-mx35.h>
44#include <mach/ipu.h>
45#include <mach/mx3fb.h>
46
47#include "devices.h"
48
49static const struct fb_videomode fb_modedb[] = {
50 {
51 /* 240x320 @ 60 Hz */
52 .name = "Sharp-LQ035Q7",
53 .refresh = 60,
54 .xres = 240,
55 .yres = 320,
56 .pixclock = 185925,
57 .left_margin = 9,
58 .right_margin = 16,
59 .upper_margin = 7,
60 .lower_margin = 9,
61 .hsync_len = 1,
62 .vsync_len = 1,
63 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
64 .vmode = FB_VMODE_NONINTERLACED,
65 .flag = 0,
66 }, {
67 /* 240x320 @ 60 Hz */
68 .name = "TX090",
69 .refresh = 60,
70 .xres = 240,
71 .yres = 320,
72 .pixclock = 38255,
73 .left_margin = 144,
74 .right_margin = 0,
75 .upper_margin = 7,
76 .lower_margin = 40,
77 .hsync_len = 96,
78 .vsync_len = 1,
79 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
80 .vmode = FB_VMODE_NONINTERLACED,
81 .flag = 0,
82 },
83};
84
85static struct ipu_platform_data mx3_ipu_data = {
86 .irq_base = MXC_IPU_IRQ_START,
87};
88
89static struct mx3fb_platform_data mx3fb_pdata = {
90 .dma_dev = &mx3_ipu.dev,
91 .name = "Sharp-LQ035Q7",
92 .mode = fb_modedb,
93 .num_modes = ARRAY_SIZE(fb_modedb),
94};
95
96static struct physmap_flash_data pcm043_flash_data = {
97 .width = 2,
98};
99
100static struct resource pcm043_flash_resource = {
101 .start = 0xa0000000,
102 .end = 0xa1ffffff,
103 .flags = IORESOURCE_MEM,
104};
105
106static struct platform_device pcm043_flash = {
107 .name = "physmap-flash",
108 .id = 0,
109 .dev = {
110 .platform_data = &pcm043_flash_data,
111 },
112 .resource = &pcm043_flash_resource,
113 .num_resources = 1,
114};
115
116static struct imxuart_platform_data uart_pdata = {
117 .flags = IMXUART_HAVE_RTSCTS,
118};
119
120#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE
121static struct imxi2c_platform_data pcm043_i2c_1_data = {
122 .bitrate = 50000,
123};
124
125static struct at24_platform_data board_eeprom = {
126 .byte_len = 4096,
127 .page_size = 32,
128 .flags = AT24_FLAG_ADDR16,
129};
130
131static struct i2c_board_info pcm043_i2c_devices[] = {
132 {
133 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
134 .platform_data = &board_eeprom,
135 }, {
136 I2C_BOARD_INFO("rtc-pcf8563", 0x51),
137 .type = "pcf8563",
138 }
139};
140#endif
141
142static struct platform_device *devices[] __initdata = {
143 &pcm043_flash,
144 &mxc_fec_device,
145};
146
147static struct pad_desc pcm043_pads[] = {
148 /* UART1 */
149 MX35_PAD_CTS1__UART1_CTS,
150 MX35_PAD_RTS1__UART1_RTS,
151 MX35_PAD_TXD1__UART1_TXD_MUX,
152 MX35_PAD_RXD1__UART1_RXD_MUX,
153 /* UART2 */
154 MX35_PAD_CTS2__UART2_CTS,
155 MX35_PAD_RTS2__UART2_RTS,
156 MX35_PAD_TXD2__UART2_TXD_MUX,
157 MX35_PAD_RXD2__UART2_RXD_MUX,
158 /* FEC */
159 MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
160 MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
161 MX35_PAD_FEC_RX_DV__FEC_RX_DV,
162 MX35_PAD_FEC_COL__FEC_COL,
163 MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
164 MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
165 MX35_PAD_FEC_TX_EN__FEC_TX_EN,
166 MX35_PAD_FEC_MDC__FEC_MDC,
167 MX35_PAD_FEC_MDIO__FEC_MDIO,
168 MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
169 MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
170 MX35_PAD_FEC_CRS__FEC_CRS,
171 MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
172 MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
173 MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
174 MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
175 MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
176 MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
177 /* I2C1 */
178 MX35_PAD_I2C1_CLK__I2C1_SCL,
179 MX35_PAD_I2C1_DAT__I2C1_SDA,
180 /* Display */
181 MX35_PAD_LD0__IPU_DISPB_DAT_0,
182 MX35_PAD_LD1__IPU_DISPB_DAT_1,
183 MX35_PAD_LD2__IPU_DISPB_DAT_2,
184 MX35_PAD_LD3__IPU_DISPB_DAT_3,
185 MX35_PAD_LD4__IPU_DISPB_DAT_4,
186 MX35_PAD_LD5__IPU_DISPB_DAT_5,
187 MX35_PAD_LD6__IPU_DISPB_DAT_6,
188 MX35_PAD_LD7__IPU_DISPB_DAT_7,
189 MX35_PAD_LD8__IPU_DISPB_DAT_8,
190 MX35_PAD_LD9__IPU_DISPB_DAT_9,
191 MX35_PAD_LD10__IPU_DISPB_DAT_10,
192 MX35_PAD_LD11__IPU_DISPB_DAT_11,
193 MX35_PAD_LD12__IPU_DISPB_DAT_12,
194 MX35_PAD_LD13__IPU_DISPB_DAT_13,
195 MX35_PAD_LD14__IPU_DISPB_DAT_14,
196 MX35_PAD_LD15__IPU_DISPB_DAT_15,
197 MX35_PAD_LD16__IPU_DISPB_DAT_16,
198 MX35_PAD_LD17__IPU_DISPB_DAT_17,
199 MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
200 MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
201 MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
202 MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
203 MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
204 MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
205 MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
206 MX35_PAD_D3_SPL__IPU_DISPB_D3_SPL
207};
208
209/*
210 * Board specific initialization.
211 */
212static void __init mxc_board_init(void)
213{
214 mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads));
215
216 platform_add_devices(devices, ARRAY_SIZE(devices));
217
218 mxc_register_device(&mxc_uart_device0, &uart_pdata);
219
220 mxc_register_device(&mxc_uart_device1, &uart_pdata);
221
222#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE
223 i2c_register_board_info(0, pcm043_i2c_devices,
224 ARRAY_SIZE(pcm043_i2c_devices));
225
226 mxc_register_device(&mxc_i2c_device0, &pcm043_i2c_1_data);
227#endif
228
229 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
230 mxc_register_device(&mx3_fb, &mx3fb_pdata);
231}
232
233static void __init pcm043_timer_init(void)
234{
235 mx35_clocks_init();
236}
237
238struct sys_timer pcm043_timer = {
239 .init = pcm043_timer_init,
240};
241
242MACHINE_START(PCM043, "Phytec Phycore pcm043")
243 /* Maintainer: Pengutronix */
244 .phys_io = AIPS1_BASE_ADDR,
245 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
246 .boot_params = PHYS_OFFSET + 0x100,
247 .map_io = mx35_map_io,
248 .init_irq = mxc_init_irq,
249 .init_machine = mxc_board_init,
250 .timer = &pcm043_timer,
251MACHINE_END
252
diff --git a/arch/arm/mach-mx3/qong.c b/arch/arm/mach-mx3/qong.c
index 5a01e48fd8f1..82b31c4ab11f 100644
--- a/arch/arm/mach-mx3/qong.c
+++ b/arch/arm/mach-mx3/qong.c
@@ -279,7 +279,7 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
279 .phys_io = AIPS1_BASE_ADDR, 279 .phys_io = AIPS1_BASE_ADDR,
280 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 280 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
281 .boot_params = PHYS_OFFSET + 0x100, 281 .boot_params = PHYS_OFFSET + 0x100,
282 .map_io = mxc_map_io, 282 .map_io = mx31_map_io,
283 .init_irq = mxc_init_irq, 283 .init_irq = mxc_init_irq,
284 .init_machine = mxc_board_init, 284 .init_machine = mxc_board_init,
285 .timer = &qong_timer, 285 .timer = &qong_timer,
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-13 05:27:18 -0500