aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-mx3
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-mx3')
-rw-r--r--arch/arm/mach-mx3/Kconfig2
-rw-r--r--arch/arm/mach-mx3/Makefile32
-rw-r--r--arch/arm/mach-mx3/clock-imx31.c (renamed from arch/arm/mach-mx3/clock.c)5
-rw-r--r--arch/arm/mach-mx3/clock-imx35.c5
-rw-r--r--arch/arm/mach-mx3/cpu.c2
-rw-r--r--arch/arm/mach-mx3/crm_regs.h2
-rw-r--r--arch/arm/mach-mx3/iomux-imx31.c (renamed from arch/arm/mach-mx3/iomux.c)2
-rw-r--r--arch/arm/mach-mx3/mach-armadillo5x0.c (renamed from arch/arm/mach-mx3/armadillo5x0.c)14
-rw-r--r--arch/arm/mach-mx3/mach-kzm_arm11_01.c (renamed from arch/arm/mach-mx3/kzmarm11.c)33
-rw-r--r--arch/arm/mach-mx3/mach-mx31_3ds.c (renamed from arch/arm/mach-mx3/mx31pdk.c)12
-rw-r--r--arch/arm/mach-mx3/mach-mx31ads.c (renamed from arch/arm/mach-mx3/mx31ads.c)44
-rw-r--r--arch/arm/mach-mx3/mach-mx31lilly.c (renamed from arch/arm/mach-mx3/mx31lilly.c)10
-rw-r--r--arch/arm/mach-mx3/mach-mx31lite.c (renamed from arch/arm/mach-mx3/mx31lite.c)16
-rw-r--r--arch/arm/mach-mx3/mach-mx31moboard.c (renamed from arch/arm/mach-mx3/mx31moboard.c)49
-rw-r--r--arch/arm/mach-mx3/mach-mx35pdk.c (renamed from arch/arm/mach-mx3/mx35pdk.c)6
-rw-r--r--arch/arm/mach-mx3/mach-pcm037.c (renamed from arch/arm/mach-mx3/pcm037.c)155
-rw-r--r--arch/arm/mach-mx3/mach-pcm037_eet.c (renamed from arch/arm/mach-mx3/pcm037_eet.c)0
-rw-r--r--arch/arm/mach-mx3/mach-pcm043.c (renamed from arch/arm/mach-mx3/pcm043.c)160
-rw-r--r--arch/arm/mach-mx3/mach-qong.c (renamed from arch/arm/mach-mx3/qong.c)20
-rw-r--r--arch/arm/mach-mx3/mx31lite-db.c30
-rw-r--r--arch/arm/mach-mx3/mx31moboard-devboard.c32
-rw-r--r--arch/arm/mach-mx3/mx31moboard-marxbot.c39
-rw-r--r--arch/arm/mach-mx3/mx31moboard-smartbot.c162
23 files changed, 629 insertions, 203 deletions
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index 28294416b0af..3872af1cf2c3 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -34,6 +34,7 @@ config MACH_MX31ADS_WM1133_EV1
34config MACH_PCM037 34config MACH_PCM037
35 bool "Support Phytec pcm037 (i.MX31) platforms" 35 bool "Support Phytec pcm037 (i.MX31) platforms"
36 select ARCH_MX31 36 select ARCH_MX31
37 select MXC_ULPI if USB_ULPI
37 help 38 help
38 Include support for Phytec pcm037 platform. This includes 39 Include support for Phytec pcm037 platform. This includes
39 specific configurations for the board and its peripherals. 40 specific configurations for the board and its peripherals.
@@ -86,6 +87,7 @@ config MACH_QONG
86config MACH_PCM043 87config MACH_PCM043
87 bool "Support Phytec pcm043 (i.MX35) platforms" 88 bool "Support Phytec pcm043 (i.MX35) platforms"
88 select ARCH_MX35 89 select ARCH_MX35
90 select MXC_ULPI if USB_ULPI
89 help 91 help
90 Include support for Phytec pcm043 platform. This includes 92 Include support for Phytec pcm043 platform. This includes
91 specific configurations for the board and its peripherals. 93 specific configurations for the board and its peripherals.
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 93c7b296be6a..5d650fda5d5d 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -5,18 +5,22 @@
5# Object file lists. 5# Object file lists.
6 6
7obj-y := mm.o devices.o cpu.o 7obj-y := mm.o devices.o cpu.o
8obj-$(CONFIG_ARCH_MX31) += clock.o iomux.o 8CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
9CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
10CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
11obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o
9obj-$(CONFIG_ARCH_MX35) += clock-imx35.o 12obj-$(CONFIG_ARCH_MX35) += clock-imx35.o
10obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o 13obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
11obj-$(CONFIG_MACH_MX31LILLY) += mx31lilly.o mx31lilly-db.o 14obj-$(CONFIG_MACH_MX31LILLY) += mach-mx31lilly.o mx31lilly-db.o
12obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o mx31lite-db.o 15obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o
13obj-$(CONFIG_MACH_PCM037) += pcm037.o 16obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o
14obj-$(CONFIG_MACH_PCM037_EET) += pcm037_eet.o 17obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o
15obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o 18obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o
16obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o mx31moboard-devboard.o \ 19CFLAGS_mach-mx31_3ds.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
17 mx31moboard-marxbot.o 20obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \
18obj-$(CONFIG_MACH_QONG) += qong.o 21 mx31moboard-marxbot.o mx31moboard-smartbot.o
19obj-$(CONFIG_MACH_PCM043) += pcm043.o 22obj-$(CONFIG_MACH_QONG) += mach-qong.o
20obj-$(CONFIG_MACH_ARMADILLO5X0) += armadillo5x0.o 23obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
21obj-$(CONFIG_MACH_MX35_3DS) += mx35pdk.o 24obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
22obj-$(CONFIG_MACH_KZM_ARM11_01) += kzmarm11.o 25obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35pdk.o
26obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock-imx31.c
index 27a318af0d20..d22a66f502a8 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock-imx31.c
@@ -618,14 +618,15 @@ int __init mx31_clocks_init(unsigned long fref)
618 618
619 mx31_read_cpu_rev(); 619 mx31_read_cpu_rev();
620 620
621 if (mx31_revision() >= CHIP_REV_2_0) { 621 if (mx31_revision() >= MX31_CHIP_REV_2_0) {
622 reg = __raw_readl(MXC_CCM_PMCR1); 622 reg = __raw_readl(MXC_CCM_PMCR1);
623 /* No PLL restart on DVFS switch; enable auto EMI handshake */ 623 /* No PLL restart on DVFS switch; enable auto EMI handshake */
624 reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN; 624 reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN;
625 __raw_writel(reg, MXC_CCM_PMCR1); 625 __raw_writel(reg, MXC_CCM_PMCR1);
626 } 626 }
627 627
628 mxc_timer_init(&ipg_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); 628 mxc_timer_init(&ipg_clk, MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR),
629 MX31_INT_GPT);
629 630
630 return 0; 631 return 0;
631} 632}
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 7584b4c6c556..07d630ebc286 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -28,7 +28,7 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <mach/common.h> 29#include <mach/common.h>
30 30
31#define CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) 31#define CCM_BASE MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR)
32 32
33#define CCM_CCMR 0x00 33#define CCM_CCMR 0x00
34#define CCM_PDR0 0x04 34#define CCM_PDR0 0x04
@@ -504,7 +504,8 @@ int __init mx35_clocks_init()
504 __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2); 504 __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2);
505 __raw_writel(0, CCM_BASE + CCM_CGR3); 505 __raw_writel(0, CCM_BASE + CCM_CGR3);
506 506
507 mxc_timer_init(&gpt_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); 507 mxc_timer_init(&gpt_clk,
508 MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
508 509
509 return 0; 510 return 0;
510} 511}
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index db828809c675..861afe0fe3ad 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -41,7 +41,7 @@ void __init mx31_read_cpu_rev(void)
41 u32 i, srev; 41 u32 i, srev;
42 42
43 /* read SREV register from IIM module */ 43 /* read SREV register from IIM module */
44 srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR) + MXC_IIMSREV); 44 srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR + MXC_IIMSREV));
45 45
46 for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) 46 for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
47 if (srev == mx31_cpu_type[i].srev) { 47 if (srev == mx31_cpu_type[i].srev) {
diff --git a/arch/arm/mach-mx3/crm_regs.h b/arch/arm/mach-mx3/crm_regs.h
index adfa3627ad84..37a8a07beda3 100644
--- a/arch/arm/mach-mx3/crm_regs.h
+++ b/arch/arm/mach-mx3/crm_regs.h
@@ -24,7 +24,7 @@
24#define CKIH_CLK_FREQ_27MHZ 27000000 24#define CKIH_CLK_FREQ_27MHZ 27000000
25#define CKIL_CLK_FREQ 32768 25#define CKIL_CLK_FREQ 32768
26 26
27#define MXC_CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) 27#define MXC_CCM_BASE MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR)
28 28
29/* Register addresses */ 29/* Register addresses */
30#define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00) 30#define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00)
diff --git a/arch/arm/mach-mx3/iomux.c b/arch/arm/mach-mx3/iomux-imx31.c
index c66ccbcdc11b..a1d7fa5123dc 100644
--- a/arch/arm/mach-mx3/iomux.c
+++ b/arch/arm/mach-mx3/iomux-imx31.c
@@ -29,7 +29,7 @@
29/* 29/*
30 * IOMUX register (base) addresses 30 * IOMUX register (base) addresses
31 */ 31 */
32#define IOMUX_BASE IO_ADDRESS(IOMUXC_BASE_ADDR) 32#define IOMUX_BASE MX31_IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)
33#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000) 33#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000)
34#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004) 34#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004)
35#define IOMUXGPR (IOMUX_BASE + 0x008) 35#define IOMUXGPR (IOMUX_BASE + 0x008)
diff --git a/arch/arm/mach-mx3/armadillo5x0.c b/arch/arm/mach-mx3/mach-armadillo5x0.c
index 54aab401dbdf..3d72b0b89705 100644
--- a/arch/arm/mach-mx3/armadillo5x0.c
+++ b/arch/arm/mach-mx3/mach-armadillo5x0.c
@@ -182,8 +182,8 @@ static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
182 182
183static struct resource armadillo5x0_nor_flash_resource = { 183static struct resource armadillo5x0_nor_flash_resource = {
184 .flags = IORESOURCE_MEM, 184 .flags = IORESOURCE_MEM,
185 .start = CS0_BASE_ADDR, 185 .start = MX31_CS0_BASE_ADDR,
186 .end = CS0_BASE_ADDR + SZ_64M - 1, 186 .end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
187}; 187};
188 188
189static struct platform_device armadillo5x0_nor_flash = { 189static struct platform_device armadillo5x0_nor_flash = {
@@ -311,8 +311,8 @@ static struct imxmmc_platform_data sdhc_pdata = {
311 */ 311 */
312static struct resource armadillo5x0_smc911x_resources[] = { 312static struct resource armadillo5x0_smc911x_resources[] = {
313 { 313 {
314 .start = CS3_BASE_ADDR, 314 .start = MX31_CS3_BASE_ADDR,
315 .end = CS3_BASE_ADDR + SZ_32M - 1, 315 .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
316 .flags = IORESOURCE_MEM, 316 .flags = IORESOURCE_MEM,
317 }, { 317 }, {
318 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0), 318 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
@@ -406,9 +406,9 @@ static struct sys_timer armadillo5x0_timer = {
406 406
407MACHINE_START(ARMADILLO5X0, "Armadillo-500") 407MACHINE_START(ARMADILLO5X0, "Armadillo-500")
408 /* Maintainer: Alberto Panizzo */ 408 /* Maintainer: Alberto Panizzo */
409 .phys_io = AIPS1_BASE_ADDR, 409 .phys_io = MX31_AIPS1_BASE_ADDR,
410 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 410 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
411 .boot_params = PHYS_OFFSET + 0x00000100, 411 .boot_params = MX3x_PHYS_OFFSET + 0x100,
412 .map_io = mx31_map_io, 412 .map_io = mx31_map_io,
413 .init_irq = mx31_init_irq, 413 .init_irq = mx31_init_irq,
414 .timer = &armadillo5x0_timer, 414 .timer = &armadillo5x0_timer,
diff --git a/arch/arm/mach-mx3/kzmarm11.c b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
index 6fa99ce3008a..f085d5d1a6de 100644
--- a/arch/arm/mach-mx3/kzmarm11.c
+++ b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
@@ -46,13 +46,18 @@
46 46
47#include "devices.h" 47#include "devices.h"
48 48
49#define KZM_ARM11_IO_ADDRESS(x) ( \
50 IMX_IO_ADDRESS(x, MX31_CS4) ?: \
51 IMX_IO_ADDRESS(x, MX31_CS5) ?: \
52 MX31_IO_ADDRESS(x))
53
49#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) 54#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
50/* 55/*
51 * KZM-ARM11-01 has an external UART on FPGA 56 * KZM-ARM11-01 has an external UART on FPGA
52 */ 57 */
53static struct plat_serial8250_port serial_platform_data[] = { 58static struct plat_serial8250_port serial_platform_data[] = {
54 { 59 {
55 .membase = IO_ADDRESS(KZM_ARM11_16550), 60 .membase = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
56 .mapbase = KZM_ARM11_16550, 61 .mapbase = KZM_ARM11_16550,
57 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), 62 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
58 .irqflags = IRQ_TYPE_EDGE_RISING, 63 .irqflags = IRQ_TYPE_EDGE_RISING,
@@ -102,9 +107,9 @@ static int __init kzm_init_ext_uart(void)
102 /* 107 /*
103 * Unmask UART interrupt 108 * Unmask UART interrupt
104 */ 109 */
105 tmp = __raw_readb(IO_ADDRESS(KZM_ARM11_CTL1)); 110 tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
106 tmp |= 0x2; 111 tmp |= 0x2;
107 __raw_writeb(tmp, IO_ADDRESS(KZM_ARM11_CTL1)); 112 __raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
108 113
109 return platform_device_register(&serial_device); 114 return platform_device_register(&serial_device);
110} 115}
@@ -128,8 +133,8 @@ static struct smsc911x_platform_config kzm_smsc9118_config = {
128 133
129static struct resource kzm_smsc9118_resources[] = { 134static struct resource kzm_smsc9118_resources[] = {
130 { 135 {
131 .start = CS5_BASE_ADDR, 136 .start = MX31_CS5_BASE_ADDR,
132 .end = CS5_BASE_ADDR + SZ_128K - 1, 137 .end = MX31_CS5_BASE_ADDR + SZ_128K - 1,
133 .flags = IORESOURCE_MEM, 138 .flags = IORESOURCE_MEM,
134 }, 139 },
135 { 140 {
@@ -222,15 +227,15 @@ static void __init kzm_board_init(void)
222 */ 227 */
223static struct map_desc kzm_io_desc[] __initdata = { 228static struct map_desc kzm_io_desc[] __initdata = {
224 { 229 {
225 .virtual = CS4_BASE_ADDR_VIRT, 230 .virtual = MX31_CS4_BASE_ADDR_VIRT,
226 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 231 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
227 .length = CS4_SIZE, 232 .length = MX31_CS4_SIZE,
228 .type = MT_DEVICE 233 .type = MT_DEVICE
229 }, 234 },
230 { 235 {
231 .virtual = CS5_BASE_ADDR_VIRT, 236 .virtual = MX31_CS5_BASE_ADDR_VIRT,
232 .pfn = __phys_to_pfn(CS5_BASE_ADDR), 237 .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
233 .length = CS5_SIZE, 238 .length = MX31_CS5_SIZE,
234 .type = MT_DEVICE 239 .type = MT_DEVICE
235 }, 240 },
236}; 241};
@@ -258,9 +263,9 @@ static struct sys_timer kzm_timer = {
258 * initialize __mach_desc_KZM_ARM11_01 data structure. 263 * initialize __mach_desc_KZM_ARM11_01 data structure.
259 */ 264 */
260MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01") 265MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
261 .phys_io = AIPS1_BASE_ADDR, 266 .phys_io = MX31_AIPS1_BASE_ADDR,
262 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 267 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
263 .boot_params = PHYS_OFFSET + 0x100, 268 .boot_params = MX3x_PHYS_OFFSET + 0x100,
264 .map_io = kzm_map_io, 269 .map_io = kzm_map_io,
265 .init_irq = mx31_init_irq, 270 .init_irq = mx31_init_irq,
266 .init_machine = kzm_board_init, 271 .init_machine = kzm_board_init,
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index 18715f1aa7eb..b88c18ad7698 100644
--- a/arch/arm/mach-mx3/mx31pdk.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -211,9 +211,9 @@ static int __init mx31pdk_init_expio(void)
211 */ 211 */
212static struct map_desc mx31pdk_io_desc[] __initdata = { 212static struct map_desc mx31pdk_io_desc[] __initdata = {
213 { 213 {
214 .virtual = CS5_BASE_ADDR_VIRT, 214 .virtual = MX31_CS5_BASE_ADDR_VIRT,
215 .pfn = __phys_to_pfn(CS5_BASE_ADDR), 215 .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
216 .length = CS5_SIZE, 216 .length = MX31_CS5_SIZE,
217 .type = MT_DEVICE, 217 .type = MT_DEVICE,
218 }, 218 },
219}; 219};
@@ -256,9 +256,9 @@ static struct sys_timer mx31pdk_timer = {
256 */ 256 */
257MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") 257MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
258 /* Maintainer: Freescale Semiconductor, Inc. */ 258 /* Maintainer: Freescale Semiconductor, Inc. */
259 .phys_io = AIPS1_BASE_ADDR, 259 .phys_io = MX31_AIPS1_BASE_ADDR,
260 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 260 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
261 .boot_params = PHYS_OFFSET + 0x100, 261 .boot_params = MX3x_PHYS_OFFSET + 0x100,
262 .map_io = mx31pdk_map_io, 262 .map_io = mx31pdk_map_io,
263 .init_irq = mx31_init_irq, 263 .init_irq = mx31_init_irq,
264 .init_machine = mxc_board_init, 264 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c
index 938c549767dc..b3d1a1895c20 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mach-mx31ads.c
@@ -60,7 +60,7 @@
60static struct plat_serial8250_port serial_platform_data[] = { 60static struct plat_serial8250_port serial_platform_data[] = {
61 { 61 {
62 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA), 62 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA),
63 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTA), 63 .mapbase = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTA),
64 .irq = EXPIO_INT_XUART_INTA, 64 .irq = EXPIO_INT_XUART_INTA,
65 .uartclk = 14745600, 65 .uartclk = 14745600,
66 .regshift = 0, 66 .regshift = 0,
@@ -68,7 +68,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
68 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ, 68 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
69 }, { 69 }, {
70 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB), 70 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB),
71 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB), 71 .mapbase = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTB),
72 .irq = EXPIO_INT_XUART_INTB, 72 .irq = EXPIO_INT_XUART_INTB,
73 .uartclk = 14745600, 73 .uartclk = 14745600,
74 .regshift = 0, 74 .regshift = 0,
@@ -309,12 +309,8 @@ static struct regulator_init_data ldo1_data = {
309}; 309};
310 310
311static struct regulator_consumer_supply ldo2_consumers[] = { 311static struct regulator_consumer_supply ldo2_consumers[] = {
312 { 312 { .supply = "AVDD", .dev_name = "1-001a" },
313 .supply = "AVDD", 313 { .supply = "HPVDD", .dev_name = "1-001a" },
314 },
315 {
316 .supply = "HPVDD",
317 },
318}; 314};
319 315
320/* CODEC and SIM */ 316/* CODEC and SIM */
@@ -385,8 +381,6 @@ static struct wm8350_audio_platform_data imx32ads_wm8350_setup = {
385 381
386static int mx31_wm8350_init(struct wm8350 *wm8350) 382static int mx31_wm8350_init(struct wm8350 *wm8350)
387{ 383{
388 int i;
389
390 wm8350_gpio_config(wm8350, 0, WM8350_GPIO_DIR_IN, 384 wm8350_gpio_config(wm8350, 0, WM8350_GPIO_DIR_IN,
391 WM8350_GPIO0_PWR_ON_IN, WM8350_GPIO_ACTIVE_LOW, 385 WM8350_GPIO0_PWR_ON_IN, WM8350_GPIO_ACTIVE_LOW,
392 WM8350_GPIO_PULL_UP, WM8350_GPIO_INVERT_OFF, 386 WM8350_GPIO_PULL_UP, WM8350_GPIO_INVERT_OFF,
@@ -422,10 +416,6 @@ static int mx31_wm8350_init(struct wm8350 *wm8350)
422 WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF, 416 WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF,
423 WM8350_GPIO_DEBOUNCE_OFF); 417 WM8350_GPIO_DEBOUNCE_OFF);
424 418
425 /* Fix up for our own supplies. */
426 for (i = 0; i < ARRAY_SIZE(ldo2_consumers); i++)
427 ldo2_consumers[i].dev = wm8350->dev;
428
429 wm8350_register_regulator(wm8350, WM8350_DCDC_1, &sw1a_data); 419 wm8350_register_regulator(wm8350, WM8350_DCDC_1, &sw1a_data);
430 wm8350_register_regulator(wm8350, WM8350_DCDC_3, &viohi_data); 420 wm8350_register_regulator(wm8350, WM8350_DCDC_3, &viohi_data);
431 wm8350_register_regulator(wm8350, WM8350_DCDC_4, &violo_data); 421 wm8350_register_regulator(wm8350, WM8350_DCDC_4, &violo_data);
@@ -493,14 +483,27 @@ static void mxc_init_i2c(void)
493} 483}
494#endif 484#endif
495 485
486static unsigned int ssi_pins[] = {
487 MX31_PIN_SFS5__SFS5,
488 MX31_PIN_SCK5__SCK5,
489 MX31_PIN_SRXD5__SRXD5,
490 MX31_PIN_STXD5__STXD5,
491};
492
493static void mxc_init_audio(void)
494{
495 mxc_register_device(&imx_ssi_device0, NULL);
496 mxc_iomux_setup_multiple_pins(ssi_pins, ARRAY_SIZE(ssi_pins), "ssi");
497}
498
496/*! 499/*!
497 * This structure defines static mappings for the i.MX31ADS board. 500 * This structure defines static mappings for the i.MX31ADS board.
498 */ 501 */
499static struct map_desc mx31ads_io_desc[] __initdata = { 502static struct map_desc mx31ads_io_desc[] __initdata = {
500 { 503 {
501 .virtual = CS4_BASE_ADDR_VIRT, 504 .virtual = MX31_CS4_BASE_ADDR_VIRT,
502 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 505 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
503 .length = CS4_SIZE / 2, 506 .length = MX31_CS4_SIZE / 2,
504 .type = MT_DEVICE 507 .type = MT_DEVICE
505 }, 508 },
506}; 509};
@@ -528,6 +531,7 @@ static void __init mxc_board_init(void)
528 mxc_init_extuart(); 531 mxc_init_extuart();
529 mxc_init_imx_uart(); 532 mxc_init_imx_uart();
530 mxc_init_i2c(); 533 mxc_init_i2c();
534 mxc_init_audio();
531} 535}
532 536
533static void __init mx31ads_timer_init(void) 537static void __init mx31ads_timer_init(void)
@@ -545,9 +549,9 @@ static struct sys_timer mx31ads_timer = {
545 */ 549 */
546MACHINE_START(MX31ADS, "Freescale MX31ADS") 550MACHINE_START(MX31ADS, "Freescale MX31ADS")
547 /* Maintainer: Freescale Semiconductor, Inc. */ 551 /* Maintainer: Freescale Semiconductor, Inc. */
548 .phys_io = AIPS1_BASE_ADDR, 552 .phys_io = MX31_AIPS1_BASE_ADDR,
549 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 553 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
550 .boot_params = PHYS_OFFSET + 0x100, 554 .boot_params = MX3x_PHYS_OFFSET + 0x100,
551 .map_io = mx31ads_map_io, 555 .map_io = mx31ads_map_io,
552 .init_irq = mx31ads_init_irq, 556 .init_irq = mx31ads_init_irq,
553 .init_machine = mxc_board_init, 557 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31lilly.c b/arch/arm/mach-mx3/mach-mx31lilly.c
index 9ce029f554b9..80847b04c063 100644
--- a/arch/arm/mach-mx3/mx31lilly.c
+++ b/arch/arm/mach-mx3/mach-mx31lilly.c
@@ -57,8 +57,8 @@
57 57
58static struct resource smsc91x_resources[] = { 58static struct resource smsc91x_resources[] = {
59 { 59 {
60 .start = CS4_BASE_ADDR, 60 .start = MX31_CS4_BASE_ADDR,
61 .end = CS4_BASE_ADDR + 0xffff, 61 .end = MX31_CS4_BASE_ADDR + 0xffff,
62 .flags = IORESOURCE_MEM, 62 .flags = IORESOURCE_MEM,
63 }, 63 },
64 { 64 {
@@ -195,9 +195,9 @@ static struct sys_timer mx31lilly_timer = {
195}; 195};
196 196
197MACHINE_START(LILLY1131, "INCO startec LILLY-1131") 197MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
198 .phys_io = AIPS1_BASE_ADDR, 198 .phys_io = MX31_AIPS1_BASE_ADDR,
199 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 199 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
200 .boot_params = PHYS_OFFSET + 0x100, 200 .boot_params = MX3x_PHYS_OFFSET + 0x100,
201 .map_io = mx31_map_io, 201 .map_io = mx31_map_io,
202 .init_irq = mx31_init_irq, 202 .init_irq = mx31_init_irq,
203 .init_machine = mx31lilly_board_init, 203 .init_machine = mx31lilly_board_init,
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mach-mx31lite.c
index 789b20d1730f..2b6d11400877 100644
--- a/arch/arm/mach-mx3/mx31lite.c
+++ b/arch/arm/mach-mx3/mach-mx31lite.c
@@ -82,8 +82,8 @@ static struct smsc911x_platform_config smsc911x_config = {
82 82
83static struct resource smsc911x_resources[] = { 83static struct resource smsc911x_resources[] = {
84 { 84 {
85 .start = CS4_BASE_ADDR, 85 .start = MX31_CS4_BASE_ADDR,
86 .end = CS4_BASE_ADDR + 0x100, 86 .end = MX31_CS4_BASE_ADDR + 0x100,
87 .flags = IORESOURCE_MEM, 87 .flags = IORESOURCE_MEM,
88 }, { 88 }, {
89 .start = IOMUX_TO_IRQ(MX31_PIN_SFS6), 89 .start = IOMUX_TO_IRQ(MX31_PIN_SFS6),
@@ -214,9 +214,9 @@ static struct platform_device physmap_flash_device = {
214 */ 214 */
215static struct map_desc mx31lite_io_desc[] __initdata = { 215static struct map_desc mx31lite_io_desc[] __initdata = {
216 { 216 {
217 .virtual = CS4_BASE_ADDR_VIRT, 217 .virtual = MX31_CS4_BASE_ADDR_VIRT,
218 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 218 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
219 .length = CS4_SIZE, 219 .length = MX31_CS4_SIZE,
220 .type = MT_DEVICE 220 .type = MT_DEVICE
221 } 221 }
222}; 222};
@@ -287,9 +287,9 @@ struct sys_timer mx31lite_timer = {
287 287
288MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM") 288MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
289 /* Maintainer: Freescale Semiconductor, Inc. */ 289 /* Maintainer: Freescale Semiconductor, Inc. */
290 .phys_io = AIPS1_BASE_ADDR, 290 .phys_io = MX31_AIPS1_BASE_ADDR,
291 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 291 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
292 .boot_params = PHYS_OFFSET + 0x100, 292 .boot_params = MX3x_PHYS_OFFSET + 0x100,
293 .map_io = mx31lite_map_io, 293 .map_io = mx31lite_map_io,
294 .init_irq = mx31_init_irq, 294 .init_irq = mx31_init_irq,
295 .init_machine = mxc_board_init, 295 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c
index cfd605d078ec..a7dc5191bf5e 100644
--- a/arch/arm/mach-mx3/mx31moboard.c
+++ b/arch/arm/mach-mx3/mach-mx31moboard.c
@@ -96,9 +96,6 @@ static unsigned int moboard_pins[] = {
96 /* LEDs */ 96 /* LEDs */
97 MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1, 97 MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1,
98 MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3, 98 MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3,
99 /* SEL */
100 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
101 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
102 /* SPI1 */ 99 /* SPI1 */
103 MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO, 100 MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO,
104 MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, 101 MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
@@ -352,9 +349,7 @@ static struct fsl_usb2_platform_data usb_pdata = {
352 349
353static int moboard_usbh2_hw_init(struct platform_device *pdev) 350static int moboard_usbh2_hw_init(struct platform_device *pdev)
354{ 351{
355 int ret = gpio_request(USBH2_EN_B, "usbh2-en"); 352 int ret;
356 if (ret)
357 return ret;
358 353
359 mxc_iomux_set_gpr(MUX_PGP_UH2, true); 354 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
360 355
@@ -371,6 +366,9 @@ static int moboard_usbh2_hw_init(struct platform_device *pdev)
371 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG); 366 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
372 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG); 367 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
373 368
369 ret = gpio_request(USBH2_EN_B, "usbh2-en");
370 if (ret)
371 return ret;
374 gpio_direction_output(USBH2_EN_B, 0); 372 gpio_direction_output(USBH2_EN_B, 0);
375 373
376 return 0; 374 return 0;
@@ -431,34 +429,6 @@ static struct platform_device mx31moboard_leds_device = {
431 }, 429 },
432}; 430};
433 431
434#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
435#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
436#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
437#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
438
439static void mx31moboard_init_sel_gpios(void)
440{
441 if (!gpio_request(SEL0, "sel0")) {
442 gpio_direction_input(SEL0);
443 gpio_export(SEL0, true);
444 }
445
446 if (!gpio_request(SEL1, "sel1")) {
447 gpio_direction_input(SEL1);
448 gpio_export(SEL1, true);
449 }
450
451 if (!gpio_request(SEL2, "sel2")) {
452 gpio_direction_input(SEL2);
453 gpio_export(SEL2, true);
454 }
455
456 if (!gpio_request(SEL3, "sel3")) {
457 gpio_direction_input(SEL3);
458 gpio_export(SEL3, true);
459 }
460}
461
462static struct ipu_platform_data mx3_ipu_data = { 432static struct ipu_platform_data mx3_ipu_data = {
463 .irq_base = MXC_IPU_IRQ_START, 433 .irq_base = MXC_IPU_IRQ_START,
464}; 434};
@@ -518,8 +488,6 @@ static void __init mxc_board_init(void)
518 488
519 mxc_register_device(&mxc_uart_device4, &uart4_pdata); 489 mxc_register_device(&mxc_uart_device4, &uart4_pdata);
520 490
521 mx31moboard_init_sel_gpios();
522
523 mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata); 491 mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata);
524 mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata); 492 mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata);
525 493
@@ -552,6 +520,9 @@ static void __init mxc_board_init(void)
552 case MX31MARXBOT: 520 case MX31MARXBOT:
553 mx31moboard_marxbot_init(); 521 mx31moboard_marxbot_init();
554 break; 522 break;
523 case MX31SMARTBOT:
524 mx31moboard_smartbot_init();
525 break;
555 default: 526 default:
556 printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", 527 printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n",
557 mx31moboard_baseboard); 528 mx31moboard_baseboard);
@@ -569,9 +540,9 @@ struct sys_timer mx31moboard_timer = {
569 540
570MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") 541MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
571 /* Maintainer: Valentin Longchamp, EPFL Mobots group */ 542 /* Maintainer: Valentin Longchamp, EPFL Mobots group */
572 .phys_io = AIPS1_BASE_ADDR, 543 .phys_io = MX31_AIPS1_BASE_ADDR,
573 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 544 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
574 .boot_params = PHYS_OFFSET + 0x100, 545 .boot_params = MX3x_PHYS_OFFSET + 0x100,
575 .map_io = mx31_map_io, 546 .map_io = mx31_map_io,
576 .init_irq = mx31_init_irq, 547 .init_irq = mx31_init_irq,
577 .init_machine = mxc_board_init, 548 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx35pdk.c b/arch/arm/mach-mx3/mach-mx35pdk.c
index 0bbc65ea23c8..bcac84d4dca4 100644
--- a/arch/arm/mach-mx3/mx35pdk.c
+++ b/arch/arm/mach-mx3/mach-mx35pdk.c
@@ -106,9 +106,9 @@ struct sys_timer mx35pdk_timer = {
106 106
107MACHINE_START(MX35_3DS, "Freescale MX35PDK") 107MACHINE_START(MX35_3DS, "Freescale MX35PDK")
108 /* Maintainer: Freescale Semiconductor, Inc */ 108 /* Maintainer: Freescale Semiconductor, Inc */
109 .phys_io = AIPS1_BASE_ADDR, 109 .phys_io = MX35_AIPS1_BASE_ADDR,
110 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 110 .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
111 .boot_params = PHYS_OFFSET + 0x100, 111 .boot_params = MX3x_PHYS_OFFSET + 0x100,
112 .map_io = mx35_map_io, 112 .map_io = mx35_map_io,
113 .init_irq = mx35_init_irq, 113 .init_irq = mx35_init_irq,
114 .init_machine = mxc_board_init, 114 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c
index 5be396917c99..11f531559169 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/mach-pcm037.c
@@ -33,6 +33,9 @@
33#include <linux/irq.h> 33#include <linux/irq.h>
34#include <linux/fsl_devices.h> 34#include <linux/fsl_devices.h>
35#include <linux/can/platform/sja1000.h> 35#include <linux/can/platform/sja1000.h>
36#include <linux/usb/otg.h>
37#include <linux/usb/ulpi.h>
38#include <linux/fsl_devices.h>
36 39
37#include <media/soc_camera.h> 40#include <media/soc_camera.h>
38 41
@@ -51,6 +54,8 @@
51#include <mach/mx3_camera.h> 54#include <mach/mx3_camera.h>
52#include <mach/mx3fb.h> 55#include <mach/mx3fb.h>
53#include <mach/mxc_nand.h> 56#include <mach/mxc_nand.h>
57#include <mach/mxc_ehci.h>
58#include <mach/ulpi.h>
54 59
55#include "devices.h" 60#include "devices.h"
56#include "pcm037.h" 61#include "pcm037.h"
@@ -172,19 +177,7 @@ static unsigned int pcm037_pins[] = {
172 MX31_PIN_CSI_VSYNC__CSI_VSYNC, 177 MX31_PIN_CSI_VSYNC__CSI_VSYNC,
173 /* GPIO */ 178 /* GPIO */
174 IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO), 179 IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO),
175}; 180 /* OTG */
176
177static struct physmap_flash_data pcm037_flash_data = {
178 .width = 2,
179};
180
181static struct resource pcm037_flash_resource = {
182 .start = 0xa0000000,
183 .end = 0xa1ffffff,
184 .flags = IORESOURCE_MEM,
185};
186
187static int usbotg_pins[] = {
188 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, 181 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
189 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, 182 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
190 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, 183 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
@@ -197,39 +190,29 @@ static int usbotg_pins[] = {
197 MX31_PIN_USBOTG_DIR__USBOTG_DIR, 190 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
198 MX31_PIN_USBOTG_NXT__USBOTG_NXT, 191 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
199 MX31_PIN_USBOTG_STP__USBOTG_STP, 192 MX31_PIN_USBOTG_STP__USBOTG_STP,
193 /* USB host 2 */
194 IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
195 IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
196 IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
197 IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
198 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
199 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
200 IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
201 IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
202 IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
203 IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
204 IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
205 IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
200}; 206};
201 207
202/* USB OTG HS port */ 208static struct physmap_flash_data pcm037_flash_data = {
203static int __init gpio_usbotg_hs_activate(void) 209 .width = 2,
204{ 210};
205 int ret = mxc_iomux_setup_multiple_pins(usbotg_pins,
206 ARRAY_SIZE(usbotg_pins), "usbotg");
207
208 if (ret < 0) {
209 printk(KERN_ERR "Cannot set up OTG pins\n");
210 return ret;
211 }
212
213 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
214 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
215 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
216 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
217 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
218 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
219 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
220 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
221 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
222 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
223 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
224 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
225
226 return 0;
227}
228 211
229/* OTG config */ 212static struct resource pcm037_flash_resource = {
230static struct fsl_usb2_platform_data usb_pdata = { 213 .start = 0xa0000000,
231 .operating_mode = FSL_USB2_DR_DEVICE, 214 .end = 0xa1ffffff,
232 .phy_mode = FSL_USB2_PHY_ULPI, 215 .flags = IORESOURCE_MEM,
233}; 216};
234 217
235static struct platform_device pcm037_flash = { 218static struct platform_device pcm037_flash = {
@@ -248,8 +231,8 @@ static struct imxuart_platform_data uart_pdata = {
248 231
249static struct resource smsc911x_resources[] = { 232static struct resource smsc911x_resources[] = {
250 { 233 {
251 .start = CS1_BASE_ADDR + 0x300, 234 .start = MX31_CS1_BASE_ADDR + 0x300,
252 .end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1, 235 .end = MX31_CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
253 .flags = IORESOURCE_MEM, 236 .flags = IORESOURCE_MEM,
254 }, { 237 }, {
255 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), 238 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
@@ -281,8 +264,8 @@ static struct platdata_mtd_ram pcm038_sram_data = {
281}; 264};
282 265
283static struct resource pcm038_sram_resource = { 266static struct resource pcm038_sram_resource = {
284 .start = CS4_BASE_ADDR, 267 .start = MX31_CS4_BASE_ADDR,
285 .end = CS4_BASE_ADDR + 512 * 1024 - 1, 268 .end = MX31_CS4_BASE_ADDR + 512 * 1024 - 1,
286 .flags = IORESOURCE_MEM, 269 .flags = IORESOURCE_MEM,
287}; 270};
288 271
@@ -536,8 +519,8 @@ static struct mx3fb_platform_data mx3fb_pdata = {
536 519
537static struct resource pcm970_sja1000_resources[] = { 520static struct resource pcm970_sja1000_resources[] = {
538 { 521 {
539 .start = CS5_BASE_ADDR, 522 .start = MX31_CS5_BASE_ADDR,
540 .end = CS5_BASE_ADDR + 0x100 - 1, 523 .end = MX31_CS5_BASE_ADDR + 0x100 - 1,
541 .flags = IORESOURCE_MEM, 524 .flags = IORESOURCE_MEM,
542 }, { 525 }, {
543 .start = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)), 526 .start = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
@@ -561,16 +544,65 @@ static struct platform_device pcm970_sja1000 = {
561 .num_resources = ARRAY_SIZE(pcm970_sja1000_resources), 544 .num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
562}; 545};
563 546
547static struct mxc_usbh_platform_data otg_pdata = {
548 .portsc = MXC_EHCI_MODE_ULPI,
549 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
550};
551
552static struct mxc_usbh_platform_data usbh2_pdata = {
553 .portsc = MXC_EHCI_MODE_ULPI,
554 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
555};
556
557static struct fsl_usb2_platform_data otg_device_pdata = {
558 .operating_mode = FSL_USB2_DR_DEVICE,
559 .phy_mode = FSL_USB2_PHY_ULPI,
560};
561
562static int otg_mode_host;
563
564static int __init pcm037_otg_mode(char *options)
565{
566 if (!strcmp(options, "host"))
567 otg_mode_host = 1;
568 else if (!strcmp(options, "device"))
569 otg_mode_host = 0;
570 else
571 pr_info("otg_mode neither \"host\" nor \"device\". "
572 "Defaulting to device\n");
573 return 0;
574}
575__setup("otg_mode=", pcm037_otg_mode);
576
564/* 577/*
565 * Board specific initialization. 578 * Board specific initialization.
566 */ 579 */
567static void __init mxc_board_init(void) 580static void __init mxc_board_init(void)
568{ 581{
569 int ret; 582 int ret;
583 u32 tmp;
584
585 mxc_iomux_set_gpr(MUX_PGP_UH2, 1);
570 586
571 mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins), 587 mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
572 "pcm037"); 588 "pcm037");
573 589
590#define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS \
591 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
592
593 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG);
594 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG);
595 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG);
596 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG);
597 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */
598 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */
599 mxc_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG); /* USBH2_DATA2 */
600 mxc_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG); /* USBH2_DATA3 */
601 mxc_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG); /* USBH2_DATA4 */
602 mxc_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG); /* USBH2_DATA5 */
603 mxc_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG); /* USBH2_DATA6 */
604 mxc_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG); /* USBH2_DATA7 */
605
574 if (pcm037_variant() == PCM037_EET) 606 if (pcm037_variant() == PCM037_EET)
575 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins, 607 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
576 ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1"); 608 ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
@@ -608,8 +640,6 @@ static void __init mxc_board_init(void)
608 mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); 640 mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
609 mxc_register_device(&mx3_ipu, &mx3_ipu_data); 641 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
610 mxc_register_device(&mx3_fb, &mx3fb_pdata); 642 mxc_register_device(&mx3_fb, &mx3fb_pdata);
611 if (!gpio_usbotg_hs_activate())
612 mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
613 643
614 /* CSI */ 644 /* CSI */
615 /* Camera power: default - off */ 645 /* Camera power: default - off */
@@ -623,6 +653,23 @@ static void __init mxc_board_init(void)
623 mxc_register_device(&mx3_camera, &camera_pdata); 653 mxc_register_device(&mx3_camera, &camera_pdata);
624 654
625 platform_device_register(&pcm970_sja1000); 655 platform_device_register(&pcm970_sja1000);
656
657#if defined(CONFIG_USB_ULPI)
658 if (otg_mode_host) {
659 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
660 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
661
662 mxc_register_device(&mxc_otg_host, &otg_pdata);
663 }
664
665 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
666 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
667
668 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
669#endif
670 if (!otg_mode_host)
671 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
672
626} 673}
627 674
628static void __init pcm037_timer_init(void) 675static void __init pcm037_timer_init(void)
@@ -636,9 +683,9 @@ struct sys_timer pcm037_timer = {
636 683
637MACHINE_START(PCM037, "Phytec Phycore pcm037") 684MACHINE_START(PCM037, "Phytec Phycore pcm037")
638 /* Maintainer: Pengutronix */ 685 /* Maintainer: Pengutronix */
639 .phys_io = AIPS1_BASE_ADDR, 686 .phys_io = MX31_AIPS1_BASE_ADDR,
640 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 687 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
641 .boot_params = PHYS_OFFSET + 0x100, 688 .boot_params = MX3x_PHYS_OFFSET + 0x100,
642 .map_io = mx31_map_io, 689 .map_io = mx31_map_io,
643 .init_irq = mx31_init_irq, 690 .init_irq = mx31_init_irq,
644 .init_machine = mxc_board_init, 691 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/pcm037_eet.c b/arch/arm/mach-mx3/mach-pcm037_eet.c
index 8d386000fc40..8d386000fc40 100644
--- a/arch/arm/mach-mx3/pcm037_eet.c
+++ b/arch/arm/mach-mx3/mach-pcm037_eet.c
diff --git a/arch/arm/mach-mx3/pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c
index e3aa829be586..1bf1ec2eef5e 100644
--- a/arch/arm/mach-mx3/pcm043.c
+++ b/arch/arm/mach-mx3/mach-pcm043.c
@@ -26,8 +26,12 @@
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27#include <linux/smc911x.h> 27#include <linux/smc911x.h>
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29#include <linux/delay.h>
29#include <linux/i2c.h> 30#include <linux/i2c.h>
30#include <linux/i2c/at24.h> 31#include <linux/i2c/at24.h>
32#include <linux/usb/otg.h>
33#include <linux/usb/ulpi.h>
34#include <linux/fsl_devices.h>
31 35
32#include <asm/mach-types.h> 36#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
@@ -44,6 +48,10 @@
44#include <mach/ipu.h> 48#include <mach/ipu.h>
45#include <mach/mx3fb.h> 49#include <mach/mx3fb.h>
46#include <mach/mxc_nand.h> 50#include <mach/mxc_nand.h>
51#include <mach/mxc_ehci.h>
52#include <mach/ulpi.h>
53#include <mach/audmux.h>
54#include <mach/ssi.h>
47 55
48#include "devices.h" 56#include "devices.h"
49 57
@@ -205,6 +213,94 @@ static struct pad_desc pcm043_pads[] = {
205 MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS, 213 MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
206 /* gpio */ 214 /* gpio */
207 MX35_PAD_ATA_CS0__GPIO2_6, 215 MX35_PAD_ATA_CS0__GPIO2_6,
216 /* USB host */
217 MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
218 MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
219 /* SSI */
220 MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
221 MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
222 MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
223 MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
224};
225
226#define AC97_GPIO_TXFS (1 * 32 + 31)
227#define AC97_GPIO_TXD (1 * 32 + 28)
228#define AC97_GPIO_RESET (1 * 32 + 0)
229
230static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97)
231{
232 struct pad_desc txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
233 struct pad_desc txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
234 int ret;
235
236 ret = gpio_request(AC97_GPIO_TXFS, "SSI");
237 if (ret) {
238 printk("failed to get GPIO_TXFS: %d\n", ret);
239 return;
240 }
241
242 mxc_iomux_v3_setup_pad(&txfs_gpio);
243
244 /* warm reset */
245 gpio_direction_output(AC97_GPIO_TXFS, 1);
246 udelay(2);
247 gpio_set_value(AC97_GPIO_TXFS, 0);
248
249 gpio_free(AC97_GPIO_TXFS);
250 mxc_iomux_v3_setup_pad(&txfs);
251}
252
253static void pcm043_ac97_cold_reset(struct snd_ac97 *ac97)
254{
255 struct pad_desc txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
256 struct pad_desc txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
257 struct pad_desc txd_gpio = MX35_PAD_STXD4__GPIO2_28;
258 struct pad_desc txd = MX35_PAD_STXD4__AUDMUX_AUD4_TXD;
259 struct pad_desc reset_gpio = MX35_PAD_SD2_CMD__GPIO2_0;
260 int ret;
261
262 ret = gpio_request(AC97_GPIO_TXFS, "SSI");
263 if (ret)
264 goto err1;
265
266 ret = gpio_request(AC97_GPIO_TXD, "SSI");
267 if (ret)
268 goto err2;
269
270 ret = gpio_request(AC97_GPIO_RESET, "SSI");
271 if (ret)
272 goto err3;
273
274 mxc_iomux_v3_setup_pad(&txfs_gpio);
275 mxc_iomux_v3_setup_pad(&txd_gpio);
276 mxc_iomux_v3_setup_pad(&reset_gpio);
277
278 gpio_direction_output(AC97_GPIO_TXFS, 0);
279 gpio_direction_output(AC97_GPIO_TXD, 0);
280
281 /* cold reset */
282 gpio_direction_output(AC97_GPIO_RESET, 0);
283 udelay(10);
284 gpio_direction_output(AC97_GPIO_RESET, 1);
285
286 mxc_iomux_v3_setup_pad(&txd);
287 mxc_iomux_v3_setup_pad(&txfs);
288
289 gpio_free(AC97_GPIO_RESET);
290err3:
291 gpio_free(AC97_GPIO_TXD);
292err2:
293 gpio_free(AC97_GPIO_TXFS);
294err1:
295 if (ret)
296 printk("%s failed with %d\n", __func__, ret);
297 mdelay(1);
298}
299
300static struct imx_ssi_platform_data pcm043_ssi_pdata = {
301 .ac97_reset = pcm043_ac97_cold_reset,
302 .ac97_warm_reset = pcm043_ac97_warm_reset,
303 .flags = IMX_SSI_USE_AC97,
208}; 304};
209 305
210static struct mxc_nand_platform_data pcm037_nand_board_info = { 306static struct mxc_nand_platform_data pcm037_nand_board_info = {
@@ -212,6 +308,37 @@ static struct mxc_nand_platform_data pcm037_nand_board_info = {
212 .hw_ecc = 1, 308 .hw_ecc = 1,
213}; 309};
214 310
311static struct mxc_usbh_platform_data otg_pdata = {
312 .portsc = MXC_EHCI_MODE_UTMI,
313 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
314};
315
316static struct mxc_usbh_platform_data usbh1_pdata = {
317 .portsc = MXC_EHCI_MODE_SERIAL,
318 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY |
319 MXC_EHCI_IPPUE_DOWN,
320};
321
322static struct fsl_usb2_platform_data otg_device_pdata = {
323 .operating_mode = FSL_USB2_DR_DEVICE,
324 .phy_mode = FSL_USB2_PHY_UTMI,
325};
326
327static int otg_mode_host;
328
329static int __init pcm043_otg_mode(char *options)
330{
331 if (!strcmp(options, "host"))
332 otg_mode_host = 1;
333 else if (!strcmp(options, "device"))
334 otg_mode_host = 0;
335 else
336 pr_info("otg_mode neither \"host\" nor \"device\". "
337 "Defaulting to device\n");
338 return 0;
339}
340__setup("otg_mode=", pcm043_otg_mode);
341
215/* 342/*
216 * Board specific initialization. 343 * Board specific initialization.
217 */ 344 */
@@ -219,10 +346,23 @@ static void __init mxc_board_init(void)
219{ 346{
220 mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads)); 347 mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads));
221 348
349 mxc_audmux_v2_configure_port(3,
350 MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
351 MXC_AUDMUX_V2_PTCR_TFSEL(0) |
352 MXC_AUDMUX_V2_PTCR_TFSDIR,
353 MXC_AUDMUX_V2_PDCR_RXDSEL(0));
354
355 mxc_audmux_v2_configure_port(0,
356 MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
357 MXC_AUDMUX_V2_PTCR_TCSEL(3) |
358 MXC_AUDMUX_V2_PTCR_TCLKDIR, /* clock is output */
359 MXC_AUDMUX_V2_PDCR_RXDSEL(3));
360
222 platform_add_devices(devices, ARRAY_SIZE(devices)); 361 platform_add_devices(devices, ARRAY_SIZE(devices));
223 362
224 mxc_register_device(&mxc_uart_device0, &uart_pdata); 363 mxc_register_device(&mxc_uart_device0, &uart_pdata);
225 mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); 364 mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
365 mxc_register_device(&imx_ssi_device0, &pcm043_ssi_pdata);
226 366
227 mxc_register_device(&mxc_uart_device1, &uart_pdata); 367 mxc_register_device(&mxc_uart_device1, &uart_pdata);
228 368
@@ -235,6 +375,20 @@ static void __init mxc_board_init(void)
235 375
236 mxc_register_device(&mx3_ipu, &mx3_ipu_data); 376 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
237 mxc_register_device(&mx3_fb, &mx3fb_pdata); 377 mxc_register_device(&mx3_fb, &mx3fb_pdata);
378
379#if defined(CONFIG_USB_ULPI)
380 if (otg_mode_host) {
381 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
382 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
383
384 mxc_register_device(&mxc_otg_host, &otg_pdata);
385 }
386
387 mxc_register_device(&mxc_usbh1, &usbh1_pdata);
388#endif
389 if (!otg_mode_host)
390 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
391
238} 392}
239 393
240static void __init pcm043_timer_init(void) 394static void __init pcm043_timer_init(void)
@@ -248,9 +402,9 @@ struct sys_timer pcm043_timer = {
248 402
249MACHINE_START(PCM043, "Phytec Phycore pcm043") 403MACHINE_START(PCM043, "Phytec Phycore pcm043")
250 /* Maintainer: Pengutronix */ 404 /* Maintainer: Pengutronix */
251 .phys_io = AIPS1_BASE_ADDR, 405 .phys_io = MX35_AIPS1_BASE_ADDR,
252 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 406 .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
253 .boot_params = PHYS_OFFSET + 0x100, 407 .boot_params = MX3x_PHYS_OFFSET + 0x100,
254 .map_io = mx35_map_io, 408 .map_io = mx35_map_io,
255 .init_irq = mx35_init_irq, 409 .init_irq = mx35_init_irq,
256 .init_machine = mxc_board_init, 410 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/qong.c b/arch/arm/mach-mx3/mach-qong.c
index 044511f1b9a9..e5b5b8323a17 100644
--- a/arch/arm/mach-mx3/qong.c
+++ b/arch/arm/mach-mx3/mach-qong.c
@@ -43,7 +43,7 @@
43#define QONG_FPGA_VERSION(major, minor, rev) \ 43#define QONG_FPGA_VERSION(major, minor, rev) \
44 (((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF)) 44 (((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF))
45 45
46#define QONG_FPGA_BASEADDR CS1_BASE_ADDR 46#define QONG_FPGA_BASEADDR MX31_CS1_BASE_ADDR
47#define QONG_FPGA_PERIPH_SIZE (1 << 24) 47#define QONG_FPGA_PERIPH_SIZE (1 << 24)
48 48
49#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR 49#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR
@@ -115,8 +115,8 @@ static struct physmap_flash_data qong_flash_data = {
115}; 115};
116 116
117static struct resource qong_flash_resource = { 117static struct resource qong_flash_resource = {
118 .start = CS0_BASE_ADDR, 118 .start = MX31_CS0_BASE_ADDR,
119 .end = CS0_BASE_ADDR + QONG_NOR_SIZE - 1, 119 .end = MX31_CS0_BASE_ADDR + QONG_NOR_SIZE - 1,
120 .flags = IORESOURCE_MEM, 120 .flags = IORESOURCE_MEM,
121}; 121};
122 122
@@ -180,8 +180,8 @@ static struct platform_nand_data qong_nand_data = {
180}; 180};
181 181
182static struct resource qong_nand_resource = { 182static struct resource qong_nand_resource = {
183 .start = CS3_BASE_ADDR, 183 .start = MX31_CS3_BASE_ADDR,
184 .end = CS3_BASE_ADDR + SZ_32M - 1, 184 .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
185 .flags = IORESOURCE_MEM, 185 .flags = IORESOURCE_MEM,
186}; 186};
187 187
@@ -198,9 +198,7 @@ static struct platform_device qong_nand_device = {
198static void __init qong_init_nand_mtd(void) 198static void __init qong_init_nand_mtd(void)
199{ 199{
200 /* init CS */ 200 /* init CS */
201 __raw_writel(0x00004f00, CSCR_U(3)); 201 mx31_setup_weimcs(3, 0x00004f00, 0x20013b31, 0x00020800);
202 __raw_writel(0x20013b31, CSCR_L(3));
203 __raw_writel(0x00020800, CSCR_A(3));
204 mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true); 202 mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true);
205 203
206 /* enable pin */ 204 /* enable pin */
@@ -275,9 +273,9 @@ static struct sys_timer qong_timer = {
275 273
276MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") 274MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
277 /* Maintainer: DENX Software Engineering GmbH */ 275 /* Maintainer: DENX Software Engineering GmbH */
278 .phys_io = AIPS1_BASE_ADDR, 276 .phys_io = MX31_AIPS1_BASE_ADDR,
279 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 277 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
280 .boot_params = PHYS_OFFSET + 0x100, 278 .boot_params = MX3x_PHYS_OFFSET + 0x100,
281 .map_io = mx31_map_io, 279 .map_io = mx31_map_io,
282 .init_irq = mx31_init_irq, 280 .init_irq = mx31_init_irq,
283 .init_machine = mxc_board_init, 281 .init_machine = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31lite-db.c b/arch/arm/mach-mx3/mx31lite-db.c
index 694611d6b057..ccd874225c3b 100644
--- a/arch/arm/mach-mx3/mx31lite-db.c
+++ b/arch/arm/mach-mx3/mx31lite-db.c
@@ -67,6 +67,13 @@ static unsigned int litekit_db_board_pins[] __initdata = {
67 MX31_PIN_CSPI1_SS0__SS0, 67 MX31_PIN_CSPI1_SS0__SS0,
68 MX31_PIN_CSPI1_SS1__SS1, 68 MX31_PIN_CSPI1_SS1__SS1,
69 MX31_PIN_CSPI1_SS2__SS2, 69 MX31_PIN_CSPI1_SS2__SS2,
70 /* SDHC1 */
71 MX31_PIN_SD1_DATA0__SD1_DATA0,
72 MX31_PIN_SD1_DATA1__SD1_DATA1,
73 MX31_PIN_SD1_DATA2__SD1_DATA2,
74 MX31_PIN_SD1_DATA3__SD1_DATA3,
75 MX31_PIN_SD1_CLK__SD1_CLK,
76 MX31_PIN_SD1_CMD__SD1_CMD,
70}; 77};
71 78
72/* UART */ 79/* UART */
@@ -79,11 +86,11 @@ static struct imxuart_platform_data uart_pdata __initdata = {
79static int gpio_det, gpio_wp; 86static int gpio_det, gpio_wp;
80 87
81#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ 88#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
82 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) 89 PAD_CTL_ODE_CMOS)
83 90
84static int mxc_mmc1_get_ro(struct device *dev) 91static int mxc_mmc1_get_ro(struct device *dev)
85{ 92{
86 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0)); 93 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_GPIO1_6));
87} 94}
88 95
89static int mxc_mmc1_init(struct device *dev, 96static int mxc_mmc1_init(struct device *dev,
@@ -94,12 +101,17 @@ static int mxc_mmc1_init(struct device *dev,
94 gpio_det = IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1); 101 gpio_det = IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1);
95 gpio_wp = IOMUX_TO_GPIO(MX31_PIN_GPIO1_6); 102 gpio_wp = IOMUX_TO_GPIO(MX31_PIN_GPIO1_6);
96 103
97 mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG); 104 mxc_iomux_set_pad(MX31_PIN_SD1_DATA0,
98 mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG); 105 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
99 mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG); 106 mxc_iomux_set_pad(MX31_PIN_SD1_DATA1,
100 mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG); 107 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
108 mxc_iomux_set_pad(MX31_PIN_SD1_DATA2,
109 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
110 mxc_iomux_set_pad(MX31_PIN_SD1_DATA3,
111 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
112 mxc_iomux_set_pad(MX31_PIN_SD1_CMD,
113 MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
101 mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG); 114 mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
102 mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);
103 115
104 ret = gpio_request(gpio_det, "MMC detect"); 116 ret = gpio_request(gpio_det, "MMC detect");
105 if (ret) 117 if (ret)
@@ -113,7 +125,7 @@ static int mxc_mmc1_init(struct device *dev,
113 gpio_direction_input(gpio_wp); 125 gpio_direction_input(gpio_wp);
114 126
115 ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), detect_irq, 127 ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), detect_irq,
116 IRQF_DISABLED | IRQF_TRIGGER_FALLING, 128 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
117 "MMC detect", data); 129 "MMC detect", data);
118 if (ret) 130 if (ret)
119 goto exit_free_wp; 131 goto exit_free_wp;
@@ -133,7 +145,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data)
133{ 145{
134 gpio_free(gpio_det); 146 gpio_free(gpio_det);
135 gpio_free(gpio_wp); 147 gpio_free(gpio_wp);
136 free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), data); 148 free_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), data);
137} 149}
138 150
139static struct imxmmc_platform_data mmc_pdata = { 151static struct imxmmc_platform_data mmc_pdata = {
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c
index 438428eaf769..9fbad2eb3a49 100644
--- a/arch/arm/mach-mx3/mx31moboard-devboard.c
+++ b/arch/arm/mach-mx3/mx31moboard-devboard.c
@@ -49,6 +49,9 @@ static unsigned int devboard_pins[] = {
49 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB, 49 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
50 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND, 50 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
51 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12, 51 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
52 /* SEL */
53 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
54 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
52}; 55};
53 56
54static struct imxuart_platform_data uart_pdata = { 57static struct imxuart_platform_data uart_pdata = {
@@ -108,6 +111,33 @@ static struct imxmmc_platform_data sdhc2_pdata = {
108 .exit = devboard_sdhc2_exit, 111 .exit = devboard_sdhc2_exit,
109}; 112};
110 113
114#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
115#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
116#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
117#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
118
119static void devboard_init_sel_gpios(void)
120{
121 if (!gpio_request(SEL0, "sel0")) {
122 gpio_direction_input(SEL0);
123 gpio_export(SEL0, true);
124 }
125
126 if (!gpio_request(SEL1, "sel1")) {
127 gpio_direction_input(SEL1);
128 gpio_export(SEL1, true);
129 }
130
131 if (!gpio_request(SEL2, "sel2")) {
132 gpio_direction_input(SEL2);
133 gpio_export(SEL2, true);
134 }
135
136 if (!gpio_request(SEL3, "sel3")) {
137 gpio_direction_input(SEL3);
138 gpio_export(SEL3, true);
139 }
140}
111#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ 141#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
112 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) 142 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
113 143
@@ -196,5 +226,7 @@ void __init mx31moboard_devboard_init(void)
196 226
197 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); 227 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
198 228
229 devboard_init_sel_gpios();
230
199 devboard_usbh1_init(); 231 devboard_usbh1_init();
200} 232}
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c
index 1f44b9ccbb0f..3958515d75bf 100644
--- a/arch/arm/mach-mx3/mx31moboard-marxbot.c
+++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c
@@ -66,6 +66,9 @@ static unsigned int marxbot_pins[] = {
66 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB, 66 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
67 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND, 67 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
68 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12, 68 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
69 /* SEL */
70 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
71 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
69}; 72};
70 73
71#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR) 74#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
@@ -127,12 +130,12 @@ static struct imxmmc_platform_data sdhc2_pdata = {
127static void dspics_resets_init(void) 130static void dspics_resets_init(void)
128{ 131{
129 if (!gpio_request(TRSLAT_RST_B, "translator-rst")) { 132 if (!gpio_request(TRSLAT_RST_B, "translator-rst")) {
130 gpio_direction_output(TRSLAT_RST_B, 1); 133 gpio_direction_output(TRSLAT_RST_B, 0);
131 gpio_export(TRSLAT_RST_B, false); 134 gpio_export(TRSLAT_RST_B, false);
132 } 135 }
133 136
134 if (!gpio_request(DSPICS_RST_B, "dspics-rst")) { 137 if (!gpio_request(DSPICS_RST_B, "dspics-rst")) {
135 gpio_direction_output(DSPICS_RST_B, 1); 138 gpio_direction_output(DSPICS_RST_B, 0);
136 gpio_export(DSPICS_RST_B, false); 139 gpio_export(DSPICS_RST_B, false);
137 } 140 }
138} 141}
@@ -200,7 +203,7 @@ static int __init marxbot_cam_init(void)
200 int ret = gpio_request(CAM_CHOICE, "cam-choice"); 203 int ret = gpio_request(CAM_CHOICE, "cam-choice");
201 if (ret) 204 if (ret)
202 return ret; 205 return ret;
203 gpio_direction_output(CAM_CHOICE, 1); 206 gpio_direction_output(CAM_CHOICE, 0);
204 207
205 ret = gpio_request(BASECAM_RST_B, "basecam-reset"); 208 ret = gpio_request(BASECAM_RST_B, "basecam-reset");
206 if (ret) 209 if (ret)
@@ -223,6 +226,34 @@ static int __init marxbot_cam_init(void)
223 return 0; 226 return 0;
224} 227}
225 228
229#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
230#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
231#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
232#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
233
234static void marxbot_init_sel_gpios(void)
235{
236 if (!gpio_request(SEL0, "sel0")) {
237 gpio_direction_input(SEL0);
238 gpio_export(SEL0, true);
239 }
240
241 if (!gpio_request(SEL1, "sel1")) {
242 gpio_direction_input(SEL1);
243 gpio_export(SEL1, true);
244 }
245
246 if (!gpio_request(SEL2, "sel2")) {
247 gpio_direction_input(SEL2);
248 gpio_export(SEL2, true);
249 }
250
251 if (!gpio_request(SEL3, "sel3")) {
252 gpio_direction_input(SEL3);
253 gpio_export(SEL3, true);
254 }
255}
256
226#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ 257#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
227 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) 258 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
228 259
@@ -307,6 +338,8 @@ void __init mx31moboard_marxbot_init(void)
307 mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins), 338 mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins),
308 "marxbot"); 339 "marxbot");
309 340
341 marxbot_init_sel_gpios();
342
310 dspics_resets_init(); 343 dspics_resets_init();
311 344
312 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); 345 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
diff --git a/arch/arm/mach-mx3/mx31moboard-smartbot.c b/arch/arm/mach-mx3/mx31moboard-smartbot.c
new file mode 100644
index 000000000000..52a69fc8b14f
--- /dev/null
+++ b/arch/arm/mach-mx3/mx31moboard-smartbot.c
@@ -0,0 +1,162 @@
1/*
2 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#include <linux/delay.h>
20#include <linux/gpio.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/i2c.h>
24#include <linux/platform_device.h>
25#include <linux/types.h>
26
27#include <mach/common.h>
28#include <mach/hardware.h>
29#include <mach/imx-uart.h>
30#include <mach/iomux-mx3.h>
31
32#include <media/soc_camera.h>
33
34#include "devices.h"
35
36static unsigned int smartbot_pins[] = {
37 /* UART1 */
38 MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
39 MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
40 /* CSI */
41 MX31_PIN_CSI_D4__CSI_D4, MX31_PIN_CSI_D5__CSI_D5,
42 MX31_PIN_CSI_D6__CSI_D6, MX31_PIN_CSI_D7__CSI_D7,
43 MX31_PIN_CSI_D8__CSI_D8, MX31_PIN_CSI_D9__CSI_D9,
44 MX31_PIN_CSI_D10__CSI_D10, MX31_PIN_CSI_D11__CSI_D11,
45 MX31_PIN_CSI_D12__CSI_D12, MX31_PIN_CSI_D13__CSI_D13,
46 MX31_PIN_CSI_D14__CSI_D14, MX31_PIN_CSI_D15__CSI_D15,
47 MX31_PIN_CSI_HSYNC__CSI_HSYNC, MX31_PIN_CSI_MCLK__CSI_MCLK,
48 MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC,
49 MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1,
50 /* ENABLES */
51 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
52 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
53};
54
55static struct imxuart_platform_data uart_pdata = {
56 .flags = IMXUART_HAVE_RTSCTS,
57};
58
59#define CAM_POWER IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)
60#define CAM_RST_B IOMUX_TO_GPIO(MX31_PIN_GPIO3_0)
61
62static int smartbot_cam_power(struct device *dev, int on)
63{
64 gpio_set_value(CAM_POWER, !on);
65 return 0;
66}
67
68static int smartbot_cam_reset(struct device *dev)
69{
70 gpio_set_value(CAM_RST_B, 0);
71 udelay(100);
72 gpio_set_value(CAM_RST_B, 1);
73 return 0;
74}
75
76static struct i2c_board_info smartbot_i2c_devices[] = {
77 {
78 I2C_BOARD_INFO("mt9t031", 0x5d),
79 },
80};
81
82static struct soc_camera_link base_iclink = {
83 .bus_id = 0, /* Must match with the camera ID */
84 .power = smartbot_cam_power,
85 .reset = smartbot_cam_reset,
86 .board_info = &smartbot_i2c_devices[0],
87 .i2c_adapter_id = 0,
88 .module_name = "mt9t031",
89};
90
91static struct platform_device smartbot_camera[] = {
92 {
93 .name = "soc-camera-pdrv",
94 .id = 0,
95 .dev = {
96 .platform_data = &base_iclink,
97 },
98 },
99};
100
101static struct platform_device *smartbot_cameras[] __initdata = {
102 &smartbot_camera[0],
103};
104
105static int __init smartbot_cam_init(void)
106{
107 int ret = gpio_request(CAM_RST_B, "cam-reset");
108 if (ret)
109 return ret;
110 gpio_direction_output(CAM_RST_B, 1);
111 ret = gpio_request(CAM_POWER, "cam-standby");
112 if (ret)
113 return ret;
114 gpio_direction_output(CAM_POWER, 0);
115
116 return 0;
117}
118
119#define POWER_EN IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
120#define DSPIC_RST_B IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
121#define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
122#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
123
124static void smartbot_resets_init(void)
125{
126 if (!gpio_request(POWER_EN, "power-enable")) {
127 gpio_direction_output(POWER_EN, 0);
128 gpio_export(POWER_EN, false);
129 }
130
131 if (!gpio_request(DSPIC_RST_B, "dspic-rst")) {
132 gpio_direction_output(DSPIC_RST_B, 0);
133 gpio_export(DSPIC_RST_B, false);
134 }
135
136 if (!gpio_request(TRSLAT_RST_B, "translator-rst")) {
137 gpio_direction_output(TRSLAT_RST_B, 0);
138 gpio_export(TRSLAT_RST_B, false);
139 }
140
141 if (!gpio_request(SEL3, "sel3")) {
142 gpio_direction_input(SEL3);
143 gpio_export(SEL3, true);
144 }
145}
146/*
147 * system init for baseboard usage. Will be called by mx31moboard init.
148 */
149void __init mx31moboard_smartbot_init(void)
150{
151 printk(KERN_INFO "Initializing mx31smartbot peripherals\n");
152
153 mxc_iomux_setup_multiple_pins(smartbot_pins, ARRAY_SIZE(smartbot_pins),
154 "smartbot");
155
156 mxc_register_device(&mxc_uart_device1, &uart_pdata);
157
158 smartbot_resets_init();
159
160 smartbot_cam_init();
161 platform_add_devices(smartbot_cameras, ARRAY_SIZE(smartbot_cameras));
162}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-08 16:50:15 -0500