diff options
Diffstat (limited to 'arch/arm/mach-mx3/mx31pdk.c')
-rw-r--r-- | arch/arm/mach-mx3/mx31pdk.c | 200 |
1 files changed, 190 insertions, 10 deletions
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mx31pdk.c index bc63f1785691..c19838d2e369 100644 --- a/arch/arm/mach-mx3/mx31pdk.c +++ b/arch/arm/mach-mx3/mx31pdk.c | |||
@@ -20,6 +20,9 @@ | |||
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/clk.h> | 21 | #include <linux/clk.h> |
22 | #include <linux/irq.h> | 22 | #include <linux/irq.h> |
23 | #include <linux/gpio.h> | ||
24 | #include <linux/smsc911x.h> | ||
25 | #include <linux/platform_device.h> | ||
23 | 26 | ||
24 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
25 | #include <asm/mach-types.h> | 28 | #include <asm/mach-types.h> |
@@ -41,21 +44,192 @@ | |||
41 | * @ingroup System | 44 | * @ingroup System |
42 | */ | 45 | */ |
43 | 46 | ||
47 | static int mx31pdk_pins[] = { | ||
48 | /* UART1 */ | ||
49 | MX31_PIN_CTS1__CTS1, | ||
50 | MX31_PIN_RTS1__RTS1, | ||
51 | MX31_PIN_TXD1__TXD1, | ||
52 | MX31_PIN_RXD1__RXD1, | ||
53 | IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), | ||
54 | }; | ||
55 | |||
44 | static struct imxuart_platform_data uart_pdata = { | 56 | static struct imxuart_platform_data uart_pdata = { |
45 | .flags = IMXUART_HAVE_RTSCTS, | 57 | .flags = IMXUART_HAVE_RTSCTS, |
46 | }; | 58 | }; |
47 | 59 | ||
48 | static int uart_pins[] = { | 60 | /* |
49 | MX31_PIN_CTS1__CTS1, | 61 | * Support for the SMSC9217 on the Debug board. |
50 | MX31_PIN_RTS1__RTS1, | 62 | */ |
51 | MX31_PIN_TXD1__TXD1, | 63 | |
52 | MX31_PIN_RXD1__RXD1 | 64 | static struct smsc911x_platform_config smsc911x_config = { |
65 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
66 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | ||
67 | .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, | ||
68 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
69 | }; | ||
70 | |||
71 | static struct resource smsc911x_resources[] = { | ||
72 | { | ||
73 | .start = LAN9217_BASE_ADDR, | ||
74 | .end = LAN9217_BASE_ADDR + 0xff, | ||
75 | .flags = IORESOURCE_MEM, | ||
76 | }, { | ||
77 | .start = EXPIO_INT_ENET, | ||
78 | .end = EXPIO_INT_ENET, | ||
79 | .flags = IORESOURCE_IRQ, | ||
80 | }, | ||
81 | }; | ||
82 | |||
83 | static struct platform_device smsc911x_device = { | ||
84 | .name = "smsc911x", | ||
85 | .id = -1, | ||
86 | .num_resources = ARRAY_SIZE(smsc911x_resources), | ||
87 | .resource = smsc911x_resources, | ||
88 | .dev = { | ||
89 | .platform_data = &smsc911x_config, | ||
90 | }, | ||
53 | }; | 91 | }; |
54 | 92 | ||
55 | static inline void mxc_init_imx_uart(void) | 93 | /* |
94 | * Routines for the CPLD on the debug board. It contains a CPLD handling | ||
95 | * LEDs, switches, interrupts for Ethernet. | ||
96 | */ | ||
97 | |||
98 | static void mx31pdk_expio_irq_handler(uint32_t irq, struct irq_desc *desc) | ||
56 | { | 99 | { |
57 | mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), "uart-0"); | 100 | uint32_t imr_val; |
58 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 101 | uint32_t int_valid; |
102 | uint32_t expio_irq; | ||
103 | |||
104 | imr_val = __raw_readw(CPLD_INT_MASK_REG); | ||
105 | int_valid = __raw_readw(CPLD_INT_STATUS_REG) & ~imr_val; | ||
106 | |||
107 | expio_irq = MXC_EXP_IO_BASE; | ||
108 | for (; int_valid != 0; int_valid >>= 1, expio_irq++) { | ||
109 | if ((int_valid & 1) == 0) | ||
110 | continue; | ||
111 | generic_handle_irq(expio_irq); | ||
112 | } | ||
113 | } | ||
114 | |||
115 | /* | ||
116 | * Disable an expio pin's interrupt by setting the bit in the imr. | ||
117 | * @param irq an expio virtual irq number | ||
118 | */ | ||
119 | static void expio_mask_irq(uint32_t irq) | ||
120 | { | ||
121 | uint16_t reg; | ||
122 | uint32_t expio = MXC_IRQ_TO_EXPIO(irq); | ||
123 | |||
124 | /* mask the interrupt */ | ||
125 | reg = __raw_readw(CPLD_INT_MASK_REG); | ||
126 | reg |= 1 << expio; | ||
127 | __raw_writew(reg, CPLD_INT_MASK_REG); | ||
128 | } | ||
129 | |||
130 | /* | ||
131 | * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr. | ||
132 | * @param irq an expanded io virtual irq number | ||
133 | */ | ||
134 | static void expio_ack_irq(uint32_t irq) | ||
135 | { | ||
136 | uint32_t expio = MXC_IRQ_TO_EXPIO(irq); | ||
137 | |||
138 | /* clear the interrupt status */ | ||
139 | __raw_writew(1 << expio, CPLD_INT_RESET_REG); | ||
140 | __raw_writew(0, CPLD_INT_RESET_REG); | ||
141 | /* mask the interrupt */ | ||
142 | expio_mask_irq(irq); | ||
143 | } | ||
144 | |||
145 | /* | ||
146 | * Enable a expio pin's interrupt by clearing the bit in the imr. | ||
147 | * @param irq a expio virtual irq number | ||
148 | */ | ||
149 | static void expio_unmask_irq(uint32_t irq) | ||
150 | { | ||
151 | uint16_t reg; | ||
152 | uint32_t expio = MXC_IRQ_TO_EXPIO(irq); | ||
153 | |||
154 | /* unmask the interrupt */ | ||
155 | reg = __raw_readw(CPLD_INT_MASK_REG); | ||
156 | reg &= ~(1 << expio); | ||
157 | __raw_writew(reg, CPLD_INT_MASK_REG); | ||
158 | } | ||
159 | |||
160 | static struct irq_chip expio_irq_chip = { | ||
161 | .ack = expio_ack_irq, | ||
162 | .mask = expio_mask_irq, | ||
163 | .unmask = expio_unmask_irq, | ||
164 | }; | ||
165 | |||
166 | static int __init mx31pdk_init_expio(void) | ||
167 | { | ||
168 | int i; | ||
169 | int ret; | ||
170 | |||
171 | /* Check if there's a debug board connected */ | ||
172 | if ((__raw_readw(CPLD_MAGIC_NUMBER1_REG) != 0xAAAA) || | ||
173 | (__raw_readw(CPLD_MAGIC_NUMBER2_REG) != 0x5555) || | ||
174 | (__raw_readw(CPLD_MAGIC_NUMBER3_REG) != 0xCAFE)) { | ||
175 | /* No Debug board found */ | ||
176 | return -ENODEV; | ||
177 | } | ||
178 | |||
179 | pr_info("i.MX31PDK Debug board detected, rev = 0x%04X\n", | ||
180 | __raw_readw(CPLD_CODE_VER_REG)); | ||
181 | |||
182 | /* | ||
183 | * Configure INT line as GPIO input | ||
184 | */ | ||
185 | ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "sms9217-irq"); | ||
186 | if (ret) | ||
187 | pr_warning("could not get LAN irq gpio\n"); | ||
188 | else | ||
189 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)); | ||
190 | |||
191 | /* Disable the interrupts and clear the status */ | ||
192 | __raw_writew(0, CPLD_INT_MASK_REG); | ||
193 | __raw_writew(0xFFFF, CPLD_INT_RESET_REG); | ||
194 | __raw_writew(0, CPLD_INT_RESET_REG); | ||
195 | __raw_writew(0x1F, CPLD_INT_MASK_REG); | ||
196 | for (i = MXC_EXP_IO_BASE; | ||
197 | i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); | ||
198 | i++) { | ||
199 | set_irq_chip(i, &expio_irq_chip); | ||
200 | set_irq_handler(i, handle_level_irq); | ||
201 | set_irq_flags(i, IRQF_VALID); | ||
202 | } | ||
203 | set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_LOW); | ||
204 | set_irq_chained_handler(EXPIO_PARENT_INT, mx31pdk_expio_irq_handler); | ||
205 | |||
206 | return 0; | ||
207 | } | ||
208 | |||
209 | /* | ||
210 | * This structure defines the MX31 memory map. | ||
211 | */ | ||
212 | static struct map_desc mx31pdk_io_desc[] __initdata = { | ||
213 | { | ||
214 | .virtual = SPBA0_BASE_ADDR_VIRT, | ||
215 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | ||
216 | .length = SPBA0_SIZE, | ||
217 | .type = MT_DEVICE_NONSHARED, | ||
218 | }, { | ||
219 | .virtual = CS5_BASE_ADDR_VIRT, | ||
220 | .pfn = __phys_to_pfn(CS5_BASE_ADDR), | ||
221 | .length = CS5_SIZE, | ||
222 | .type = MT_DEVICE, | ||
223 | }, | ||
224 | }; | ||
225 | |||
226 | /* | ||
227 | * Set up static virtual mappings. | ||
228 | */ | ||
229 | static void __init mx31pdk_map_io(void) | ||
230 | { | ||
231 | mx31_map_io(); | ||
232 | iotable_init(mx31pdk_io_desc, ARRAY_SIZE(mx31pdk_io_desc)); | ||
59 | } | 233 | } |
60 | 234 | ||
61 | /*! | 235 | /*! |
@@ -63,7 +237,13 @@ static inline void mxc_init_imx_uart(void) | |||
63 | */ | 237 | */ |
64 | static void __init mxc_board_init(void) | 238 | static void __init mxc_board_init(void) |
65 | { | 239 | { |
66 | mxc_init_imx_uart(); | 240 | mxc_iomux_setup_multiple_pins(mx31pdk_pins, ARRAY_SIZE(mx31pdk_pins), |
241 | "mx31pdk"); | ||
242 | |||
243 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | ||
244 | |||
245 | if (!mx31pdk_init_expio()) | ||
246 | platform_device_register(&smsc911x_device); | ||
67 | } | 247 | } |
68 | 248 | ||
69 | static void __init mx31pdk_timer_init(void) | 249 | static void __init mx31pdk_timer_init(void) |
@@ -84,7 +264,7 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") | |||
84 | .phys_io = AIPS1_BASE_ADDR, | 264 | .phys_io = AIPS1_BASE_ADDR, |
85 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 265 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
86 | .boot_params = PHYS_OFFSET + 0x100, | 266 | .boot_params = PHYS_OFFSET + 0x100, |
87 | .map_io = mxc_map_io, | 267 | .map_io = mx31pdk_map_io, |
88 | .init_irq = mxc_init_irq, | 268 | .init_irq = mxc_init_irq, |
89 | .init_machine = mxc_board_init, | 269 | .init_machine = mxc_board_init, |
90 | .timer = &mx31pdk_timer, | 270 | .timer = &mx31pdk_timer, |