diff options
Diffstat (limited to 'arch/arm/mach-mx3/mm.c')
-rw-r--r-- | arch/arm/mach-mx3/mm.c | 84 |
1 files changed, 35 insertions, 49 deletions
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c index b4ffc531a82c..47118f760244 100644 --- a/arch/arm/mach-mx3/mm.c +++ b/arch/arm/mach-mx3/mm.c | |||
@@ -36,40 +36,16 @@ | |||
36 | * @ingroup Memory | 36 | * @ingroup Memory |
37 | */ | 37 | */ |
38 | 38 | ||
39 | /*! | 39 | #ifdef CONFIG_SOC_IMX31 |
40 | * This table defines static virtual address mappings for I/O regions. | 40 | static struct map_desc mx31_io_desc[] __initdata = { |
41 | * These are the mappings common across all MX3 boards. | 41 | imx_map_entry(MX31, X_MEMC, MT_DEVICE), |
42 | */ | 42 | imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED), |
43 | static struct map_desc mxc_io_desc[] __initdata = { | 43 | imx_map_entry(MX31, AIPS1, MT_DEVICE_NONSHARED), |
44 | { | 44 | imx_map_entry(MX31, AIPS2, MT_DEVICE_NONSHARED), |
45 | .virtual = X_MEMC_BASE_ADDR_VIRT, | 45 | imx_map_entry(MX31, SPBA0, MT_DEVICE_NONSHARED), |
46 | .pfn = __phys_to_pfn(X_MEMC_BASE_ADDR), | ||
47 | .length = X_MEMC_SIZE, | ||
48 | .type = MT_DEVICE | ||
49 | }, { | ||
50 | .virtual = AVIC_BASE_ADDR_VIRT, | ||
51 | .pfn = __phys_to_pfn(AVIC_BASE_ADDR), | ||
52 | .length = AVIC_SIZE, | ||
53 | .type = MT_DEVICE_NONSHARED | ||
54 | }, { | ||
55 | .virtual = AIPS1_BASE_ADDR_VIRT, | ||
56 | .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), | ||
57 | .length = AIPS1_SIZE, | ||
58 | .type = MT_DEVICE_NONSHARED | ||
59 | }, { | ||
60 | .virtual = AIPS2_BASE_ADDR_VIRT, | ||
61 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), | ||
62 | .length = AIPS2_SIZE, | ||
63 | .type = MT_DEVICE_NONSHARED | ||
64 | }, { | ||
65 | .virtual = SPBA0_BASE_ADDR_VIRT, | ||
66 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | ||
67 | .length = SPBA0_SIZE, | ||
68 | .type = MT_DEVICE_NONSHARED | ||
69 | }, | ||
70 | }; | 46 | }; |
71 | 47 | ||
72 | /*! | 48 | /* |
73 | * This function initializes the memory map. It is called during the | 49 | * This function initializes the memory map. It is called during the |
74 | * system startup to create static physical to virtual memory mappings | 50 | * system startup to create static physical to virtual memory mappings |
75 | * for the IO modules. | 51 | * for the IO modules. |
@@ -77,34 +53,44 @@ static struct map_desc mxc_io_desc[] __initdata = { | |||
77 | void __init mx31_map_io(void) | 53 | void __init mx31_map_io(void) |
78 | { | 54 | { |
79 | mxc_set_cpu_type(MXC_CPU_MX31); | 55 | mxc_set_cpu_type(MXC_CPU_MX31); |
80 | mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); | 56 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); |
81 | 57 | ||
82 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | 58 | iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); |
83 | } | 59 | } |
84 | 60 | ||
85 | #ifdef CONFIG_ARCH_MX35 | 61 | int imx31_register_gpios(void); |
86 | void __init mx35_map_io(void) | 62 | void __init mx31_init_irq(void) |
87 | { | 63 | { |
88 | mxc_set_cpu_type(MXC_CPU_MX35); | 64 | mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); |
89 | mxc_iomux_v3_init(IO_ADDRESS(IOMUXC_BASE_ADDR)); | 65 | imx31_register_gpios(); |
90 | mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); | ||
91 | |||
92 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | ||
93 | } | 66 | } |
94 | #endif | 67 | #endif /* ifdef CONFIG_SOC_IMX31 */ |
95 | 68 | ||
96 | int imx3x_register_gpios(void); | 69 | #ifdef CONFIG_SOC_IMX35 |
70 | static struct map_desc mx35_io_desc[] __initdata = { | ||
71 | imx_map_entry(MX35, X_MEMC, MT_DEVICE), | ||
72 | imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED), | ||
73 | imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED), | ||
74 | imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED), | ||
75 | imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED), | ||
76 | }; | ||
97 | 77 | ||
98 | void __init mx31_init_irq(void) | 78 | void __init mx35_map_io(void) |
99 | { | 79 | { |
100 | mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR)); | 80 | mxc_set_cpu_type(MXC_CPU_MX35); |
101 | imx3x_register_gpios(); | 81 | mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); |
82 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); | ||
83 | |||
84 | iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc)); | ||
102 | } | 85 | } |
103 | 86 | ||
87 | int imx35_register_gpios(void); | ||
104 | void __init mx35_init_irq(void) | 88 | void __init mx35_init_irq(void) |
105 | { | 89 | { |
106 | mx31_init_irq(); | 90 | mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); |
91 | imx35_register_gpios(); | ||
107 | } | 92 | } |
93 | #endif /* ifdef CONFIG_SOC_IMX35 */ | ||
108 | 94 | ||
109 | #ifdef CONFIG_CACHE_L2X0 | 95 | #ifdef CONFIG_CACHE_L2X0 |
110 | static int mxc_init_l2x0(void) | 96 | static int mxc_init_l2x0(void) |
@@ -129,7 +115,7 @@ static int mxc_init_l2x0(void) | |||
129 | pr_err("L2 cache: Cannot fix timing. Trying to continue without\n"); | 115 | pr_err("L2 cache: Cannot fix timing. Trying to continue without\n"); |
130 | } | 116 | } |
131 | 117 | ||
132 | l2x0_base = ioremap(L2CC_BASE_ADDR, 4096); | 118 | l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096); |
133 | if (IS_ERR(l2x0_base)) { | 119 | if (IS_ERR(l2x0_base)) { |
134 | printk(KERN_ERR "remapping L2 cache area failed with %ld\n", | 120 | printk(KERN_ERR "remapping L2 cache area failed with %ld\n", |
135 | PTR_ERR(l2x0_base)); | 121 | PTR_ERR(l2x0_base)); |