diff options
Diffstat (limited to 'arch/arm/mach-mx3/mach-mx31_3ds.c')
-rw-r--r-- | arch/arm/mach-mx3/mach-mx31_3ds.c | 116 |
1 files changed, 97 insertions, 19 deletions
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c index b88c18ad7698..f54af1e29ca4 100644 --- a/arch/arm/mach-mx3/mach-mx31_3ds.c +++ b/arch/arm/mach-mx3/mach-mx31_3ds.c | |||
@@ -23,6 +23,9 @@ | |||
23 | #include <linux/gpio.h> | 23 | #include <linux/gpio.h> |
24 | #include <linux/smsc911x.h> | 24 | #include <linux/smsc911x.h> |
25 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
26 | #include <linux/mfd/mc13783.h> | ||
27 | #include <linux/spi/spi.h> | ||
28 | #include <linux/regulator/machine.h> | ||
26 | 29 | ||
27 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
28 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
@@ -31,26 +34,96 @@ | |||
31 | #include <asm/memory.h> | 34 | #include <asm/memory.h> |
32 | #include <asm/mach/map.h> | 35 | #include <asm/mach/map.h> |
33 | #include <mach/common.h> | 36 | #include <mach/common.h> |
34 | #include <mach/board-mx31pdk.h> | 37 | #include <mach/board-mx31_3ds.h> |
35 | #include <mach/imx-uart.h> | 38 | #include <mach/imx-uart.h> |
36 | #include <mach/iomux-mx3.h> | 39 | #include <mach/iomux-mx3.h> |
40 | #include <mach/mxc_nand.h> | ||
41 | #include <mach/spi.h> | ||
37 | #include "devices.h" | 42 | #include "devices.h" |
38 | 43 | ||
39 | /*! | 44 | /*! |
40 | * @file mx31pdk.c | 45 | * @file mx31_3ds.c |
41 | * | 46 | * |
42 | * @brief This file contains the board-specific initialization routines. | 47 | * @brief This file contains the board-specific initialization routines. |
43 | * | 48 | * |
44 | * @ingroup System | 49 | * @ingroup System |
45 | */ | 50 | */ |
46 | 51 | ||
47 | static int mx31pdk_pins[] = { | 52 | static int mx31_3ds_pins[] = { |
48 | /* UART1 */ | 53 | /* UART1 */ |
49 | MX31_PIN_CTS1__CTS1, | 54 | MX31_PIN_CTS1__CTS1, |
50 | MX31_PIN_RTS1__RTS1, | 55 | MX31_PIN_RTS1__RTS1, |
51 | MX31_PIN_TXD1__TXD1, | 56 | MX31_PIN_TXD1__TXD1, |
52 | MX31_PIN_RXD1__RXD1, | 57 | MX31_PIN_RXD1__RXD1, |
53 | IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), | 58 | IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), |
59 | /* SPI 1 */ | ||
60 | MX31_PIN_CSPI2_SCLK__SCLK, | ||
61 | MX31_PIN_CSPI2_MOSI__MOSI, | ||
62 | MX31_PIN_CSPI2_MISO__MISO, | ||
63 | MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, | ||
64 | MX31_PIN_CSPI2_SS0__SS0, | ||
65 | MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */ | ||
66 | /* MC13783 IRQ */ | ||
67 | IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO), | ||
68 | }; | ||
69 | |||
70 | /* Regulators */ | ||
71 | static struct regulator_init_data pwgtx_init = { | ||
72 | .constraints = { | ||
73 | .boot_on = 1, | ||
74 | .always_on = 1, | ||
75 | }, | ||
76 | }; | ||
77 | |||
78 | static struct mc13783_regulator_init_data mx31_3ds_regulators[] = { | ||
79 | { | ||
80 | .id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */ | ||
81 | .init_data = &pwgtx_init, | ||
82 | }, { | ||
83 | .id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */ | ||
84 | .init_data = &pwgtx_init, | ||
85 | }, | ||
86 | }; | ||
87 | |||
88 | /* MC13783 */ | ||
89 | static struct mc13783_platform_data mc13783_pdata __initdata = { | ||
90 | .regulators = mx31_3ds_regulators, | ||
91 | .num_regulators = ARRAY_SIZE(mx31_3ds_regulators), | ||
92 | .flags = MC13783_USE_REGULATOR, | ||
93 | }; | ||
94 | |||
95 | /* SPI */ | ||
96 | static int spi1_internal_chipselect[] = { | ||
97 | MXC_SPI_CS(0), | ||
98 | MXC_SPI_CS(2), | ||
99 | }; | ||
100 | |||
101 | static struct spi_imx_master spi1_pdata = { | ||
102 | .chipselect = spi1_internal_chipselect, | ||
103 | .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect), | ||
104 | }; | ||
105 | |||
106 | static struct spi_board_info mx31_3ds_spi_devs[] __initdata = { | ||
107 | { | ||
108 | .modalias = "mc13783", | ||
109 | .max_speed_hz = 1000000, | ||
110 | .bus_num = 1, | ||
111 | .chip_select = 1, /* SS2 */ | ||
112 | .platform_data = &mc13783_pdata, | ||
113 | .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), | ||
114 | .mode = SPI_CS_HIGH, | ||
115 | }, | ||
116 | }; | ||
117 | |||
118 | /* | ||
119 | * NAND Flash | ||
120 | */ | ||
121 | static struct mxc_nand_platform_data imx31_3ds_nand_flash_pdata = { | ||
122 | .width = 1, | ||
123 | .hw_ecc = 1, | ||
124 | #ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT | ||
125 | .flash_bbt = 1, | ||
126 | #endif | ||
54 | }; | 127 | }; |
55 | 128 | ||
56 | static struct imxuart_platform_data uart_pdata = { | 129 | static struct imxuart_platform_data uart_pdata = { |
@@ -95,7 +168,7 @@ static struct platform_device smsc911x_device = { | |||
95 | * LEDs, switches, interrupts for Ethernet. | 168 | * LEDs, switches, interrupts for Ethernet. |
96 | */ | 169 | */ |
97 | 170 | ||
98 | static void mx31pdk_expio_irq_handler(uint32_t irq, struct irq_desc *desc) | 171 | static void mx31_3ds_expio_irq_handler(uint32_t irq, struct irq_desc *desc) |
99 | { | 172 | { |
100 | uint32_t imr_val; | 173 | uint32_t imr_val; |
101 | uint32_t int_valid; | 174 | uint32_t int_valid; |
@@ -163,7 +236,7 @@ static struct irq_chip expio_irq_chip = { | |||
163 | .unmask = expio_unmask_irq, | 236 | .unmask = expio_unmask_irq, |
164 | }; | 237 | }; |
165 | 238 | ||
166 | static int __init mx31pdk_init_expio(void) | 239 | static int __init mx31_3ds_init_expio(void) |
167 | { | 240 | { |
168 | int i; | 241 | int i; |
169 | int ret; | 242 | int ret; |
@@ -176,7 +249,7 @@ static int __init mx31pdk_init_expio(void) | |||
176 | return -ENODEV; | 249 | return -ENODEV; |
177 | } | 250 | } |
178 | 251 | ||
179 | pr_info("i.MX31PDK Debug board detected, rev = 0x%04X\n", | 252 | pr_info("i.MX31 3DS Debug board detected, rev = 0x%04X\n", |
180 | __raw_readw(CPLD_CODE_VER_REG)); | 253 | __raw_readw(CPLD_CODE_VER_REG)); |
181 | 254 | ||
182 | /* | 255 | /* |
@@ -201,7 +274,7 @@ static int __init mx31pdk_init_expio(void) | |||
201 | set_irq_flags(i, IRQF_VALID); | 274 | set_irq_flags(i, IRQF_VALID); |
202 | } | 275 | } |
203 | set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_LOW); | 276 | set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_LOW); |
204 | set_irq_chained_handler(EXPIO_PARENT_INT, mx31pdk_expio_irq_handler); | 277 | set_irq_chained_handler(EXPIO_PARENT_INT, mx31_3ds_expio_irq_handler); |
205 | 278 | ||
206 | return 0; | 279 | return 0; |
207 | } | 280 | } |
@@ -209,7 +282,7 @@ static int __init mx31pdk_init_expio(void) | |||
209 | /* | 282 | /* |
210 | * This structure defines the MX31 memory map. | 283 | * This structure defines the MX31 memory map. |
211 | */ | 284 | */ |
212 | static struct map_desc mx31pdk_io_desc[] __initdata = { | 285 | static struct map_desc mx31_3ds_io_desc[] __initdata = { |
213 | { | 286 | { |
214 | .virtual = MX31_CS5_BASE_ADDR_VIRT, | 287 | .virtual = MX31_CS5_BASE_ADDR_VIRT, |
215 | .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR), | 288 | .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR), |
@@ -221,10 +294,10 @@ static struct map_desc mx31pdk_io_desc[] __initdata = { | |||
221 | /* | 294 | /* |
222 | * Set up static virtual mappings. | 295 | * Set up static virtual mappings. |
223 | */ | 296 | */ |
224 | static void __init mx31pdk_map_io(void) | 297 | static void __init mx31_3ds_map_io(void) |
225 | { | 298 | { |
226 | mx31_map_io(); | 299 | mx31_map_io(); |
227 | iotable_init(mx31pdk_io_desc, ARRAY_SIZE(mx31pdk_io_desc)); | 300 | iotable_init(mx31_3ds_io_desc, ARRAY_SIZE(mx31_3ds_io_desc)); |
228 | } | 301 | } |
229 | 302 | ||
230 | /*! | 303 | /*! |
@@ -232,35 +305,40 @@ static void __init mx31pdk_map_io(void) | |||
232 | */ | 305 | */ |
233 | static void __init mxc_board_init(void) | 306 | static void __init mxc_board_init(void) |
234 | { | 307 | { |
235 | mxc_iomux_setup_multiple_pins(mx31pdk_pins, ARRAY_SIZE(mx31pdk_pins), | 308 | mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins), |
236 | "mx31pdk"); | 309 | "mx31_3ds"); |
237 | 310 | ||
238 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 311 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
312 | mxc_register_device(&mxc_nand_device, &imx31_3ds_nand_flash_pdata); | ||
313 | |||
314 | mxc_register_device(&mxc_spi_device1, &spi1_pdata); | ||
315 | spi_register_board_info(mx31_3ds_spi_devs, | ||
316 | ARRAY_SIZE(mx31_3ds_spi_devs)); | ||
239 | 317 | ||
240 | if (!mx31pdk_init_expio()) | 318 | if (!mx31_3ds_init_expio()) |
241 | platform_device_register(&smsc911x_device); | 319 | platform_device_register(&smsc911x_device); |
242 | } | 320 | } |
243 | 321 | ||
244 | static void __init mx31pdk_timer_init(void) | 322 | static void __init mx31_3ds_timer_init(void) |
245 | { | 323 | { |
246 | mx31_clocks_init(26000000); | 324 | mx31_clocks_init(26000000); |
247 | } | 325 | } |
248 | 326 | ||
249 | static struct sys_timer mx31pdk_timer = { | 327 | static struct sys_timer mx31_3ds_timer = { |
250 | .init = mx31pdk_timer_init, | 328 | .init = mx31_3ds_timer_init, |
251 | }; | 329 | }; |
252 | 330 | ||
253 | /* | 331 | /* |
254 | * The following uses standard kernel macros defined in arch.h in order to | 332 | * The following uses standard kernel macros defined in arch.h in order to |
255 | * initialize __mach_desc_MX31PDK data structure. | 333 | * initialize __mach_desc_MX31_3DS data structure. |
256 | */ | 334 | */ |
257 | MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") | 335 | MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") |
258 | /* Maintainer: Freescale Semiconductor, Inc. */ | 336 | /* Maintainer: Freescale Semiconductor, Inc. */ |
259 | .phys_io = MX31_AIPS1_BASE_ADDR, | 337 | .phys_io = MX31_AIPS1_BASE_ADDR, |
260 | .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, | 338 | .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, |
261 | .boot_params = MX3x_PHYS_OFFSET + 0x100, | 339 | .boot_params = MX3x_PHYS_OFFSET + 0x100, |
262 | .map_io = mx31pdk_map_io, | 340 | .map_io = mx31_3ds_map_io, |
263 | .init_irq = mx31_init_irq, | 341 | .init_irq = mx31_init_irq, |
264 | .init_machine = mxc_board_init, | 342 | .init_machine = mxc_board_init, |
265 | .timer = &mx31pdk_timer, | 343 | .timer = &mx31_3ds_timer, |
266 | MACHINE_END | 344 | MACHINE_END |