diff options
Diffstat (limited to 'arch/arm/mach-mx3/devices.c')
-rw-r--r-- | arch/arm/mach-mx3/devices.c | 68 |
1 files changed, 55 insertions, 13 deletions
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index 8a577f367250..6adb586515ea 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c | |||
@@ -459,7 +459,7 @@ struct platform_device mxc_usbh2 = { | |||
459 | * SPI master controller | 459 | * SPI master controller |
460 | * 3 channels | 460 | * 3 channels |
461 | */ | 461 | */ |
462 | static struct resource imx_spi_0_resources[] = { | 462 | static struct resource mxc_spi_0_resources[] = { |
463 | { | 463 | { |
464 | .start = CSPI1_BASE_ADDR, | 464 | .start = CSPI1_BASE_ADDR, |
465 | .end = CSPI1_BASE_ADDR + SZ_4K - 1, | 465 | .end = CSPI1_BASE_ADDR + SZ_4K - 1, |
@@ -471,7 +471,7 @@ static struct resource imx_spi_0_resources[] = { | |||
471 | }, | 471 | }, |
472 | }; | 472 | }; |
473 | 473 | ||
474 | static struct resource imx_spi_1_resources[] = { | 474 | static struct resource mxc_spi_1_resources[] = { |
475 | { | 475 | { |
476 | .start = CSPI2_BASE_ADDR, | 476 | .start = CSPI2_BASE_ADDR, |
477 | .end = CSPI2_BASE_ADDR + SZ_4K - 1, | 477 | .end = CSPI2_BASE_ADDR + SZ_4K - 1, |
@@ -483,7 +483,7 @@ static struct resource imx_spi_1_resources[] = { | |||
483 | }, | 483 | }, |
484 | }; | 484 | }; |
485 | 485 | ||
486 | static struct resource imx_spi_2_resources[] = { | 486 | static struct resource mxc_spi_2_resources[] = { |
487 | { | 487 | { |
488 | .start = CSPI3_BASE_ADDR, | 488 | .start = CSPI3_BASE_ADDR, |
489 | .end = CSPI3_BASE_ADDR + SZ_4K - 1, | 489 | .end = CSPI3_BASE_ADDR + SZ_4K - 1, |
@@ -495,25 +495,25 @@ static struct resource imx_spi_2_resources[] = { | |||
495 | }, | 495 | }, |
496 | }; | 496 | }; |
497 | 497 | ||
498 | struct platform_device imx_spi_device0 = { | 498 | struct platform_device mxc_spi_device0 = { |
499 | .name = "spi_imx", | 499 | .name = "spi_imx", |
500 | .id = 0, | 500 | .id = 0, |
501 | .num_resources = ARRAY_SIZE(imx_spi_0_resources), | 501 | .num_resources = ARRAY_SIZE(mxc_spi_0_resources), |
502 | .resource = imx_spi_0_resources, | 502 | .resource = mxc_spi_0_resources, |
503 | }; | 503 | }; |
504 | 504 | ||
505 | struct platform_device imx_spi_device1 = { | 505 | struct platform_device mxc_spi_device1 = { |
506 | .name = "spi_imx", | 506 | .name = "spi_imx", |
507 | .id = 1, | 507 | .id = 1, |
508 | .num_resources = ARRAY_SIZE(imx_spi_1_resources), | 508 | .num_resources = ARRAY_SIZE(mxc_spi_1_resources), |
509 | .resource = imx_spi_1_resources, | 509 | .resource = mxc_spi_1_resources, |
510 | }; | 510 | }; |
511 | 511 | ||
512 | struct platform_device imx_spi_device2 = { | 512 | struct platform_device mxc_spi_device2 = { |
513 | .name = "spi_imx", | 513 | .name = "spi_imx", |
514 | .id = 2, | 514 | .id = 2, |
515 | .num_resources = ARRAY_SIZE(imx_spi_2_resources), | 515 | .num_resources = ARRAY_SIZE(mxc_spi_2_resources), |
516 | .resource = imx_spi_2_resources, | 516 | .resource = mxc_spi_2_resources, |
517 | }; | 517 | }; |
518 | 518 | ||
519 | #ifdef CONFIG_ARCH_MX35 | 519 | #ifdef CONFIG_ARCH_MX35 |
@@ -537,6 +537,44 @@ struct platform_device mxc_fec_device = { | |||
537 | }; | 537 | }; |
538 | #endif | 538 | #endif |
539 | 539 | ||
540 | static struct resource imx_ssi_resources0[] = { | ||
541 | { | ||
542 | .start = SSI1_BASE_ADDR, | ||
543 | .end = SSI1_BASE_ADDR + 0xfff, | ||
544 | .flags = IORESOURCE_MEM, | ||
545 | }, { | ||
546 | .start = MX31_INT_SSI1, | ||
547 | .end = MX31_INT_SSI1, | ||
548 | .flags = IORESOURCE_IRQ, | ||
549 | }, | ||
550 | }; | ||
551 | |||
552 | static struct resource imx_ssi_resources1[] = { | ||
553 | { | ||
554 | .start = SSI2_BASE_ADDR, | ||
555 | .end = SSI2_BASE_ADDR + 0xfff, | ||
556 | .flags = IORESOURCE_MEM | ||
557 | }, { | ||
558 | .start = MX31_INT_SSI2, | ||
559 | .end = MX31_INT_SSI2, | ||
560 | .flags = IORESOURCE_IRQ, | ||
561 | }, | ||
562 | }; | ||
563 | |||
564 | struct platform_device imx_ssi_device0 = { | ||
565 | .name = "imx-ssi", | ||
566 | .id = 0, | ||
567 | .num_resources = ARRAY_SIZE(imx_ssi_resources0), | ||
568 | .resource = imx_ssi_resources0, | ||
569 | }; | ||
570 | |||
571 | struct platform_device imx_ssi_device1 = { | ||
572 | .name = "imx-ssi", | ||
573 | .id = 1, | ||
574 | .num_resources = ARRAY_SIZE(imx_ssi_resources1), | ||
575 | .resource = imx_ssi_resources1, | ||
576 | }; | ||
577 | |||
540 | static int mx3_devices_init(void) | 578 | static int mx3_devices_init(void) |
541 | { | 579 | { |
542 | if (cpu_is_mx31()) { | 580 | if (cpu_is_mx31()) { |
@@ -546,7 +584,7 @@ static int mx3_devices_init(void) | |||
546 | } | 584 | } |
547 | if (cpu_is_mx35()) { | 585 | if (cpu_is_mx35()) { |
548 | mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; | 586 | mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; |
549 | mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff; | 587 | mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0x1fff; |
550 | otg_resources[0].start = MX35_OTG_BASE_ADDR; | 588 | otg_resources[0].start = MX35_OTG_BASE_ADDR; |
551 | otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff; | 589 | otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff; |
552 | otg_resources[1].start = MXC_INT_USBOTG; | 590 | otg_resources[1].start = MXC_INT_USBOTG; |
@@ -555,6 +593,10 @@ static int mx3_devices_init(void) | |||
555 | mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff; | 593 | mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff; |
556 | mxc_usbh1_resources[1].start = MXC_INT_USBHS; | 594 | mxc_usbh1_resources[1].start = MXC_INT_USBHS; |
557 | mxc_usbh1_resources[1].end = MXC_INT_USBHS; | 595 | mxc_usbh1_resources[1].end = MXC_INT_USBHS; |
596 | imx_ssi_resources0[1].start = MX35_INT_SSI1; | ||
597 | imx_ssi_resources0[1].end = MX35_INT_SSI1; | ||
598 | imx_ssi_resources1[1].start = MX35_INT_SSI2; | ||
599 | imx_ssi_resources1[1].end = MX35_INT_SSI2; | ||
558 | } | 600 | } |
559 | 601 | ||
560 | return 0; | 602 | return 0; |