diff options
Diffstat (limited to 'arch/arm/mach-mx3/clock.c')
-rw-r--r-- | arch/arm/mach-mx3/clock.c | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c index 9957a11533a4..217d114b177a 100644 --- a/arch/arm/mach-mx3/clock.c +++ b/arch/arm/mach-mx3/clock.c | |||
@@ -483,7 +483,7 @@ DEFINE_CLOCK(i2c3_clk, 2, MXC_CCM_CGR0, 30, NULL, NULL, &perclk_clk); | |||
483 | DEFINE_CLOCK(mpeg4_clk, 0, MXC_CCM_CGR1, 0, NULL, NULL, &ahb_clk); | 483 | DEFINE_CLOCK(mpeg4_clk, 0, MXC_CCM_CGR1, 0, NULL, NULL, &ahb_clk); |
484 | DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1, 2, mstick1_get_rate, NULL, &usb_pll_clk); | 484 | DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1, 2, mstick1_get_rate, NULL, &usb_pll_clk); |
485 | DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1, 4, mstick2_get_rate, NULL, &usb_pll_clk); | 485 | DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1, 4, mstick2_get_rate, NULL, &usb_pll_clk); |
486 | DEFINE_CLOCK1(csi_clk, 0, MXC_CCM_CGR1, 6, csi, NULL, &ahb_clk); | 486 | DEFINE_CLOCK1(csi_clk, 0, MXC_CCM_CGR1, 6, csi, NULL, &serial_pll_clk); |
487 | DEFINE_CLOCK(rtc_clk, 0, MXC_CCM_CGR1, 8, NULL, NULL, &ipg_clk); | 487 | DEFINE_CLOCK(rtc_clk, 0, MXC_CCM_CGR1, 8, NULL, NULL, &ipg_clk); |
488 | DEFINE_CLOCK(wdog_clk, 0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk); | 488 | DEFINE_CLOCK(wdog_clk, 0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk); |
489 | DEFINE_CLOCK(pwm_clk, 0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk); | 489 | DEFINE_CLOCK(pwm_clk, 0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk); |
@@ -566,13 +566,18 @@ int __init mx31_clocks_init(unsigned long fref) | |||
566 | u32 reg; | 566 | u32 reg; |
567 | int i; | 567 | int i; |
568 | 568 | ||
569 | mxc_set_cpu_type(MXC_CPU_MX31); | ||
570 | |||
571 | ckih_rate = fref; | 569 | ckih_rate = fref; |
572 | 570 | ||
573 | for (i = 0; i < ARRAY_SIZE(lookups); i++) | 571 | for (i = 0; i < ARRAY_SIZE(lookups); i++) |
574 | clkdev_add(&lookups[i]); | 572 | clkdev_add(&lookups[i]); |
575 | 573 | ||
574 | /* change the csi_clk parent if necessary */ | ||
575 | reg = __raw_readl(MXC_CCM_CCMR); | ||
576 | if (!(reg & MXC_CCM_CCMR_CSCS)) | ||
577 | if (clk_set_parent(&csi_clk, &usb_pll_clk)) | ||
578 | pr_err("%s: error changing csi_clk parent\n", __func__); | ||
579 | |||
580 | |||
576 | /* Turn off all possible clocks */ | 581 | /* Turn off all possible clocks */ |
577 | __raw_writel((3 << 4), MXC_CCM_CGR0); | 582 | __raw_writel((3 << 4), MXC_CCM_CGR0); |
578 | __raw_writel(0, MXC_CCM_CGR1); | 583 | __raw_writel(0, MXC_CCM_CGR1); |
@@ -581,6 +586,12 @@ int __init mx31_clocks_init(unsigned long fref) | |||
581 | MX32, but still required to be set */ | 586 | MX32, but still required to be set */ |
582 | MXC_CCM_CGR2); | 587 | MXC_CCM_CGR2); |
583 | 588 | ||
589 | /* | ||
590 | * Before turning off usb_pll make sure ipg_per_clk is generated | ||
591 | * by ipg_clk and not usb_pll. | ||
592 | */ | ||
593 | __raw_writel(__raw_readl(MXC_CCM_CCMR) | (1 << 24), MXC_CCM_CCMR); | ||
594 | |||
584 | usb_pll_disable(&usb_pll_clk); | 595 | usb_pll_disable(&usb_pll_clk); |
585 | 596 | ||
586 | pr_info("Clock input source is %ld\n", clk_get_rate(&ckih_clk)); | 597 | pr_info("Clock input source is %ld\n", clk_get_rate(&ckih_clk)); |