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Diffstat (limited to 'arch/arm/mach-mx3/clock-imx35.c')
-rw-r--r--arch/arm/mach-mx3/clock-imx35.c28
1 files changed, 18 insertions, 10 deletions
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 7a62e744a8b0..61e4a318980a 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -364,8 +364,8 @@ DEFINE_CLOCK(cspi2_clk, 1, CCM_CGR0, 12, get_rate_ipg, NULL);
364DEFINE_CLOCK(ect_clk, 0, CCM_CGR0, 14, get_rate_ipg, NULL); 364DEFINE_CLOCK(ect_clk, 0, CCM_CGR0, 14, get_rate_ipg, NULL);
365DEFINE_CLOCK(edio_clk, 0, CCM_CGR0, 16, NULL, NULL); 365DEFINE_CLOCK(edio_clk, 0, CCM_CGR0, 16, NULL, NULL);
366DEFINE_CLOCK(emi_clk, 0, CCM_CGR0, 18, get_rate_ipg, NULL); 366DEFINE_CLOCK(emi_clk, 0, CCM_CGR0, 18, get_rate_ipg, NULL);
367DEFINE_CLOCK(epit1_clk, 0, CCM_CGR0, 20, get_rate_ipg_per, NULL); 367DEFINE_CLOCK(epit1_clk, 0, CCM_CGR0, 20, get_rate_ipg, NULL);
368DEFINE_CLOCK(epit2_clk, 1, CCM_CGR0, 22, get_rate_ipg_per, NULL); 368DEFINE_CLOCK(epit2_clk, 1, CCM_CGR0, 22, get_rate_ipg, NULL);
369DEFINE_CLOCK(esai_clk, 0, CCM_CGR0, 24, NULL, NULL); 369DEFINE_CLOCK(esai_clk, 0, CCM_CGR0, 24, NULL, NULL);
370DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGR0, 26, get_rate_sdhc, NULL); 370DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGR0, 26, get_rate_sdhc, NULL);
371DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGR0, 28, get_rate_sdhc, NULL); 371DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGR0, 28, get_rate_sdhc, NULL);
@@ -451,17 +451,17 @@ static struct clk_lookup lookups[] = {
451 _REGISTER_CLOCK(NULL, "ata", ata_clk) 451 _REGISTER_CLOCK(NULL, "ata", ata_clk)
452 _REGISTER_CLOCK("flexcan.0", NULL, can1_clk) 452 _REGISTER_CLOCK("flexcan.0", NULL, can1_clk)
453 _REGISTER_CLOCK("flexcan.1", NULL, can2_clk) 453 _REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
454 _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) 454 _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi1_clk)
455 _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk) 455 _REGISTER_CLOCK("imx35-cspi.1", NULL, cspi2_clk)
456 _REGISTER_CLOCK(NULL, "ect", ect_clk) 456 _REGISTER_CLOCK(NULL, "ect", ect_clk)
457 _REGISTER_CLOCK(NULL, "edio", edio_clk) 457 _REGISTER_CLOCK(NULL, "edio", edio_clk)
458 _REGISTER_CLOCK(NULL, "emi", emi_clk) 458 _REGISTER_CLOCK(NULL, "emi", emi_clk)
459 _REGISTER_CLOCK(NULL, "epit", epit1_clk) 459 _REGISTER_CLOCK("imx-epit.0", NULL, epit1_clk)
460 _REGISTER_CLOCK(NULL, "epit", epit2_clk) 460 _REGISTER_CLOCK("imx-epit.1", NULL, epit2_clk)
461 _REGISTER_CLOCK(NULL, "esai", esai_clk) 461 _REGISTER_CLOCK(NULL, "esai", esai_clk)
462 _REGISTER_CLOCK(NULL, "sdhc", esdhc1_clk) 462 _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk)
463 _REGISTER_CLOCK(NULL, "sdhc", esdhc2_clk) 463 _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk)
464 _REGISTER_CLOCK(NULL, "sdhc", esdhc3_clk) 464 _REGISTER_CLOCK("sdhci-esdhc-imx.2", NULL, esdhc3_clk)
465 _REGISTER_CLOCK("fec.0", NULL, fec_clk) 465 _REGISTER_CLOCK("fec.0", NULL, fec_clk)
466 _REGISTER_CLOCK(NULL, "gpio", gpio1_clk) 466 _REGISTER_CLOCK(NULL, "gpio", gpio1_clk)
467 _REGISTER_CLOCK(NULL, "gpio", gpio2_clk) 467 _REGISTER_CLOCK(NULL, "gpio", gpio2_clk)
@@ -482,7 +482,7 @@ static struct clk_lookup lookups[] = {
482 _REGISTER_CLOCK(NULL, "rtc", rtc_clk) 482 _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
483 _REGISTER_CLOCK(NULL, "rtic", rtic_clk) 483 _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
484 _REGISTER_CLOCK(NULL, "scc", scc_clk) 484 _REGISTER_CLOCK(NULL, "scc", scc_clk)
485 _REGISTER_CLOCK(NULL, "sdma", sdma_clk) 485 _REGISTER_CLOCK("imx-sdma", NULL, sdma_clk)
486 _REGISTER_CLOCK(NULL, "spba", spba_clk) 486 _REGISTER_CLOCK(NULL, "spba", spba_clk)
487 _REGISTER_CLOCK(NULL, "spdif", spdif_clk) 487 _REGISTER_CLOCK(NULL, "spdif", spdif_clk)
488 _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) 488 _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
@@ -535,8 +535,16 @@ int __init mx35_clocks_init()
535 __raw_writel(cgr2, CCM_BASE + CCM_CGR2); 535 __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
536 __raw_writel(cgr3, CCM_BASE + CCM_CGR3); 536 __raw_writel(cgr3, CCM_BASE + CCM_CGR3);
537 537
538 clk_enable(&iim_clk);
539 mx35_read_cpu_rev();
540
541#ifdef CONFIG_MXC_USE_EPIT
542 epit_timer_init(&epit1_clk,
543 MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
544#else
538 mxc_timer_init(&gpt_clk, 545 mxc_timer_init(&gpt_clk,
539 MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT); 546 MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
547#endif
540 548
541 return 0; 549 return 0;
542} 550}