diff options
Diffstat (limited to 'arch/arm/mach-mx2')
-rw-r--r-- | arch/arm/mach-mx2/devices.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-mx2/devices.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-mx2/mx27ads.c | 61 | ||||
-rw-r--r-- | arch/arm/mach-mx2/pcm038.c | 80 |
4 files changed, 106 insertions, 55 deletions
diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-mx2/devices.c index 092e09baeefa..0bad86527743 100644 --- a/arch/arm/mach-mx2/devices.c +++ b/arch/arm/mach-mx2/devices.c | |||
@@ -205,6 +205,25 @@ struct platform_device mxc_w1_master_device = { | |||
205 | .resource = mxc_w1_master_resources, | 205 | .resource = mxc_w1_master_resources, |
206 | }; | 206 | }; |
207 | 207 | ||
208 | static struct resource mxc_nand_resources[] = { | ||
209 | { | ||
210 | .start = NFC_BASE_ADDR, | ||
211 | .end = NFC_BASE_ADDR + 0xfff, | ||
212 | .flags = IORESOURCE_MEM | ||
213 | }, { | ||
214 | .start = MXC_INT_NANDFC, | ||
215 | .end = MXC_INT_NANDFC, | ||
216 | .flags = IORESOURCE_IRQ | ||
217 | }, | ||
218 | }; | ||
219 | |||
220 | struct platform_device mxc_nand_device = { | ||
221 | .name = "mxc_nand", | ||
222 | .id = 0, | ||
223 | .num_resources = ARRAY_SIZE(mxc_nand_resources), | ||
224 | .resource = mxc_nand_resources, | ||
225 | }; | ||
226 | |||
208 | /* GPIO port description */ | 227 | /* GPIO port description */ |
209 | static struct mxc_gpio_port imx_gpio_ports[] = { | 228 | static struct mxc_gpio_port imx_gpio_ports[] = { |
210 | [0] = { | 229 | [0] = { |
diff --git a/arch/arm/mach-mx2/devices.h b/arch/arm/mach-mx2/devices.h index 5683c4574325..1e8cb577a642 100644 --- a/arch/arm/mach-mx2/devices.h +++ b/arch/arm/mach-mx2/devices.h | |||
@@ -13,3 +13,4 @@ extern struct platform_device mxc_uart_device3; | |||
13 | extern struct platform_device mxc_uart_device4; | 13 | extern struct platform_device mxc_uart_device4; |
14 | extern struct platform_device mxc_uart_device5; | 14 | extern struct platform_device mxc_uart_device5; |
15 | extern struct platform_device mxc_w1_master_device; | 15 | extern struct platform_device mxc_w1_master_device; |
16 | extern struct platform_device mxc_nand_device; | ||
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mx27ads.c index 56e22d3ca075..a06497674436 100644 --- a/arch/arm/mach-mx2/mx27ads.c +++ b/arch/arm/mach-mx2/mx27ads.c | |||
@@ -68,15 +68,14 @@ static int mxc_uart0_pins[] = { | |||
68 | static int uart_mxc_port0_init(struct platform_device *pdev) | 68 | static int uart_mxc_port0_init(struct platform_device *pdev) |
69 | { | 69 | { |
70 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, | 70 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, |
71 | ARRAY_SIZE(mxc_uart0_pins), | 71 | ARRAY_SIZE(mxc_uart0_pins), "UART0"); |
72 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART0"); | ||
73 | } | 72 | } |
74 | 73 | ||
75 | static int uart_mxc_port0_exit(struct platform_device *pdev) | 74 | static int uart_mxc_port0_exit(struct platform_device *pdev) |
76 | { | 75 | { |
77 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, | 76 | mxc_gpio_release_multiple_pins(mxc_uart0_pins, |
78 | ARRAY_SIZE(mxc_uart0_pins), | 77 | ARRAY_SIZE(mxc_uart0_pins)); |
79 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART0"); | 78 | return 0; |
80 | } | 79 | } |
81 | 80 | ||
82 | static int mxc_uart1_pins[] = { | 81 | static int mxc_uart1_pins[] = { |
@@ -89,15 +88,14 @@ static int mxc_uart1_pins[] = { | |||
89 | static int uart_mxc_port1_init(struct platform_device *pdev) | 88 | static int uart_mxc_port1_init(struct platform_device *pdev) |
90 | { | 89 | { |
91 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | 90 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, |
92 | ARRAY_SIZE(mxc_uart1_pins), | 91 | ARRAY_SIZE(mxc_uart1_pins), "UART1"); |
93 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART1"); | ||
94 | } | 92 | } |
95 | 93 | ||
96 | static int uart_mxc_port1_exit(struct platform_device *pdev) | 94 | static int uart_mxc_port1_exit(struct platform_device *pdev) |
97 | { | 95 | { |
98 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | 96 | mxc_gpio_setup_release_pins(mxc_uart1_pins, |
99 | ARRAY_SIZE(mxc_uart1_pins), | 97 | ARRAY_SIZE(mxc_uart1_pins)); |
100 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART1"); | 98 | return 0; |
101 | } | 99 | } |
102 | 100 | ||
103 | static int mxc_uart2_pins[] = { | 101 | static int mxc_uart2_pins[] = { |
@@ -110,15 +108,14 @@ static int mxc_uart2_pins[] = { | |||
110 | static int uart_mxc_port2_init(struct platform_device *pdev) | 108 | static int uart_mxc_port2_init(struct platform_device *pdev) |
111 | { | 109 | { |
112 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, | 110 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, |
113 | ARRAY_SIZE(mxc_uart2_pins), | 111 | ARRAY_SIZE(mxc_uart2_pins), "UART2"); |
114 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART2"); | ||
115 | } | 112 | } |
116 | 113 | ||
117 | static int uart_mxc_port2_exit(struct platform_device *pdev) | 114 | static int uart_mxc_port2_exit(struct platform_device *pdev) |
118 | { | 115 | { |
119 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, | 116 | mxc_gpio_release_multiple_pins(mxc_uart2_pins, |
120 | ARRAY_SIZE(mxc_uart2_pins), | 117 | ARRAY_SIZE(mxc_uart2_pins)); |
121 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART2"); | 118 | return 0; |
122 | } | 119 | } |
123 | 120 | ||
124 | static int mxc_uart3_pins[] = { | 121 | static int mxc_uart3_pins[] = { |
@@ -131,15 +128,13 @@ static int mxc_uart3_pins[] = { | |||
131 | static int uart_mxc_port3_init(struct platform_device *pdev) | 128 | static int uart_mxc_port3_init(struct platform_device *pdev) |
132 | { | 129 | { |
133 | return mxc_gpio_setup_multiple_pins(mxc_uart3_pins, | 130 | return mxc_gpio_setup_multiple_pins(mxc_uart3_pins, |
134 | ARRAY_SIZE(mxc_uart3_pins), | 131 | ARRAY_SIZE(mxc_uart3_pins), "UART3"); |
135 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART3"); | ||
136 | } | 132 | } |
137 | 133 | ||
138 | static int uart_mxc_port3_exit(struct platform_device *pdev) | 134 | static int uart_mxc_port3_exit(struct platform_device *pdev) |
139 | { | 135 | { |
140 | return mxc_gpio_setup_multiple_pins(mxc_uart3_pins, | 136 | mxc_gpio_release_multiple_pins(mxc_uart3_pins, |
141 | ARRAY_SIZE(mxc_uart3_pins), | 137 | ARRAY_SIZE(mxc_uart3_pins)); |
142 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART3"); | ||
143 | } | 138 | } |
144 | 139 | ||
145 | static int mxc_uart4_pins[] = { | 140 | static int mxc_uart4_pins[] = { |
@@ -152,15 +147,14 @@ static int mxc_uart4_pins[] = { | |||
152 | static int uart_mxc_port4_init(struct platform_device *pdev) | 147 | static int uart_mxc_port4_init(struct platform_device *pdev) |
153 | { | 148 | { |
154 | return mxc_gpio_setup_multiple_pins(mxc_uart4_pins, | 149 | return mxc_gpio_setup_multiple_pins(mxc_uart4_pins, |
155 | ARRAY_SIZE(mxc_uart4_pins), | 150 | ARRAY_SIZE(mxc_uart4_pins), "UART4"); |
156 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART4"); | ||
157 | } | 151 | } |
158 | 152 | ||
159 | static int uart_mxc_port4_exit(struct platform_device *pdev) | 153 | static int uart_mxc_port4_exit(struct platform_device *pdev) |
160 | { | 154 | { |
161 | return mxc_gpio_setup_multiple_pins(mxc_uart4_pins, | 155 | mxc_gpio_release_multiple_pins(mxc_uart4_pins, |
162 | ARRAY_SIZE(mxc_uart4_pins), | 156 | ARRAY_SIZE(mxc_uart4_pins)); |
163 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART4"); | 157 | return 0; |
164 | } | 158 | } |
165 | 159 | ||
166 | static int mxc_uart5_pins[] = { | 160 | static int mxc_uart5_pins[] = { |
@@ -173,15 +167,14 @@ static int mxc_uart5_pins[] = { | |||
173 | static int uart_mxc_port5_init(struct platform_device *pdev) | 167 | static int uart_mxc_port5_init(struct platform_device *pdev) |
174 | { | 168 | { |
175 | return mxc_gpio_setup_multiple_pins(mxc_uart5_pins, | 169 | return mxc_gpio_setup_multiple_pins(mxc_uart5_pins, |
176 | ARRAY_SIZE(mxc_uart5_pins), | 170 | ARRAY_SIZE(mxc_uart5_pins), "UART5"); |
177 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART5"); | ||
178 | } | 171 | } |
179 | 172 | ||
180 | static int uart_mxc_port5_exit(struct platform_device *pdev) | 173 | static int uart_mxc_port5_exit(struct platform_device *pdev) |
181 | { | 174 | { |
182 | return mxc_gpio_setup_multiple_pins(mxc_uart5_pins, | 175 | mxc_gpio_release_multiple_pins(mxc_uart5_pins, |
183 | ARRAY_SIZE(mxc_uart5_pins), | 176 | ARRAY_SIZE(mxc_uart5_pins)); |
184 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART5"); | 177 | return 0; |
185 | } | 178 | } |
186 | 179 | ||
187 | static struct platform_device *platform_devices[] __initdata = { | 180 | static struct platform_device *platform_devices[] __initdata = { |
@@ -212,15 +205,13 @@ static int mxc_fec_pins[] = { | |||
212 | static void gpio_fec_active(void) | 205 | static void gpio_fec_active(void) |
213 | { | 206 | { |
214 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, | 207 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, |
215 | ARRAY_SIZE(mxc_fec_pins), | 208 | ARRAY_SIZE(mxc_fec_pins), "FEC"); |
216 | MXC_GPIO_ALLOC_MODE_NORMAL, "FEC"); | ||
217 | } | 209 | } |
218 | 210 | ||
219 | static void gpio_fec_inactive(void) | 211 | static void gpio_fec_inactive(void) |
220 | { | 212 | { |
221 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, | 213 | mxc_gpio_release_multiple_pins(mxc_fec_pins, |
222 | ARRAY_SIZE(mxc_fec_pins), | 214 | ARRAY_SIZE(mxc_fec_pins)); |
223 | MXC_GPIO_ALLOC_MODE_RELEASE, "FEC"); | ||
224 | } | 215 | } |
225 | 216 | ||
226 | static struct imxuart_platform_data uart_pdata[] = { | 217 | static struct imxuart_platform_data uart_pdata[] = { |
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c index ac516b1d3f77..dfd4156da7d5 100644 --- a/arch/arm/mach-mx2/pcm038.c +++ b/arch/arm/mach-mx2/pcm038.c | |||
@@ -19,6 +19,7 @@ | |||
19 | 19 | ||
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/mtd/physmap.h> | 21 | #include <linux/mtd/physmap.h> |
22 | #include <linux/mtd/plat-ram.h> | ||
22 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
23 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
24 | #include <mach/common.h> | 25 | #include <mach/common.h> |
@@ -27,10 +28,36 @@ | |||
27 | #include <asm/mach/time.h> | 28 | #include <asm/mach/time.h> |
28 | #include <mach/imx-uart.h> | 29 | #include <mach/imx-uart.h> |
29 | #include <mach/board-pcm038.h> | 30 | #include <mach/board-pcm038.h> |
31 | #include <mach/mxc_nand.h> | ||
30 | 32 | ||
31 | #include "devices.h" | 33 | #include "devices.h" |
32 | 34 | ||
33 | /* | 35 | /* |
36 | * Phytec's PCM038 comes with 2MiB battery buffered SRAM, | ||
37 | * 16 bit width | ||
38 | */ | ||
39 | |||
40 | static struct platdata_mtd_ram pcm038_sram_data = { | ||
41 | .bankwidth = 2, | ||
42 | }; | ||
43 | |||
44 | static struct resource pcm038_sram_resource = { | ||
45 | .start = CS1_BASE_ADDR, | ||
46 | .end = CS1_BASE_ADDR + 512 * 1024 - 1, | ||
47 | .flags = IORESOURCE_MEM, | ||
48 | }; | ||
49 | |||
50 | static struct platform_device pcm038_sram_mtd_device = { | ||
51 | .name = "mtd-ram", | ||
52 | .id = 0, | ||
53 | .dev = { | ||
54 | .platform_data = &pcm038_sram_data, | ||
55 | }, | ||
56 | .num_resources = 1, | ||
57 | .resource = &pcm038_sram_resource, | ||
58 | }; | ||
59 | |||
60 | /* | ||
34 | * Phytec's phyCORE-i.MX27 comes with 32MiB flash, | 61 | * Phytec's phyCORE-i.MX27 comes with 32MiB flash, |
35 | * 16 bit width | 62 | * 16 bit width |
36 | */ | 63 | */ |
@@ -64,15 +91,14 @@ static int mxc_uart0_pins[] = { | |||
64 | static int uart_mxc_port0_init(struct platform_device *pdev) | 91 | static int uart_mxc_port0_init(struct platform_device *pdev) |
65 | { | 92 | { |
66 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, | 93 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, |
67 | ARRAY_SIZE(mxc_uart0_pins), | 94 | ARRAY_SIZE(mxc_uart0_pins), "UART0"); |
68 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART0"); | ||
69 | } | 95 | } |
70 | 96 | ||
71 | static int uart_mxc_port0_exit(struct platform_device *pdev) | 97 | static int uart_mxc_port0_exit(struct platform_device *pdev) |
72 | { | 98 | { |
73 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, | 99 | mxc_gpio_release_multiple_pins(mxc_uart0_pins, |
74 | ARRAY_SIZE(mxc_uart0_pins), | 100 | ARRAY_SIZE(mxc_uart0_pins)); |
75 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART0"); | 101 | return 0; |
76 | } | 102 | } |
77 | 103 | ||
78 | static int mxc_uart1_pins[] = { | 104 | static int mxc_uart1_pins[] = { |
@@ -85,15 +111,14 @@ static int mxc_uart1_pins[] = { | |||
85 | static int uart_mxc_port1_init(struct platform_device *pdev) | 111 | static int uart_mxc_port1_init(struct platform_device *pdev) |
86 | { | 112 | { |
87 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | 113 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, |
88 | ARRAY_SIZE(mxc_uart1_pins), | 114 | ARRAY_SIZE(mxc_uart1_pins), "UART1"); |
89 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART1"); | ||
90 | } | 115 | } |
91 | 116 | ||
92 | static int uart_mxc_port1_exit(struct platform_device *pdev) | 117 | static int uart_mxc_port1_exit(struct platform_device *pdev) |
93 | { | 118 | { |
94 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | 119 | mxc_gpio_release_multiple_pins(mxc_uart1_pins, |
95 | ARRAY_SIZE(mxc_uart1_pins), | 120 | ARRAY_SIZE(mxc_uart1_pins)); |
96 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART1"); | 121 | return 0; |
97 | } | 122 | } |
98 | 123 | ||
99 | static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS, | 124 | static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS, |
@@ -104,15 +129,14 @@ static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS, | |||
104 | static int uart_mxc_port2_init(struct platform_device *pdev) | 129 | static int uart_mxc_port2_init(struct platform_device *pdev) |
105 | { | 130 | { |
106 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, | 131 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, |
107 | ARRAY_SIZE(mxc_uart2_pins), | 132 | ARRAY_SIZE(mxc_uart2_pins), "UART2"); |
108 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART2"); | ||
109 | } | 133 | } |
110 | 134 | ||
111 | static int uart_mxc_port2_exit(struct platform_device *pdev) | 135 | static int uart_mxc_port2_exit(struct platform_device *pdev) |
112 | { | 136 | { |
113 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, | 137 | mxc_gpio_release_multiple_pins(mxc_uart2_pins, |
114 | ARRAY_SIZE(mxc_uart2_pins), | 138 | ARRAY_SIZE(mxc_uart2_pins)); |
115 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART2"); | 139 | return 0; |
116 | } | 140 | } |
117 | 141 | ||
118 | static struct imxuart_platform_data uart_pdata[] = { | 142 | static struct imxuart_platform_data uart_pdata[] = { |
@@ -155,30 +179,46 @@ static int mxc_fec_pins[] = { | |||
155 | static void gpio_fec_active(void) | 179 | static void gpio_fec_active(void) |
156 | { | 180 | { |
157 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, | 181 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, |
158 | ARRAY_SIZE(mxc_fec_pins), | 182 | ARRAY_SIZE(mxc_fec_pins), "FEC"); |
159 | MXC_GPIO_ALLOC_MODE_NORMAL, "FEC"); | ||
160 | } | 183 | } |
161 | 184 | ||
162 | static void gpio_fec_inactive(void) | 185 | static void gpio_fec_inactive(void) |
163 | { | 186 | { |
164 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, | 187 | mxc_gpio_release_multiple_pins(mxc_fec_pins, |
165 | ARRAY_SIZE(mxc_fec_pins), | 188 | ARRAY_SIZE(mxc_fec_pins)); |
166 | MXC_GPIO_ALLOC_MODE_RELEASE, "FEC"); | ||
167 | } | 189 | } |
168 | 190 | ||
191 | static struct mxc_nand_platform_data pcm038_nand_board_info = { | ||
192 | .width = 1, | ||
193 | .hw_ecc = 1, | ||
194 | }; | ||
195 | |||
169 | static struct platform_device *platform_devices[] __initdata = { | 196 | static struct platform_device *platform_devices[] __initdata = { |
170 | &pcm038_nor_mtd_device, | 197 | &pcm038_nor_mtd_device, |
171 | &mxc_w1_master_device, | 198 | &mxc_w1_master_device, |
199 | &pcm038_sram_mtd_device, | ||
172 | }; | 200 | }; |
173 | 201 | ||
202 | /* On pcm038 there's a sram attached to CS1, we enable the chipselect here and | ||
203 | * setup other stuffs to access the sram. */ | ||
204 | static void __init pcm038_init_sram(void) | ||
205 | { | ||
206 | __raw_writel(0x0000d843, CSCR_U(1)); | ||
207 | __raw_writel(0x22252521, CSCR_L(1)); | ||
208 | __raw_writel(0x22220a00, CSCR_A(1)); | ||
209 | } | ||
210 | |||
174 | static void __init pcm038_init(void) | 211 | static void __init pcm038_init(void) |
175 | { | 212 | { |
176 | gpio_fec_active(); | 213 | gpio_fec_active(); |
214 | pcm038_init_sram(); | ||
177 | 215 | ||
178 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); | 216 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); |
179 | mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); | 217 | mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); |
180 | mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); | 218 | mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); |
219 | |||
181 | mxc_gpio_mode(PE16_AF_RTCK); /* OWIRE */ | 220 | mxc_gpio_mode(PE16_AF_RTCK); /* OWIRE */ |
221 | mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info); | ||
182 | 222 | ||
183 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 223 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
184 | 224 | ||