aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-mx2
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-mx2')
-rw-r--r--arch/arm/mach-mx2/clock_imx27.c4
-rw-r--r--arch/arm/mach-mx2/cpu_imx27.c3
2 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index 6db98566a720..bb9f60318fde 100644
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -29,7 +29,7 @@
29#include <mach/common.h> 29#include <mach/common.h>
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31 31
32#define IO_ADDR_CCM(off) (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off)) 32#define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))
33 33
34/* Register offsets */ 34/* Register offsets */
35#define CCM_CSCR IO_ADDR_CCM(0x0) 35#define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -757,7 +757,7 @@ int __init mx27_clocks_init(unsigned long fref)
757 clk_enable(&uart1_clk); 757 clk_enable(&uart1_clk);
758#endif 758#endif
759 759
760 mxc_timer_init(&gpt1_clk, IO_ADDRESS(MX27_GPT1_BASE_ADDR), 760 mxc_timer_init(&gpt1_clk, MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR),
761 MX27_INT_GPT1); 761 MX27_INT_GPT1);
762 762
763 return 0; 763 return 0;
diff --git a/arch/arm/mach-mx2/cpu_imx27.c b/arch/arm/mach-mx2/cpu_imx27.c
index 8c50c5e7c033..d8d3b2d84dc5 100644
--- a/arch/arm/mach-mx2/cpu_imx27.c
+++ b/arch/arm/mach-mx2/cpu_imx27.c
@@ -39,7 +39,8 @@ static void query_silicon_parameter(void)
39 * the silicon revision very early we read it here to 39 * the silicon revision very early we read it here to
40 * avoid any further hooks 40 * avoid any further hooks
41 */ 41 */
42 val = __raw_readl(IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR) + SYS_CHIP_ID); 42 val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
43 + SYS_CHIP_ID));
43 44
44 cpu_silicon_rev = (int)(val >> 28); 45 cpu_silicon_rev = (int)(val >> 28);
45 cpu_partnumber = (int)((val >> 12) & 0xFFFF); 46 cpu_partnumber = (int)((val >> 12) & 0xFFFF);