diff options
Diffstat (limited to 'arch/arm/mach-mx2')
-rw-r--r-- | arch/arm/mach-mx2/clock_imx27.c | 42 |
1 files changed, 7 insertions, 35 deletions
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c index c69896d011a1..047e71e6ea9a 100644 --- a/arch/arm/mach-mx2/clock_imx27.c +++ b/arch/arm/mach-mx2/clock_imx27.c | |||
@@ -486,26 +486,8 @@ static struct clk ckil_clk = { | |||
486 | 486 | ||
487 | static unsigned long get_mpll_clk(struct clk *clk) | 487 | static unsigned long get_mpll_clk(struct clk *clk) |
488 | { | 488 | { |
489 | uint32_t reg; | 489 | return mxc_decode_pll(__raw_readl(CCM_MPCTL0), |
490 | unsigned long ref_clk; | 490 | clk_get_rate(clk->parent)); |
491 | unsigned long mfi = 0, mfn = 0, mfd = 0, pdf = 0; | ||
492 | unsigned long long temp; | ||
493 | |||
494 | ref_clk = clk_get_rate(clk->parent); | ||
495 | |||
496 | reg = __raw_readl(CCM_MPCTL0); | ||
497 | pdf = (reg & CCM_MPCTL0_PD_MASK) >> CCM_MPCTL0_PD_OFFSET; | ||
498 | mfd = (reg & CCM_MPCTL0_MFD_MASK) >> CCM_MPCTL0_MFD_OFFSET; | ||
499 | mfi = (reg & CCM_MPCTL0_MFI_MASK) >> CCM_MPCTL0_MFI_OFFSET; | ||
500 | mfn = (reg & CCM_MPCTL0_MFN_MASK) >> CCM_MPCTL0_MFN_OFFSET; | ||
501 | |||
502 | mfi = (mfi <= 5) ? 5 : mfi; | ||
503 | temp = 2LL * ref_clk * mfn; | ||
504 | do_div(temp, mfd + 1); | ||
505 | temp = 2LL * ref_clk * mfi + temp; | ||
506 | do_div(temp, pdf + 1); | ||
507 | |||
508 | return (unsigned long)temp; | ||
509 | } | 491 | } |
510 | 492 | ||
511 | static struct clk mpll_clk = { | 493 | static struct clk mpll_clk = { |
@@ -555,28 +537,18 @@ static unsigned long get_spll_clk(struct clk *clk) | |||
555 | { | 537 | { |
556 | uint32_t reg; | 538 | uint32_t reg; |
557 | unsigned long ref_clk; | 539 | unsigned long ref_clk; |
558 | unsigned long mfi = 0, mfn = 0, mfd = 0, pdf = 0; | ||
559 | unsigned long long temp; | ||
560 | 540 | ||
561 | ref_clk = clk_get_rate(clk->parent); | 541 | ref_clk = clk_get_rate(clk->parent); |
562 | 542 | ||
563 | reg = __raw_readl(CCM_SPCTL0); | 543 | reg = __raw_readl(CCM_SPCTL0); |
564 | /*TODO: This is TO2 Bug */ | 544 | |
545 | /* On TO2 we have to write the value back. Otherwise we | ||
546 | * read 0 from this register the next time. | ||
547 | */ | ||
565 | if (mx27_revision() >= CHIP_REV_2_0) | 548 | if (mx27_revision() >= CHIP_REV_2_0) |
566 | __raw_writel(reg, CCM_SPCTL0); | 549 | __raw_writel(reg, CCM_SPCTL0); |
567 | 550 | ||
568 | pdf = (reg & CCM_SPCTL0_PD_MASK) >> CCM_SPCTL0_PD_OFFSET; | 551 | return mxc_decode_pll(reg, ref_clk); |
569 | mfd = (reg & CCM_SPCTL0_MFD_MASK) >> CCM_SPCTL0_MFD_OFFSET; | ||
570 | mfi = (reg & CCM_SPCTL0_MFI_MASK) >> CCM_SPCTL0_MFI_OFFSET; | ||
571 | mfn = (reg & CCM_SPCTL0_MFN_MASK) >> CCM_SPCTL0_MFN_OFFSET; | ||
572 | |||
573 | mfi = (mfi <= 5) ? 5 : mfi; | ||
574 | temp = 2LL * ref_clk * mfn; | ||
575 | do_div(temp, mfd + 1); | ||
576 | temp = 2LL * ref_clk * mfi + temp; | ||
577 | do_div(temp, pdf + 1); | ||
578 | |||
579 | return (unsigned long)temp; | ||
580 | } | 552 | } |
581 | 553 | ||
582 | static struct clk spll_clk = { | 554 | static struct clk spll_clk = { |