diff options
Diffstat (limited to 'arch/arm/mach-mx25/clock.c')
| -rw-r--r-- | arch/arm/mach-mx25/clock.c | 34 |
1 files changed, 28 insertions, 6 deletions
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c index 40c7cc41cee3..9e4a5578c2fb 100644 --- a/arch/arm/mach-mx25/clock.c +++ b/arch/arm/mach-mx25/clock.c | |||
| @@ -72,7 +72,7 @@ unsigned long get_rate_arm(struct clk *clk) | |||
| 72 | unsigned long rate = get_rate_mpll(); | 72 | unsigned long rate = get_rate_mpll(); |
| 73 | 73 | ||
| 74 | if (cctl & (1 << 14)) | 74 | if (cctl & (1 << 14)) |
| 75 | rate = (rate * 3) >> 1; | 75 | rate = (rate * 3) >> 2; |
| 76 | 76 | ||
| 77 | return rate / ((cctl >> 30) + 1); | 77 | return rate / ((cctl >> 30) + 1); |
| 78 | } | 78 | } |
| @@ -99,7 +99,7 @@ static unsigned long get_rate_per(int per) | |||
| 99 | if (readl(CRM_BASE + 0x64) & (1 << per)) | 99 | if (readl(CRM_BASE + 0x64) & (1 << per)) |
| 100 | fref = get_rate_upll(); | 100 | fref = get_rate_upll(); |
| 101 | else | 101 | else |
| 102 | fref = get_rate_ipg(NULL); | 102 | fref = get_rate_ahb(NULL); |
| 103 | 103 | ||
| 104 | return fref / (val + 1); | 104 | return fref / (val + 1); |
| 105 | } | 105 | } |
| @@ -139,6 +139,16 @@ static unsigned long get_rate_lcdc(struct clk *clk) | |||
| 139 | return get_rate_per(7); | 139 | return get_rate_per(7); |
| 140 | } | 140 | } |
| 141 | 141 | ||
| 142 | static unsigned long get_rate_esdhc1(struct clk *clk) | ||
| 143 | { | ||
| 144 | return get_rate_per(3); | ||
| 145 | } | ||
| 146 | |||
| 147 | static unsigned long get_rate_esdhc2(struct clk *clk) | ||
| 148 | { | ||
| 149 | return get_rate_per(4); | ||
| 150 | } | ||
| 151 | |||
| 142 | static unsigned long get_rate_csi(struct clk *clk) | 152 | static unsigned long get_rate_csi(struct clk *clk) |
| 143 | { | 153 | { |
| 144 | return get_rate_per(0); | 154 | return get_rate_per(0); |
| @@ -213,6 +223,12 @@ DEFINE_CLOCK(ssi2_per_clk, 0, CCM_CGCR0, 14, get_rate_ipg, NULL, NULL); | |||
| 213 | DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL); | 223 | DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL); |
| 214 | DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL); | 224 | DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL); |
| 215 | DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL); | 225 | DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL); |
| 226 | DEFINE_CLOCK(esdhc1_ahb_clk, 0, CCM_CGCR0, 21, get_rate_esdhc1, NULL, NULL); | ||
| 227 | DEFINE_CLOCK(esdhc1_per_clk, 0, CCM_CGCR0, 3, get_rate_esdhc1, NULL, | ||
| 228 | &esdhc1_ahb_clk); | ||
| 229 | DEFINE_CLOCK(esdhc2_ahb_clk, 0, CCM_CGCR0, 22, get_rate_esdhc2, NULL, NULL); | ||
| 230 | DEFINE_CLOCK(esdhc2_per_clk, 0, CCM_CGCR0, 4, get_rate_esdhc2, NULL, | ||
| 231 | &esdhc2_ahb_clk); | ||
| 216 | DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL); | 232 | DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL); |
| 217 | DEFINE_CLOCK(lcdc_ahb_clk, 0, CCM_CGCR0, 24, NULL, NULL, NULL); | 233 | DEFINE_CLOCK(lcdc_ahb_clk, 0, CCM_CGCR0, 24, NULL, NULL, NULL); |
| 218 | DEFINE_CLOCK(lcdc_per_clk, 0, CCM_CGCR0, 7, NULL, NULL, &lcdc_ahb_clk); | 234 | DEFINE_CLOCK(lcdc_per_clk, 0, CCM_CGCR0, 7, NULL, NULL, &lcdc_ahb_clk); |
| @@ -238,10 +254,14 @@ DEFINE_CLOCK(lcdc_clk, 0, CCM_CGCR1, 29, get_rate_lcdc, NULL, &lcdc_per_clk); | |||
| 238 | DEFINE_CLOCK(wdt_clk, 0, CCM_CGCR2, 19, get_rate_ipg, NULL, NULL); | 254 | DEFINE_CLOCK(wdt_clk, 0, CCM_CGCR2, 19, get_rate_ipg, NULL, NULL); |
| 239 | DEFINE_CLOCK(ssi1_clk, 0, CCM_CGCR2, 11, get_rate_ssi1, NULL, &ssi1_per_clk); | 255 | DEFINE_CLOCK(ssi1_clk, 0, CCM_CGCR2, 11, get_rate_ssi1, NULL, &ssi1_per_clk); |
| 240 | DEFINE_CLOCK(ssi2_clk, 1, CCM_CGCR2, 12, get_rate_ssi2, NULL, &ssi2_per_clk); | 256 | DEFINE_CLOCK(ssi2_clk, 1, CCM_CGCR2, 12, get_rate_ssi2, NULL, &ssi2_per_clk); |
| 257 | DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGCR1, 13, get_rate_esdhc1, NULL, | ||
| 258 | &esdhc1_per_clk); | ||
| 259 | DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGCR1, 14, get_rate_esdhc2, NULL, | ||
| 260 | &esdhc2_per_clk); | ||
| 241 | DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL); | 261 | DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL); |
| 242 | DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk); | 262 | DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk); |
| 243 | DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL); | 263 | DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL); |
| 244 | DEFINE_CLOCK(can2_clk, 0, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL); | 264 | DEFINE_CLOCK(can2_clk, 1, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL); |
| 245 | 265 | ||
| 246 | #define _REGISTER_CLOCK(d, n, c) \ | 266 | #define _REGISTER_CLOCK(d, n, c) \ |
| 247 | { \ | 267 | { \ |
| @@ -261,9 +281,9 @@ static struct clk_lookup lookups[] = { | |||
| 261 | _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk) | 281 | _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk) |
| 262 | _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk) | 282 | _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk) |
| 263 | _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) | 283 | _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) |
| 264 | _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) | 284 | _REGISTER_CLOCK("imx25-cspi.0", NULL, cspi1_clk) |
| 265 | _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk) | 285 | _REGISTER_CLOCK("imx25-cspi.1", NULL, cspi2_clk) |
| 266 | _REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk) | 286 | _REGISTER_CLOCK("imx25-cspi.2", NULL, cspi3_clk) |
| 267 | _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm1_clk) | 287 | _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm1_clk) |
| 268 | _REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk) | 288 | _REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk) |
| 269 | _REGISTER_CLOCK("mxc_pwm.2", NULL, pwm3_clk) | 289 | _REGISTER_CLOCK("mxc_pwm.2", NULL, pwm3_clk) |
| @@ -279,6 +299,8 @@ static struct clk_lookup lookups[] = { | |||
| 279 | _REGISTER_CLOCK("imx-wdt.0", NULL, wdt_clk) | 299 | _REGISTER_CLOCK("imx-wdt.0", NULL, wdt_clk) |
| 280 | _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) | 300 | _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) |
| 281 | _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) | 301 | _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) |
| 302 | _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) | ||
| 303 | _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk) | ||
| 282 | _REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk) | 304 | _REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk) |
| 283 | _REGISTER_CLOCK(NULL, "audmux", audmux_clk) | 305 | _REGISTER_CLOCK(NULL, "audmux", audmux_clk) |
| 284 | _REGISTER_CLOCK("flexcan.0", NULL, can1_clk) | 306 | _REGISTER_CLOCK("flexcan.0", NULL, can1_clk) |
