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-rw-r--r--arch/arm/mach-mx2/pcm038.c195
1 files changed, 70 insertions, 125 deletions
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c
index aa4eaa61d1b5..a4628d004343 100644
--- a/arch/arm/mach-mx2/pcm038.c
+++ b/arch/arm/mach-mx2/pcm038.c
@@ -17,28 +17,84 @@
17 * MA 02110-1301, USA. 17 * MA 02110-1301, USA.
18 */ 18 */
19 19
20#include <linux/platform_device.h>
21#include <linux/mtd/physmap.h>
22#include <linux/mtd/plat-ram.h>
23#include <linux/io.h>
24#include <linux/i2c.h> 20#include <linux/i2c.h>
25#include <linux/i2c/at24.h> 21#include <linux/i2c/at24.h>
22#include <linux/io.h>
23#include <linux/mtd/plat-ram.h>
24#include <linux/mtd/physmap.h>
25#include <linux/platform_device.h>
26 26
27#include <asm/mach/arch.h>
28#include <asm/mach-types.h> 27#include <asm/mach-types.h>
28#include <asm/mach/arch.h>
29#include <asm/mach/time.h>
30
31#include <mach/board-pcm038.h>
29#include <mach/common.h> 32#include <mach/common.h>
30#include <mach/hardware.h> 33#include <mach/hardware.h>
31#include <mach/iomux.h>
32#ifdef CONFIG_I2C_IMX
33#include <mach/i2c.h> 34#include <mach/i2c.h>
34#endif 35#include <mach/iomux.h>
35#include <asm/mach/time.h>
36#include <mach/imx-uart.h> 36#include <mach/imx-uart.h>
37#include <mach/board-pcm038.h>
38#include <mach/mxc_nand.h> 37#include <mach/mxc_nand.h>
39 38
40#include "devices.h" 39#include "devices.h"
41 40
41static int pcm038_pins[] = {
42 /* UART1 */
43 PE12_PF_UART1_TXD,
44 PE13_PF_UART1_RXD,
45 PE14_PF_UART1_CTS,
46 PE15_PF_UART1_RTS,
47 /* UART2 */
48 PE3_PF_UART2_CTS,
49 PE4_PF_UART2_RTS,
50 PE6_PF_UART2_TXD,
51 PE7_PF_UART2_RXD,
52 /* UART3 */
53 PE8_PF_UART3_TXD,
54 PE9_PF_UART3_RXD,
55 PE10_PF_UART3_CTS,
56 PE11_PF_UART3_RTS,
57 /* FEC */
58 PD0_AIN_FEC_TXD0,
59 PD1_AIN_FEC_TXD1,
60 PD2_AIN_FEC_TXD2,
61 PD3_AIN_FEC_TXD3,
62 PD4_AOUT_FEC_RX_ER,
63 PD5_AOUT_FEC_RXD1,
64 PD6_AOUT_FEC_RXD2,
65 PD7_AOUT_FEC_RXD3,
66 PD8_AF_FEC_MDIO,
67 PD9_AIN_FEC_MDC,
68 PD10_AOUT_FEC_CRS,
69 PD11_AOUT_FEC_TX_CLK,
70 PD12_AOUT_FEC_RXD0,
71 PD13_AOUT_FEC_RX_DV,
72 PD14_AOUT_FEC_RX_CLK,
73 PD15_AOUT_FEC_COL,
74 PD16_AIN_FEC_TX_ER,
75 PF23_AIN_FEC_TX_EN,
76 /* I2C2 */
77 PC5_PF_I2C2_SDA,
78 PC6_PF_I2C2_SCL,
79 /* SPI1 */
80 PD25_PF_CSPI1_RDY,
81 PD27_PF_CSPI1_SS1,
82 PD28_PF_CSPI1_SS0,
83 PD29_PF_CSPI1_SCLK,
84 PD30_PF_CSPI1_MISO,
85 PD31_PF_CSPI1_MOSI,
86 /* SSI1 */
87 PC20_PF_SSI1_FS,
88 PC21_PF_SSI1_RXD,
89 PC22_PF_SSI1_TXD,
90 PC23_PF_SSI1_CLK,
91 /* SSI4 */
92 PC16_PF_SSI4_FS,
93 PC17_PF_SSI4_RXD,
94 PC18_PF_SSI4_TXD,
95 PC19_PF_SSI4_CLK,
96};
97
42/* 98/*
43 * Phytec's PCM038 comes with 2MiB battery buffered SRAM, 99 * Phytec's PCM038 comes with 2MiB battery buffered SRAM,
44 * 16 bit width 100 * 16 bit width
@@ -88,107 +144,16 @@ static struct platform_device pcm038_nor_mtd_device = {
88 .resource = &pcm038_flash_resource, 144 .resource = &pcm038_flash_resource,
89}; 145};
90 146
91static int mxc_uart0_pins[] = {
92 PE12_PF_UART1_TXD,
93 PE13_PF_UART1_RXD,
94 PE14_PF_UART1_CTS,
95 PE15_PF_UART1_RTS
96};
97
98static int uart_mxc_port0_init(struct platform_device *pdev)
99{
100 return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
101 ARRAY_SIZE(mxc_uart0_pins), "UART0");
102}
103
104static int uart_mxc_port0_exit(struct platform_device *pdev)
105{
106 mxc_gpio_release_multiple_pins(mxc_uart0_pins,
107 ARRAY_SIZE(mxc_uart0_pins));
108 return 0;
109}
110
111static int mxc_uart1_pins[] = {
112 PE3_PF_UART2_CTS,
113 PE4_PF_UART2_RTS,
114 PE6_PF_UART2_TXD,
115 PE7_PF_UART2_RXD
116};
117
118static int uart_mxc_port1_init(struct platform_device *pdev)
119{
120 return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
121 ARRAY_SIZE(mxc_uart1_pins), "UART1");
122}
123
124static int uart_mxc_port1_exit(struct platform_device *pdev)
125{
126 mxc_gpio_release_multiple_pins(mxc_uart1_pins,
127 ARRAY_SIZE(mxc_uart1_pins));
128 return 0;
129}
130
131static int mxc_uart2_pins[] = { PE8_PF_UART3_TXD,
132 PE9_PF_UART3_RXD,
133 PE10_PF_UART3_CTS,
134 PE11_PF_UART3_RTS };
135
136static int uart_mxc_port2_init(struct platform_device *pdev)
137{
138 return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
139 ARRAY_SIZE(mxc_uart2_pins), "UART2");
140}
141
142static int uart_mxc_port2_exit(struct platform_device *pdev)
143{
144 mxc_gpio_release_multiple_pins(mxc_uart2_pins,
145 ARRAY_SIZE(mxc_uart2_pins));
146 return 0;
147}
148
149static struct imxuart_platform_data uart_pdata[] = { 147static struct imxuart_platform_data uart_pdata[] = {
150 { 148 {
151 .init = uart_mxc_port0_init,
152 .exit = uart_mxc_port0_exit,
153 .flags = IMXUART_HAVE_RTSCTS, 149 .flags = IMXUART_HAVE_RTSCTS,
154 }, { 150 }, {
155 .init = uart_mxc_port1_init,
156 .exit = uart_mxc_port1_exit,
157 .flags = IMXUART_HAVE_RTSCTS, 151 .flags = IMXUART_HAVE_RTSCTS,
158 }, { 152 }, {
159 .init = uart_mxc_port2_init,
160 .exit = uart_mxc_port2_exit,
161 .flags = IMXUART_HAVE_RTSCTS, 153 .flags = IMXUART_HAVE_RTSCTS,
162 }, 154 },
163}; 155};
164 156
165static int mxc_fec_pins[] = {
166 PD0_AIN_FEC_TXD0,
167 PD1_AIN_FEC_TXD1,
168 PD2_AIN_FEC_TXD2,
169 PD3_AIN_FEC_TXD3,
170 PD4_AOUT_FEC_RX_ER,
171 PD5_AOUT_FEC_RXD1,
172 PD6_AOUT_FEC_RXD2,
173 PD7_AOUT_FEC_RXD3,
174 PD8_AF_FEC_MDIO,
175 PD9_AIN_FEC_MDC,
176 PD10_AOUT_FEC_CRS,
177 PD11_AOUT_FEC_TX_CLK,
178 PD12_AOUT_FEC_RXD0,
179 PD13_AOUT_FEC_RX_DV,
180 PD14_AOUT_FEC_RX_CLK,
181 PD15_AOUT_FEC_COL,
182 PD16_AIN_FEC_TX_ER,
183 PF23_AIN_FEC_TX_EN
184};
185
186static void gpio_fec_active(void)
187{
188 mxc_gpio_setup_multiple_pins(mxc_fec_pins,
189 ARRAY_SIZE(mxc_fec_pins), "FEC");
190}
191
192static struct mxc_nand_platform_data pcm038_nand_board_info = { 157static struct mxc_nand_platform_data pcm038_nand_board_info = {
193 .width = 1, 158 .width = 1,
194 .hw_ecc = 1, 159 .hw_ecc = 1,
@@ -210,27 +175,8 @@ static void __init pcm038_init_sram(void)
210 __raw_writel(0x22220a00, CSCR_A(1)); 175 __raw_writel(0x22220a00, CSCR_A(1));
211} 176}
212 177
213#ifdef CONFIG_I2C_IMX
214static int mxc_i2c1_pins[] = {
215 PC5_PF_I2C2_SDA,
216 PC6_PF_I2C2_SCL
217};
218
219static int pcm038_i2c_1_init(struct device *dev)
220{
221 return mxc_gpio_setup_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins),
222 "I2C1");
223}
224
225static void pcm038_i2c_1_exit(struct device *dev)
226{
227 mxc_gpio_release_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins));
228}
229
230static struct imxi2c_platform_data pcm038_i2c_1_data = { 178static struct imxi2c_platform_data pcm038_i2c_1_data = {
231 .bitrate = 100000, 179 .bitrate = 100000,
232 .init = pcm038_i2c_1_init,
233 .exit = pcm038_i2c_1_exit,
234}; 180};
235 181
236static struct at24_platform_data board_eeprom = { 182static struct at24_platform_data board_eeprom = {
@@ -253,11 +199,12 @@ static struct i2c_board_info pcm038_i2c_devices[] = {
253 .type = "lm75" 199 .type = "lm75"
254 } 200 }
255}; 201};
256#endif
257 202
258static void __init pcm038_init(void) 203static void __init pcm038_init(void)
259{ 204{
260 gpio_fec_active(); 205 mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
206 "PCM038");
207
261 pcm038_init_sram(); 208 pcm038_init_sram();
262 209
263 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); 210 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
@@ -267,13 +214,11 @@ static void __init pcm038_init(void)
267 mxc_gpio_mode(PE16_AF_OWIRE); 214 mxc_gpio_mode(PE16_AF_OWIRE);
268 mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info); 215 mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info);
269 216
270#ifdef CONFIG_I2C_IMX
271 /* only the i2c master 1 is used on this CPU card */ 217 /* only the i2c master 1 is used on this CPU card */
272 i2c_register_board_info(1, pcm038_i2c_devices, 218 i2c_register_board_info(1, pcm038_i2c_devices,
273 ARRAY_SIZE(pcm038_i2c_devices)); 219 ARRAY_SIZE(pcm038_i2c_devices));
274 220
275 mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data); 221 mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data);
276#endif
277 222
278 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 223 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
279 224
@@ -295,7 +240,7 @@ MACHINE_START(PCM038, "phyCORE-i.MX27")
295 .phys_io = AIPI_BASE_ADDR, 240 .phys_io = AIPI_BASE_ADDR,
296 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, 241 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
297 .boot_params = PHYS_OFFSET + 0x100, 242 .boot_params = PHYS_OFFSET + 0x100,
298 .map_io = mxc_map_io, 243 .map_io = mx27_map_io,
299 .init_irq = mxc_init_irq, 244 .init_irq = mxc_init_irq,
300 .init_machine = pcm038_init, 245 .init_machine = pcm038_init,
301 .timer = &pcm038_timer, 246 .timer = &pcm038_timer,