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-rw-r--r--arch/arm/mach-mx2/mx27ads.c315
1 files changed, 179 insertions, 136 deletions
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mx27ads.c
index 4a3b097adc12..02daddac6995 100644
--- a/arch/arm/mach-mx2/mx27ads.c
+++ b/arch/arm/mach-mx2/mx27ads.c
@@ -23,6 +23,8 @@
23#include <linux/mtd/map.h> 23#include <linux/mtd/map.h>
24#include <linux/mtd/partitions.h> 24#include <linux/mtd/partitions.h>
25#include <linux/mtd/physmap.h> 25#include <linux/mtd/physmap.h>
26#include <linux/i2c.h>
27#include <linux/irq.h>
26#include <mach/common.h> 28#include <mach/common.h>
27#include <mach/hardware.h> 29#include <mach/hardware.h>
28#include <asm/mach-types.h> 30#include <asm/mach-types.h>
@@ -33,9 +35,117 @@
33#include <mach/imx-uart.h> 35#include <mach/imx-uart.h>
34#include <mach/iomux.h> 36#include <mach/iomux.h>
35#include <mach/board-mx27ads.h> 37#include <mach/board-mx27ads.h>
38#include <mach/mxc_nand.h>
39#include <mach/i2c.h>
40#include <mach/imxfb.h>
41#include <mach/mmc.h>
36 42
37#include "devices.h" 43#include "devices.h"
38 44
45static unsigned int mx27ads_pins[] = {
46 /* UART0 */
47 PE12_PF_UART1_TXD,
48 PE13_PF_UART1_RXD,
49 PE14_PF_UART1_CTS,
50 PE15_PF_UART1_RTS,
51 /* UART1 */
52 PE3_PF_UART2_CTS,
53 PE4_PF_UART2_RTS,
54 PE6_PF_UART2_TXD,
55 PE7_PF_UART2_RXD,
56 /* UART2 */
57 PE8_PF_UART3_TXD,
58 PE9_PF_UART3_RXD,
59 PE10_PF_UART3_CTS,
60 PE11_PF_UART3_RTS,
61 /* UART3 */
62 PB26_AF_UART4_RTS,
63 PB28_AF_UART4_TXD,
64 PB29_AF_UART4_CTS,
65 PB31_AF_UART4_RXD,
66 /* UART4 */
67 PB18_AF_UART5_TXD,
68 PB19_AF_UART5_RXD,
69 PB20_AF_UART5_CTS,
70 PB21_AF_UART5_RTS,
71 /* UART5 */
72 PB10_AF_UART6_TXD,
73 PB12_AF_UART6_CTS,
74 PB11_AF_UART6_RXD,
75 PB13_AF_UART6_RTS,
76 /* FEC */
77 PD0_AIN_FEC_TXD0,
78 PD1_AIN_FEC_TXD1,
79 PD2_AIN_FEC_TXD2,
80 PD3_AIN_FEC_TXD3,
81 PD4_AOUT_FEC_RX_ER,
82 PD5_AOUT_FEC_RXD1,
83 PD6_AOUT_FEC_RXD2,
84 PD7_AOUT_FEC_RXD3,
85 PD8_AF_FEC_MDIO,
86 PD9_AIN_FEC_MDC,
87 PD10_AOUT_FEC_CRS,
88 PD11_AOUT_FEC_TX_CLK,
89 PD12_AOUT_FEC_RXD0,
90 PD13_AOUT_FEC_RX_DV,
91 PD14_AOUT_FEC_RX_CLK,
92 PD15_AOUT_FEC_COL,
93 PD16_AIN_FEC_TX_ER,
94 PF23_AIN_FEC_TX_EN,
95 /* I2C2 */
96 PC5_PF_I2C2_SDA,
97 PC6_PF_I2C2_SCL,
98 /* FB */
99 PA5_PF_LSCLK,
100 PA6_PF_LD0,
101 PA7_PF_LD1,
102 PA8_PF_LD2,
103 PA9_PF_LD3,
104 PA10_PF_LD4,
105 PA11_PF_LD5,
106 PA12_PF_LD6,
107 PA13_PF_LD7,
108 PA14_PF_LD8,
109 PA15_PF_LD9,
110 PA16_PF_LD10,
111 PA17_PF_LD11,
112 PA18_PF_LD12,
113 PA19_PF_LD13,
114 PA20_PF_LD14,
115 PA21_PF_LD15,
116 PA22_PF_LD16,
117 PA23_PF_LD17,
118 PA24_PF_REV,
119 PA25_PF_CLS,
120 PA26_PF_PS,
121 PA27_PF_SPL_SPR,
122 PA28_PF_HSYNC,
123 PA29_PF_VSYNC,
124 PA30_PF_CONTRAST,
125 PA31_PF_OE_ACD,
126 /* OWIRE */
127 PE16_AF_OWIRE,
128 /* SDHC1*/
129 PE18_PF_SD1_D0,
130 PE19_PF_SD1_D1,
131 PE20_PF_SD1_D2,
132 PE21_PF_SD1_D3,
133 PE22_PF_SD1_CMD,
134 PE23_PF_SD1_CLK,
135 /* SDHC2*/
136 PB4_PF_SD2_D0,
137 PB5_PF_SD2_D1,
138 PB6_PF_SD2_D2,
139 PB7_PF_SD2_D3,
140 PB8_PF_SD2_CMD,
141 PB9_PF_SD2_CLK,
142};
143
144static struct mxc_nand_platform_data mx27ads_nand_board_info = {
145 .width = 1,
146 .hw_ecc = 1,
147};
148
39/* ADS's NOR flash */ 149/* ADS's NOR flash */
40static struct physmap_flash_data mx27ads_flash_data = { 150static struct physmap_flash_data mx27ads_flash_data = {
41 .width = 2, 151 .width = 2,
@@ -58,189 +168,113 @@ static struct platform_device mx27ads_nor_mtd_device = {
58 .resource = &mx27ads_flash_resource, 168 .resource = &mx27ads_flash_resource,
59}; 169};
60 170
61static int mxc_uart0_pins[] = { 171static struct imxi2c_platform_data mx27ads_i2c_data = {
62 PE12_PF_UART1_TXD, 172 .bitrate = 100000,
63 PE13_PF_UART1_RXD,
64 PE14_PF_UART1_CTS,
65 PE15_PF_UART1_RTS
66}; 173};
67 174
68static int uart_mxc_port0_init(struct platform_device *pdev) 175static struct i2c_board_info mx27ads_i2c_devices[] = {
69{
70 return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
71 ARRAY_SIZE(mxc_uart0_pins), "UART0");
72}
73
74static int uart_mxc_port0_exit(struct platform_device *pdev)
75{
76 mxc_gpio_release_multiple_pins(mxc_uart0_pins,
77 ARRAY_SIZE(mxc_uart0_pins));
78 return 0;
79}
80
81static int mxc_uart1_pins[] = {
82 PE3_PF_UART2_CTS,
83 PE4_PF_UART2_RTS,
84 PE6_PF_UART2_TXD,
85 PE7_PF_UART2_RXD
86}; 176};
87 177
88static int uart_mxc_port1_init(struct platform_device *pdev) 178void lcd_power(int on)
89{ 179{
90 return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, 180 if (on)
91 ARRAY_SIZE(mxc_uart1_pins), "UART1"); 181 __raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_SET_REG);
182 else
183 __raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_CLEAR_REG);
92} 184}
93 185
94static int uart_mxc_port1_exit(struct platform_device *pdev) 186static struct imx_fb_platform_data mx27ads_fb_data = {
95{ 187 .pixclock = 188679,
96 mxc_gpio_release_multiple_pins(mxc_uart1_pins, 188 .xres = 240,
97 ARRAY_SIZE(mxc_uart1_pins)); 189 .yres = 320,
98 return 0; 190
99} 191 .bpp = 16,
100 192 .hsync_len = 1,
101static int mxc_uart2_pins[] = { 193 .left_margin = 9,
102 PE8_PF_UART3_TXD, 194 .right_margin = 16,
103 PE9_PF_UART3_RXD, 195
104 PE10_PF_UART3_CTS, 196 .vsync_len = 1,
105 PE11_PF_UART3_RTS 197 .upper_margin = 7,
198 .lower_margin = 9,
199 .fixed_screen_cpu = 0,
200
201 /*
202 * - HSYNC active high
203 * - VSYNC active high
204 * - clk notenabled while idle
205 * - clock inverted
206 * - data not inverted
207 * - data enable low active
208 * - enable sharp mode
209 */
210 .pcr = 0xFB008BC0,
211 .pwmr = 0x00A903FF,
212 .lscr1 = 0x00120300,
213 .dmacr = 0x00020010,
214
215 .lcd_power = lcd_power,
106}; 216};
107 217
108static int uart_mxc_port2_init(struct platform_device *pdev) 218static int mx27ads_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
219 void *data)
109{ 220{
110 return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, 221 return request_irq(IRQ_GPIOE(21), detect_irq, IRQF_TRIGGER_RISING,
111 ARRAY_SIZE(mxc_uart2_pins), "UART2"); 222 "sdhc1-card-detect", data);
112} 223}
113 224
114static int uart_mxc_port2_exit(struct platform_device *pdev) 225static int mx27ads_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
226 void *data)
115{ 227{
116 mxc_gpio_release_multiple_pins(mxc_uart2_pins, 228 return request_irq(IRQ_GPIOB(7), detect_irq, IRQF_TRIGGER_RISING,
117 ARRAY_SIZE(mxc_uart2_pins)); 229 "sdhc2-card-detect", data);
118 return 0;
119} 230}
120 231
121static int mxc_uart3_pins[] = { 232static void mx27ads_sdhc1_exit(struct device *dev, void *data)
122 PB26_AF_UART4_RTS,
123 PB28_AF_UART4_TXD,
124 PB29_AF_UART4_CTS,
125 PB31_AF_UART4_RXD
126};
127
128static int uart_mxc_port3_init(struct platform_device *pdev)
129{ 233{
130 return mxc_gpio_setup_multiple_pins(mxc_uart3_pins, 234 free_irq(IRQ_GPIOE(21), data);
131 ARRAY_SIZE(mxc_uart3_pins), "UART3");
132} 235}
133 236
134static int uart_mxc_port3_exit(struct platform_device *pdev) 237static void mx27ads_sdhc2_exit(struct device *dev, void *data)
135{ 238{
136 mxc_gpio_release_multiple_pins(mxc_uart3_pins, 239 free_irq(IRQ_GPIOB(7), data);
137 ARRAY_SIZE(mxc_uart3_pins));
138 return 0;
139} 240}
140 241
141static int mxc_uart4_pins[] = { 242static struct imxmmc_platform_data sdhc1_pdata = {
142 PB18_AF_UART5_TXD, 243 .init = mx27ads_sdhc1_init,
143 PB19_AF_UART5_RXD, 244 .exit = mx27ads_sdhc1_exit,
144 PB20_AF_UART5_CTS,
145 PB21_AF_UART5_RTS
146}; 245};
147 246
148static int uart_mxc_port4_init(struct platform_device *pdev) 247static struct imxmmc_platform_data sdhc2_pdata = {
149{ 248 .init = mx27ads_sdhc2_init,
150 return mxc_gpio_setup_multiple_pins(mxc_uart4_pins, 249 .exit = mx27ads_sdhc2_exit,
151 ARRAY_SIZE(mxc_uart4_pins), "UART4");
152}
153
154static int uart_mxc_port4_exit(struct platform_device *pdev)
155{
156 mxc_gpio_release_multiple_pins(mxc_uart4_pins,
157 ARRAY_SIZE(mxc_uart4_pins));
158 return 0;
159}
160
161static int mxc_uart5_pins[] = {
162 PB10_AF_UART6_TXD,
163 PB12_AF_UART6_CTS,
164 PB11_AF_UART6_RXD,
165 PB13_AF_UART6_RTS
166}; 250};
167 251
168static int uart_mxc_port5_init(struct platform_device *pdev)
169{
170 return mxc_gpio_setup_multiple_pins(mxc_uart5_pins,
171 ARRAY_SIZE(mxc_uart5_pins), "UART5");
172}
173
174static int uart_mxc_port5_exit(struct platform_device *pdev)
175{
176 mxc_gpio_release_multiple_pins(mxc_uart5_pins,
177 ARRAY_SIZE(mxc_uart5_pins));
178 return 0;
179}
180
181static struct platform_device *platform_devices[] __initdata = { 252static struct platform_device *platform_devices[] __initdata = {
182 &mx27ads_nor_mtd_device, 253 &mx27ads_nor_mtd_device,
183 &mxc_fec_device, 254 &mxc_fec_device,
255 &mxc_w1_master_device,
184}; 256};
185 257
186static int mxc_fec_pins[] = {
187 PD0_AIN_FEC_TXD0,
188 PD1_AIN_FEC_TXD1,
189 PD2_AIN_FEC_TXD2,
190 PD3_AIN_FEC_TXD3,
191 PD4_AOUT_FEC_RX_ER,
192 PD5_AOUT_FEC_RXD1,
193 PD6_AOUT_FEC_RXD2,
194 PD7_AOUT_FEC_RXD3,
195 PD8_AF_FEC_MDIO,
196 PD9_AIN_FEC_MDC,
197 PD10_AOUT_FEC_CRS,
198 PD11_AOUT_FEC_TX_CLK,
199 PD12_AOUT_FEC_RXD0,
200 PD13_AOUT_FEC_RX_DV,
201 PD14_AOUT_FEC_RX_CLK,
202 PD15_AOUT_FEC_COL,
203 PD16_AIN_FEC_TX_ER,
204 PF23_AIN_FEC_TX_EN
205};
206
207static void gpio_fec_active(void)
208{
209 mxc_gpio_setup_multiple_pins(mxc_fec_pins,
210 ARRAY_SIZE(mxc_fec_pins), "FEC");
211}
212
213static struct imxuart_platform_data uart_pdata[] = { 258static struct imxuart_platform_data uart_pdata[] = {
214 { 259 {
215 .init = uart_mxc_port0_init,
216 .exit = uart_mxc_port0_exit,
217 .flags = IMXUART_HAVE_RTSCTS, 260 .flags = IMXUART_HAVE_RTSCTS,
218 }, { 261 }, {
219 .init = uart_mxc_port1_init,
220 .exit = uart_mxc_port1_exit,
221 .flags = IMXUART_HAVE_RTSCTS, 262 .flags = IMXUART_HAVE_RTSCTS,
222 }, { 263 }, {
223 .init = uart_mxc_port2_init,
224 .exit = uart_mxc_port2_exit,
225 .flags = IMXUART_HAVE_RTSCTS, 264 .flags = IMXUART_HAVE_RTSCTS,
226 }, { 265 }, {
227 .init = uart_mxc_port3_init,
228 .exit = uart_mxc_port3_exit,
229 .flags = IMXUART_HAVE_RTSCTS, 266 .flags = IMXUART_HAVE_RTSCTS,
230 }, { 267 }, {
231 .init = uart_mxc_port4_init,
232 .exit = uart_mxc_port4_exit,
233 .flags = IMXUART_HAVE_RTSCTS, 268 .flags = IMXUART_HAVE_RTSCTS,
234 }, { 269 }, {
235 .init = uart_mxc_port5_init,
236 .exit = uart_mxc_port5_exit,
237 .flags = IMXUART_HAVE_RTSCTS, 270 .flags = IMXUART_HAVE_RTSCTS,
238 }, 271 },
239}; 272};
240 273
241static void __init mx27ads_board_init(void) 274static void __init mx27ads_board_init(void)
242{ 275{
243 gpio_fec_active(); 276 mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins),
277 "mx27ads");
244 278
245 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); 279 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
246 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); 280 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
@@ -248,6 +282,15 @@ static void __init mx27ads_board_init(void)
248 mxc_register_device(&mxc_uart_device3, &uart_pdata[3]); 282 mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
249 mxc_register_device(&mxc_uart_device4, &uart_pdata[4]); 283 mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
250 mxc_register_device(&mxc_uart_device5, &uart_pdata[5]); 284 mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
285 mxc_register_device(&mxc_nand_device, &mx27ads_nand_board_info);
286
287 /* only the i2c master 1 is used on this CPU card */
288 i2c_register_board_info(1, mx27ads_i2c_devices,
289 ARRAY_SIZE(mx27ads_i2c_devices));
290 mxc_register_device(&mxc_i2c_device1, &mx27ads_i2c_data);
291 mxc_register_device(&mxc_fb_device, &mx27ads_fb_data);
292 mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata);
293 mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata);
251 294
252 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 295 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
253} 296}
@@ -277,7 +320,7 @@ static struct map_desc mx27ads_io_desc[] __initdata = {
277 320
278static void __init mx27ads_map_io(void) 321static void __init mx27ads_map_io(void)
279{ 322{
280 mxc_map_io(); 323 mx27_map_io();
281 iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc)); 324 iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc));
282} 325}
283 326