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-rw-r--r--arch/arm/mach-mv78xx0/buffalo-wxl-setup.c1
-rw-r--r--arch/arm/mach-mv78xx0/common.c8
-rw-r--r--arch/arm/mach-mv78xx0/common.h1
-rw-r--r--arch/arm/mach-mv78xx0/db78x00-bp-setup.c1
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/bridge-regs.h4
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/gpio.h31
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/mv78xx0.h1
-rw-r--r--arch/arm/mach-mv78xx0/irq.c22
-rw-r--r--arch/arm/mach-mv78xx0/mpp.c3
-rw-r--r--arch/arm/mach-mv78xx0/rd78x00-masa-setup.c1
10 files changed, 18 insertions, 55 deletions
diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
index 29e390e89ff4..20f3f125ed2b 100644
--- a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
+++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
@@ -148,6 +148,7 @@ MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
148 .boot_params = 0x00000100, 148 .boot_params = 0x00000100,
149 .init_machine = wxl_init, 149 .init_machine = wxl_init,
150 .map_io = mv78xx0_map_io, 150 .map_io = mv78xx0_map_io,
151 .init_early = mv78xx0_init_early,
151 .init_irq = mv78xx0_init_irq, 152 .init_irq = mv78xx0_init_irq,
152 .timer = &mv78xx0_timer, 153 .timer = &mv78xx0_timer,
153MACHINE_END 154MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 08465eb6a2c2..44fb4e55be0d 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -818,9 +818,15 @@ void __init mv78xx0_uart3_init(void)
818/***************************************************************************** 818/*****************************************************************************
819 * Time handling 819 * Time handling
820 ****************************************************************************/ 820 ****************************************************************************/
821void __init mv78xx0_init_early(void)
822{
823 orion_time_set_base(TIMER_VIRT_BASE);
824}
825
821static void mv78xx0_timer_init(void) 826static void mv78xx0_timer_init(void)
822{ 827{
823 orion_time_init(IRQ_MV78XX0_TIMER_1, get_tclk()); 828 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
829 IRQ_MV78XX0_TIMER_1, get_tclk());
824} 830}
825 831
826struct sys_timer mv78xx0_timer = { 832struct sys_timer mv78xx0_timer = {
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h
index befc22475469..632e63d65e7a 100644
--- a/arch/arm/mach-mv78xx0/common.h
+++ b/arch/arm/mach-mv78xx0/common.h
@@ -20,6 +20,7 @@ struct mv_sata_platform_data;
20int mv78xx0_core_index(void); 20int mv78xx0_core_index(void);
21void mv78xx0_map_io(void); 21void mv78xx0_map_io(void);
22void mv78xx0_init(void); 22void mv78xx0_init(void);
23void mv78xx0_init_early(void);
23void mv78xx0_init_irq(void); 24void mv78xx0_init_irq(void);
24 25
25extern struct mbus_dram_target_info mv78xx0_mbus_dram_info; 26extern struct mbus_dram_target_info mv78xx0_mbus_dram_info;
diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
index 207c95e403b9..df5aebe5b0fa 100644
--- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
+++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
@@ -96,6 +96,7 @@ MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board")
96 .boot_params = 0x00000100, 96 .boot_params = 0x00000100,
97 .init_machine = db78x00_init, 97 .init_machine = db78x00_init,
98 .map_io = mv78xx0_map_io, 98 .map_io = mv78xx0_map_io,
99 .init_early = mv78xx0_init_early,
99 .init_irq = mv78xx0_init_irq, 100 .init_irq = mv78xx0_init_irq,
100 .timer = &mv78xx0_timer, 101 .timer = &mv78xx0_timer,
101MACHINE_END 102MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
index 2d14c4fe294d..c64dbb96dbad 100644
--- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
@@ -20,10 +20,6 @@
20#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) 20#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
21#define SOFT_RESET 0x00000001 21#define SOFT_RESET 0x00000001
22 22
23#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
24#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
25#define BRIDGE_INT_TIMER0 0x0002
26#define BRIDGE_INT_TIMER1 0x0004
27#define BRIDGE_INT_TIMER1_CLR (~0x0004) 23#define BRIDGE_INT_TIMER1_CLR (~0x0004)
28 24
29#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) 25#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
diff --git a/arch/arm/mach-mv78xx0/include/mach/gpio.h b/arch/arm/mach-mv78xx0/include/mach/gpio.h
index d9d1535ea100..77e1b843e768 100644
--- a/arch/arm/mach-mv78xx0/include/mach/gpio.h
+++ b/arch/arm/mach-mv78xx0/include/mach/gpio.h
@@ -6,35 +6,4 @@
6 * warranty of any kind, whether express or implied. 6 * warranty of any kind, whether express or implied.
7 */ 7 */
8 8
9#ifndef __ASM_ARCH_GPIO_H
10#define __ASM_ARCH_GPIO_H
11
12#include <mach/irqs.h>
13#include <plat/gpio.h> 9#include <plat/gpio.h>
14#include <asm-generic/gpio.h> /* cansleep wrappers */
15
16extern int mv78xx0_core_index(void);
17
18#define GPIO_MAX 32
19#define GPIO_OUT(pin) (DEV_BUS_VIRT_BASE + 0x0100)
20#define GPIO_IO_CONF(pin) (DEV_BUS_VIRT_BASE + 0x0104)
21#define GPIO_BLINK_EN(pin) (DEV_BUS_VIRT_BASE + 0x0108)
22#define GPIO_IN_POL(pin) (DEV_BUS_VIRT_BASE + 0x010c)
23#define GPIO_DATA_IN(pin) (DEV_BUS_VIRT_BASE + 0x0110)
24#define GPIO_EDGE_CAUSE(pin) (DEV_BUS_VIRT_BASE + 0x0114)
25#define GPIO_MASK_OFF (mv78xx0_core_index() ? 0x18 : 0)
26#define GPIO_EDGE_MASK(pin) (DEV_BUS_VIRT_BASE + 0x0118 + GPIO_MASK_OFF)
27#define GPIO_LEVEL_MASK(pin) (DEV_BUS_VIRT_BASE + 0x011c + GPIO_MASK_OFF)
28
29static inline int gpio_to_irq(int pin)
30{
31 return pin + IRQ_MV78XX0_GPIO_START;
32}
33
34static inline int irq_to_gpio(int irq)
35{
36 return irq - IRQ_MV78XX0_GPIO_START;
37}
38
39
40#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index 3eff39921d4d..3674497162e3 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -71,6 +71,7 @@
71#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000) 71#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000)
72#define SAMPLE_AT_RESET_LOW (DEV_BUS_VIRT_BASE | 0x0030) 72#define SAMPLE_AT_RESET_LOW (DEV_BUS_VIRT_BASE | 0x0030)
73#define SAMPLE_AT_RESET_HIGH (DEV_BUS_VIRT_BASE | 0x0034) 73#define SAMPLE_AT_RESET_HIGH (DEV_BUS_VIRT_BASE | 0x0034)
74#define GPIO_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x0100)
74#define I2C_0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1000) 75#define I2C_0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1000)
75#define I2C_1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1100) 76#define I2C_1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1100)
76#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000) 77#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000)
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 22b4ff893b3c..08da497c39c2 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -26,28 +26,18 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
26 26
27void __init mv78xx0_init_irq(void) 27void __init mv78xx0_init_irq(void)
28{ 28{
29 int i;
30
31 /* Initialize gpiolib. */
32 orion_gpio_init();
33
34 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)); 29 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
35 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); 30 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
36 orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF)); 31 orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF));
37 32
38 /* 33 /*
39 * Mask and clear GPIO IRQ interrupts. 34 * Initialize gpiolib for GPIOs 0-31. (The GPIO interrupt mask
35 * registers for core #1 are at an offset of 0x18 from those of
36 * core #0.)
40 */ 37 */
41 writel(0, GPIO_LEVEL_MASK(0)); 38 orion_gpio_init(0, 32, GPIO_VIRT_BASE,
42 writel(0, GPIO_EDGE_MASK(0)); 39 mv78xx0_core_index() ? 0x18 : 0,
43 writel(0, GPIO_EDGE_CAUSE(0)); 40 IRQ_MV78XX0_GPIO_START);
44
45 for (i = IRQ_MV78XX0_GPIO_START; i < NR_IRQS; i++) {
46 set_irq_chip(i, &orion_gpio_irq_chip);
47 set_irq_handler(i, handle_level_irq);
48 irq_desc[i].status |= IRQ_LEVEL;
49 set_irq_flags(i, IRQF_VALID);
50 }
51 set_irq_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler); 41 set_irq_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler);
52 set_irq_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler); 42 set_irq_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler);
53 set_irq_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler); 43 set_irq_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler);
diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c
index 84db2dfc475c..65b72c454cb0 100644
--- a/arch/arm/mach-mv78xx0/mpp.c
+++ b/arch/arm/mach-mv78xx0/mpp.c
@@ -44,9 +44,6 @@ void __init mv78xx0_mpp_conf(unsigned int *mpp_list)
44 if (!variant_mask) 44 if (!variant_mask)
45 return; 45 return;
46 46
47 /* Initialize gpiolib. */
48 orion_gpio_init();
49
50 printk(KERN_DEBUG "initial MPP regs:"); 47 printk(KERN_DEBUG "initial MPP regs:");
51 for (i = 0; i < MPP_NR_REGS; i++) { 48 for (i = 0; i < MPP_NR_REGS; i++) {
52 mpp_ctrl[i] = readl(MPP_CTRL(i)); 49 mpp_ctrl[i] = readl(MPP_CTRL(i));
diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
index 3511ad4d973b..d927f14c6810 100644
--- a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
+++ b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
@@ -81,6 +81,7 @@ MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board")
81 .boot_params = 0x00000100, 81 .boot_params = 0x00000100,
82 .init_machine = rd78x00_masa_init, 82 .init_machine = rd78x00_masa_init,
83 .map_io = mv78xx0_map_io, 83 .map_io = mv78xx0_map_io,
84 .init_early = mv78xx0_init_early,
84 .init_irq = mv78xx0_init_irq, 85 .init_irq = mv78xx0_init_irq,
85 .timer = &mv78xx0_timer, 86 .timer = &mv78xx0_timer,
86MACHINE_END 87MACHINE_END