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-rw-r--r--arch/arm/mach-msm/platsmp.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 42932865416a..00cdb0a5dac8 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -15,7 +15,6 @@
15#include <linux/jiffies.h> 15#include <linux/jiffies.h>
16#include <linux/smp.h> 16#include <linux/smp.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/irqchip/arm-gic.h>
19 18
20#include <asm/cacheflush.h> 19#include <asm/cacheflush.h>
21#include <asm/cputype.h> 20#include <asm/cputype.h>
@@ -42,13 +41,6 @@ static inline int get_core_count(void)
42static void __cpuinit msm_secondary_init(unsigned int cpu) 41static void __cpuinit msm_secondary_init(unsigned int cpu)
43{ 42{
44 /* 43 /*
45 * if any interrupts are already enabled for the primary
46 * core (e.g. timer irq), then they will not have been enabled
47 * for us: do so
48 */
49 gic_secondary_init(0);
50
51 /*
52 * let the primary processor know we're out of the 44 * let the primary processor know we're out of the
53 * pen, then head off into the C entry point 45 * pen, then head off into the C entry point
54 */ 46 */