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Diffstat (limited to 'arch/arm/mach-msm/irq.c')
-rw-r--r--arch/arm/mach-msm/irq.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
index 04b8d182ff8a..69ca0dd79bdf 100644
--- a/arch/arm/mach-msm/irq.c
+++ b/arch/arm/mach-msm/irq.c
@@ -66,20 +66,20 @@
66 66
67static void msm_irq_ack(unsigned int irq) 67static void msm_irq_ack(unsigned int irq)
68{ 68{
69 unsigned reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0); 69 void __iomem *reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0);
70 irq = 1 << (irq & 31); 70 irq = 1 << (irq & 31);
71 writel(irq, reg); 71 writel(irq, reg);
72} 72}
73 73
74static void msm_irq_mask(unsigned int irq) 74static void msm_irq_mask(unsigned int irq)
75{ 75{
76 unsigned reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0); 76 void __iomem *reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0);
77 writel(1 << (irq & 31), reg); 77 writel(1 << (irq & 31), reg);
78} 78}
79 79
80static void msm_irq_unmask(unsigned int irq) 80static void msm_irq_unmask(unsigned int irq)
81{ 81{
82 unsigned reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0); 82 void __iomem *reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0);
83 writel(1 << (irq & 31), reg); 83 writel(1 << (irq & 31), reg);
84} 84}
85 85
@@ -90,8 +90,8 @@ static int msm_irq_set_wake(unsigned int irq, unsigned int on)
90 90
91static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) 91static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
92{ 92{
93 unsigned treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0); 93 void __iomem *treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0);
94 unsigned preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0); 94 void __iomem *preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0);
95 int b = 1 << (irq & 31); 95 int b = 1 << (irq & 31);
96 96
97 if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW)) 97 if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))