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-rw-r--r--arch/arm/mach-msm/io.c75
1 files changed, 72 insertions, 3 deletions
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 05f96b780aa6..1c05060b5f3b 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -1,8 +1,9 @@
1/* arch/arm/mach-msm/io.c 1/* arch/arm/mach-msm/io.c
2 * 2 *
3 * MSM7K io support 3 * MSM7K, QSD io support
4 * 4 *
5 * Copyright (C) 2007 Google, Inc. 5 * Copyright (C) 2007 Google, Inc.
6 * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
6 * Author: Brian Swetland <swetland@google.com> 7 * Author: Brian Swetland <swetland@google.com>
7 * 8 *
8 * This software is licensed under the terms of the GNU General Public 9 * This software is licensed under the terms of the GNU General Public
@@ -34,6 +35,8 @@
34 .type = MT_DEVICE_NONSHARED, \ 35 .type = MT_DEVICE_NONSHARED, \
35 } 36 }
36 37
38#if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_MSM7X27) \
39 || defined(CONFIG_ARCH_MSM7X25)
37static struct map_desc msm_io_desc[] __initdata = { 40static struct map_desc msm_io_desc[] __initdata = {
38 MSM_DEVICE(VIC), 41 MSM_DEVICE(VIC),
39 MSM_DEVICE(CSR), 42 MSM_DEVICE(CSR),
@@ -45,9 +48,12 @@ static struct map_desc msm_io_desc[] __initdata = {
45#ifdef CONFIG_MSM_DEBUG_UART 48#ifdef CONFIG_MSM_DEBUG_UART
46 MSM_DEVICE(DEBUG_UART), 49 MSM_DEVICE(DEBUG_UART),
47#endif 50#endif
51#ifdef CONFIG_ARCH_MSM7X30
52 MSM_DEVICE(GCC),
53#endif
48 { 54 {
49 .virtual = (unsigned long) MSM_SHARED_RAM_BASE, 55 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
50 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), 56 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
51 .length = MSM_SHARED_RAM_SIZE, 57 .length = MSM_SHARED_RAM_SIZE,
52 .type = MT_DEVICE, 58 .type = MT_DEVICE,
53 }, 59 },
@@ -60,9 +66,72 @@ void __init msm_map_common_io(void)
60 * pages are peripheral interface or not. 66 * pages are peripheral interface or not.
61 */ 67 */
62 asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0)); 68 asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
63
64 iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc)); 69 iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
65} 70}
71#endif
72
73#ifdef CONFIG_ARCH_QSD8X50
74static struct map_desc qsd8x50_io_desc[] __initdata = {
75 MSM_DEVICE(VIC),
76 MSM_DEVICE(CSR),
77 MSM_DEVICE(TMR),
78 MSM_DEVICE(DMOV),
79 MSM_DEVICE(GPIO1),
80 MSM_DEVICE(GPIO2),
81 MSM_DEVICE(CLK_CTL),
82 MSM_DEVICE(SIRC),
83 MSM_DEVICE(SCPLL),
84 MSM_DEVICE(AD5),
85 MSM_DEVICE(MDC),
86#ifdef CONFIG_MSM_DEBUG_UART
87 MSM_DEVICE(DEBUG_UART),
88#endif
89 {
90 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
91 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
92 .length = MSM_SHARED_RAM_SIZE,
93 .type = MT_DEVICE,
94 },
95};
96
97void __init msm_map_qsd8x50_io(void)
98{
99 iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
100}
101#endif /* CONFIG_ARCH_QSD8X50 */
102
103#ifdef CONFIG_ARCH_MSM7X30
104static struct map_desc msm7x30_io_desc[] __initdata = {
105 MSM_DEVICE(VIC),
106 MSM_DEVICE(CSR),
107 MSM_DEVICE(TMR),
108 MSM_DEVICE(DMOV),
109 MSM_DEVICE(GPIO1),
110 MSM_DEVICE(GPIO2),
111 MSM_DEVICE(CLK_CTL),
112 MSM_DEVICE(CLK_CTL_SH2),
113 MSM_DEVICE(AD5),
114 MSM_DEVICE(MDC),
115 MSM_DEVICE(ACC),
116 MSM_DEVICE(SAW),
117 MSM_DEVICE(GCC),
118 MSM_DEVICE(TCSR),
119#ifdef CONFIG_MSM_DEBUG_UART
120 MSM_DEVICE(DEBUG_UART),
121#endif
122 {
123 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
124 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
125 .length = MSM_SHARED_RAM_SIZE,
126 .type = MT_DEVICE,
127 },
128};
129
130void __init msm_map_msm7x30_io(void)
131{
132 iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
133}
134#endif /* CONFIG_ARCH_MSM7X30 */
66 135
67void __iomem * 136void __iomem *
68__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) 137__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)