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-rw-r--r--arch/arm/mach-msm/include/mach/debug-macro.S51
1 files changed, 32 insertions, 19 deletions
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S
index 2dc73ccddb11..3ffd8668c9a5 100644
--- a/arch/arm/mach-msm/include/mach/debug-macro.S
+++ b/arch/arm/mach-msm/include/mach/debug-macro.S
@@ -1,6 +1,7 @@
1/* arch/arm/mach-msm7200/include/mach/debug-macro.S 1/*
2 * 2 *
3 * Copyright (C) 2007 Google, Inc. 3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
4 * Author: Brian Swetland <swetland@google.com> 5 * Author: Brian Swetland <swetland@google.com>
5 * 6 *
6 * This software is licensed under the terms of the GNU General Public 7 * This software is licensed under the terms of the GNU General Public
@@ -14,40 +15,52 @@
14 * 15 *
15 */ 16 */
16 17
17
18
19#include <mach/hardware.h> 18#include <mach/hardware.h>
20#include <mach/msm_iomap.h> 19#include <mach/msm_iomap.h>
21 20
22#if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE)
23 .macro addruart, rp, rv, tmp 21 .macro addruart, rp, rv, tmp
22#ifdef MSM_DEBUG_UART_PHYS
24 ldr \rp, =MSM_DEBUG_UART_PHYS 23 ldr \rp, =MSM_DEBUG_UART_PHYS
25 ldr \rv, =MSM_DEBUG_UART_BASE 24 ldr \rv, =MSM_DEBUG_UART_BASE
25#endif
26 .endm 26 .endm
27 27
28 .macro senduart,rd,rx 28 .macro senduart, rd, rx
29#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
30 @ Write the 1 character to UARTDM_TF
31 str \rd, [\rx, #0x70]
32#else
29 teq \rx, #0 33 teq \rx, #0
30 strne \rd, [\rx, #0x0C] 34 strne \rd, [\rx, #0x0C]
35#endif
31 .endm 36 .endm
32 37
33 .macro waituart,rd,rx 38 .macro waituart, rd, rx
39#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
40 @ check for TX_EMT in UARTDM_SR
41 ldr \rd, [\rx, #0x08]
42 tst \rd, #0x08
43 bne 1002f
44 @ wait for TXREADY in UARTDM_ISR
451001: ldr \rd, [\rx, #0x14]
46 tst \rd, #0x80
47 beq 1001b
481002:
49 @ Clear TX_READY by writing to the UARTDM_CR register
50 mov \rd, #0x300
51 str \rd, [\rx, #0x10]
52 @ Write 0x1 to NCF register
53 mov \rd, #0x1
54 str \rd, [\rx, #0x40]
55 @ UARTDM reg. Read to induce delay
56 ldr \rd, [\rx, #0x08]
57#else
34 @ wait for TX_READY 58 @ wait for TX_READY
351001: ldr \rd, [\rx, #0x08] 591001: ldr \rd, [\rx, #0x08]
36 tst \rd, #0x04 60 tst \rd, #0x04
37 beq 1001b 61 beq 1001b
38 .endm
39#else
40 .macro addruart, rp, rv, tmp
41 mov \rv, #0xff000000
42 orr \rv, \rv, #0x00f00000
43 .endm
44
45 .macro senduart,rd,rx
46 .endm
47
48 .macro waituart,rd,rx
49 .endm
50#endif 62#endif
63 .endm
51 64
52 .macro busyuart,rd,rx 65 .macro busyuart, rd, rx
53 .endm 66 .endm