diff options
Diffstat (limited to 'arch/arm/mach-msm/gpio-v2.c')
-rw-r--r-- | arch/arm/mach-msm/gpio-v2.c | 49 |
1 files changed, 25 insertions, 24 deletions
diff --git a/arch/arm/mach-msm/gpio-v2.c b/arch/arm/mach-msm/gpio-v2.c index 0de19ec74e34..56a964e52ad3 100644 --- a/arch/arm/mach-msm/gpio-v2.c +++ b/arch/arm/mach-msm/gpio-v2.c | |||
@@ -230,18 +230,18 @@ static void msm_gpio_update_dual_edge_pos(unsigned gpio) | |||
230 | val, val2); | 230 | val, val2); |
231 | } | 231 | } |
232 | 232 | ||
233 | static void msm_gpio_irq_ack(unsigned int irq) | 233 | static void msm_gpio_irq_ack(struct irq_data *d) |
234 | { | 234 | { |
235 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); | 235 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); |
236 | 236 | ||
237 | writel(BIT(INTR_STATUS), GPIO_INTR_STATUS(gpio)); | 237 | writel(BIT(INTR_STATUS), GPIO_INTR_STATUS(gpio)); |
238 | if (test_bit(gpio, msm_gpio.dual_edge_irqs)) | 238 | if (test_bit(gpio, msm_gpio.dual_edge_irqs)) |
239 | msm_gpio_update_dual_edge_pos(gpio); | 239 | msm_gpio_update_dual_edge_pos(gpio); |
240 | } | 240 | } |
241 | 241 | ||
242 | static void msm_gpio_irq_mask(unsigned int irq) | 242 | static void msm_gpio_irq_mask(struct irq_data *d) |
243 | { | 243 | { |
244 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); | 244 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); |
245 | unsigned long irq_flags; | 245 | unsigned long irq_flags; |
246 | 246 | ||
247 | spin_lock_irqsave(&tlmm_lock, irq_flags); | 247 | spin_lock_irqsave(&tlmm_lock, irq_flags); |
@@ -251,9 +251,9 @@ static void msm_gpio_irq_mask(unsigned int irq) | |||
251 | spin_unlock_irqrestore(&tlmm_lock, irq_flags); | 251 | spin_unlock_irqrestore(&tlmm_lock, irq_flags); |
252 | } | 252 | } |
253 | 253 | ||
254 | static void msm_gpio_irq_unmask(unsigned int irq) | 254 | static void msm_gpio_irq_unmask(struct irq_data *d) |
255 | { | 255 | { |
256 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); | 256 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); |
257 | unsigned long irq_flags; | 257 | unsigned long irq_flags; |
258 | 258 | ||
259 | spin_lock_irqsave(&tlmm_lock, irq_flags); | 259 | spin_lock_irqsave(&tlmm_lock, irq_flags); |
@@ -263,9 +263,9 @@ static void msm_gpio_irq_unmask(unsigned int irq) | |||
263 | spin_unlock_irqrestore(&tlmm_lock, irq_flags); | 263 | spin_unlock_irqrestore(&tlmm_lock, irq_flags); |
264 | } | 264 | } |
265 | 265 | ||
266 | static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) | 266 | static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) |
267 | { | 267 | { |
268 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); | 268 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); |
269 | unsigned long irq_flags; | 269 | unsigned long irq_flags; |
270 | uint32_t bits; | 270 | uint32_t bits; |
271 | 271 | ||
@@ -275,14 +275,14 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) | |||
275 | 275 | ||
276 | if (flow_type & IRQ_TYPE_EDGE_BOTH) { | 276 | if (flow_type & IRQ_TYPE_EDGE_BOTH) { |
277 | bits |= BIT(INTR_DECT_CTL); | 277 | bits |= BIT(INTR_DECT_CTL); |
278 | irq_desc[irq].handle_irq = handle_edge_irq; | 278 | __irq_set_handler_locked(d->irq, handle_edge_irq); |
279 | if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) | 279 | if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) |
280 | __set_bit(gpio, msm_gpio.dual_edge_irqs); | 280 | __set_bit(gpio, msm_gpio.dual_edge_irqs); |
281 | else | 281 | else |
282 | __clear_bit(gpio, msm_gpio.dual_edge_irqs); | 282 | __clear_bit(gpio, msm_gpio.dual_edge_irqs); |
283 | } else { | 283 | } else { |
284 | bits &= ~BIT(INTR_DECT_CTL); | 284 | bits &= ~BIT(INTR_DECT_CTL); |
285 | irq_desc[irq].handle_irq = handle_level_irq; | 285 | __irq_set_handler_locked(d->irq, handle_level_irq); |
286 | __clear_bit(gpio, msm_gpio.dual_edge_irqs); | 286 | __clear_bit(gpio, msm_gpio.dual_edge_irqs); |
287 | } | 287 | } |
288 | 288 | ||
@@ -309,6 +309,7 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) | |||
309 | */ | 309 | */ |
310 | static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc) | 310 | static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc) |
311 | { | 311 | { |
312 | struct irq_data *data = irq_desc_get_irq_data(desc); | ||
312 | unsigned long i; | 313 | unsigned long i; |
313 | 314 | ||
314 | for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS); | 315 | for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS); |
@@ -318,21 +319,21 @@ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
318 | generic_handle_irq(msm_gpio_to_irq(&msm_gpio.gpio_chip, | 319 | generic_handle_irq(msm_gpio_to_irq(&msm_gpio.gpio_chip, |
319 | i)); | 320 | i)); |
320 | } | 321 | } |
321 | desc->chip->ack(irq); | 322 | data->chip->irq_ack(data); |
322 | } | 323 | } |
323 | 324 | ||
324 | static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on) | 325 | static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) |
325 | { | 326 | { |
326 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); | 327 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); |
327 | 328 | ||
328 | if (on) { | 329 | if (on) { |
329 | if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS)) | 330 | if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS)) |
330 | set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1); | 331 | irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1); |
331 | set_bit(gpio, msm_gpio.wake_irqs); | 332 | set_bit(gpio, msm_gpio.wake_irqs); |
332 | } else { | 333 | } else { |
333 | clear_bit(gpio, msm_gpio.wake_irqs); | 334 | clear_bit(gpio, msm_gpio.wake_irqs); |
334 | if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS)) | 335 | if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS)) |
335 | set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0); | 336 | irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0); |
336 | } | 337 | } |
337 | 338 | ||
338 | return 0; | 339 | return 0; |
@@ -340,11 +341,11 @@ static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on) | |||
340 | 341 | ||
341 | static struct irq_chip msm_gpio_irq_chip = { | 342 | static struct irq_chip msm_gpio_irq_chip = { |
342 | .name = "msmgpio", | 343 | .name = "msmgpio", |
343 | .mask = msm_gpio_irq_mask, | 344 | .irq_mask = msm_gpio_irq_mask, |
344 | .unmask = msm_gpio_irq_unmask, | 345 | .irq_unmask = msm_gpio_irq_unmask, |
345 | .ack = msm_gpio_irq_ack, | 346 | .irq_ack = msm_gpio_irq_ack, |
346 | .set_type = msm_gpio_irq_set_type, | 347 | .irq_set_type = msm_gpio_irq_set_type, |
347 | .set_wake = msm_gpio_irq_set_wake, | 348 | .irq_set_wake = msm_gpio_irq_set_wake, |
348 | }; | 349 | }; |
349 | 350 | ||
350 | static int __devinit msm_gpio_probe(struct platform_device *dev) | 351 | static int __devinit msm_gpio_probe(struct platform_device *dev) |
@@ -361,12 +362,12 @@ static int __devinit msm_gpio_probe(struct platform_device *dev) | |||
361 | 362 | ||
362 | for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) { | 363 | for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) { |
363 | irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i); | 364 | irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i); |
364 | set_irq_chip(irq, &msm_gpio_irq_chip); | 365 | irq_set_chip_and_handler(irq, &msm_gpio_irq_chip, |
365 | set_irq_handler(irq, handle_level_irq); | 366 | handle_level_irq); |
366 | set_irq_flags(irq, IRQF_VALID); | 367 | set_irq_flags(irq, IRQF_VALID); |
367 | } | 368 | } |
368 | 369 | ||
369 | set_irq_chained_handler(TLMM_SCSS_SUMMARY_IRQ, | 370 | irq_set_chained_handler(TLMM_SCSS_SUMMARY_IRQ, |
370 | msm_summary_irq_handler); | 371 | msm_summary_irq_handler); |
371 | return 0; | 372 | return 0; |
372 | } | 373 | } |
@@ -378,7 +379,7 @@ static int __devexit msm_gpio_remove(struct platform_device *dev) | |||
378 | if (ret < 0) | 379 | if (ret < 0) |
379 | return ret; | 380 | return ret; |
380 | 381 | ||
381 | set_irq_handler(TLMM_SCSS_SUMMARY_IRQ, NULL); | 382 | irq_set_handler(TLMM_SCSS_SUMMARY_IRQ, NULL); |
382 | 383 | ||
383 | return 0; | 384 | return 0; |
384 | } | 385 | } |