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-rw-r--r--arch/arm/mach-mmp/aspenite.c13
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-mmp/include/mach/irqs.h10
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-mmp2.h187
-rw-r--r--arch/arm/mach-mmp/include/mach/mmp2.h14
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h21
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apbc.h10
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-smc.h37
-rw-r--r--arch/arm/mach-mmp/include/mach/timex.h4
-rw-r--r--arch/arm/mach-mmp/include/mach/uncompress.h5
-rw-r--r--arch/arm/mach-mmp/jasper.c64
-rw-r--r--arch/arm/mach-mmp/mmp2.c52
-rw-r--r--arch/arm/mach-mmp/pxa168.c15
13 files changed, 398 insertions, 36 deletions
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index a2d307ec0420..244655d323ea 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -59,6 +59,13 @@ static unsigned long common_pin_config[] __initdata = {
59 /* UART1 */ 59 /* UART1 */
60 GPIO107_UART1_RXD, 60 GPIO107_UART1_RXD,
61 GPIO108_UART1_TXD, 61 GPIO108_UART1_TXD,
62
63 /* SSP1 */
64 GPIO113_I2S_MCLK,
65 GPIO114_I2S_FRM,
66 GPIO115_I2S_BCLK,
67 GPIO116_I2S_RXD,
68 GPIO117_I2S_TXD,
62}; 69};
63 70
64static struct smc91x_platdata smc91x_info = { 71static struct smc91x_platdata smc91x_info = {
@@ -123,12 +130,18 @@ static struct pxa3xx_nand_platform_data aspenite_nand_info = {
123 .nr_parts = ARRAY_SIZE(aspenite_nand_partitions), 130 .nr_parts = ARRAY_SIZE(aspenite_nand_partitions),
124}; 131};
125 132
133static struct i2c_board_info aspenite_i2c_info[] __initdata = {
134 { I2C_BOARD_INFO("wm8753", 0x1b), },
135};
136
126static void __init common_init(void) 137static void __init common_init(void)
127{ 138{
128 mfp_config(ARRAY_AND_SIZE(common_pin_config)); 139 mfp_config(ARRAY_AND_SIZE(common_pin_config));
129 140
130 /* on-chip devices */ 141 /* on-chip devices */
131 pxa168_add_uart(1); 142 pxa168_add_uart(1);
143 pxa168_add_twsi(1, NULL, ARRAY_AND_SIZE(aspenite_i2c_info));
144 pxa168_add_ssp(1);
132 pxa168_add_nand(&aspenite_nand_info); 145 pxa168_add_nand(&aspenite_nand_info);
133 146
134 /* off-chip devices */ 147 /* off-chip devices */
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index ab26d13295c4..ee8b02ed8011 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -10,7 +10,7 @@
10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
11#define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x)))) 11#define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
12 12
13#define NR_BUILTIN_GPIO (128) 13#define NR_BUILTIN_GPIO (192)
14 14
15#define gpio_to_bank(gpio) ((gpio) >> 5) 15#define gpio_to_bank(gpio) ((gpio) >> 5)
16#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio)) 16#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio))
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index 02701196ea03..b379cdec4d38 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -5,10 +5,10 @@
5 * Interrupt numbers for PXA168 5 * Interrupt numbers for PXA168
6 */ 6 */
7#define IRQ_PXA168_NONE (-1) 7#define IRQ_PXA168_NONE (-1)
8#define IRQ_PXA168_SSP3 0 8#define IRQ_PXA168_SSP4 0
9#define IRQ_PXA168_SSP2 1 9#define IRQ_PXA168_SSP3 1
10#define IRQ_PXA168_SSP1 2 10#define IRQ_PXA168_SSP2 2
11#define IRQ_PXA168_SSP0 3 11#define IRQ_PXA168_SSP1 3
12#define IRQ_PXA168_PMIC_INT 4 12#define IRQ_PXA168_PMIC_INT 4
13#define IRQ_PXA168_RTC_INT 5 13#define IRQ_PXA168_RTC_INT 5
14#define IRQ_PXA168_RTC_ALARM 6 14#define IRQ_PXA168_RTC_ALARM 6
@@ -20,7 +20,7 @@
20#define IRQ_PXA168_TIMER2 14 20#define IRQ_PXA168_TIMER2 14
21#define IRQ_PXA168_TIMER3 15 21#define IRQ_PXA168_TIMER3 15
22#define IRQ_PXA168_CMU 16 22#define IRQ_PXA168_CMU 16
23#define IRQ_PXA168_SSP4 17 23#define IRQ_PXA168_SSP5 17
24#define IRQ_PXA168_MSP_WAKEUP 19 24#define IRQ_PXA168_MSP_WAKEUP 19
25#define IRQ_PXA168_CF_WAKEUP 20 25#define IRQ_PXA168_CF_WAKEUP 20
26#define IRQ_PXA168_XD_WAKEUP 21 26#define IRQ_PXA168_XD_WAKEUP 21
diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
index 9f9f8143e272..761c2dacc079 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
@@ -9,6 +9,175 @@
9#define MFP_DRIVE_FAST (0x8 << 13) 9#define MFP_DRIVE_FAST (0x8 << 13)
10 10
11/* GPIO */ 11/* GPIO */
12#define GPIO0_GPIO0 MFP_CFG(GPIO0, AF0)
13#define GPIO1_GPIO1 MFP_CFG(GPIO1, AF0)
14#define GPIO2_GPIO2 MFP_CFG(GPIO2, AF0)
15#define GPIO3_GPIO3 MFP_CFG(GPIO3, AF0)
16#define GPIO4_GPIO4 MFP_CFG(GPIO4, AF0)
17#define GPIO5_GPIO5 MFP_CFG(GPIO5, AF0)
18#define GPIO6_GPIO6 MFP_CFG(GPIO6, AF0)
19#define GPIO7_GPIO7 MFP_CFG(GPIO7, AF0)
20#define GPIO8_GPIO8 MFP_CFG(GPIO8, AF0)
21#define GPIO9_GPIO9 MFP_CFG(GPIO9, AF0)
22#define GPIO10_GPIO10 MFP_CFG(GPIO10, AF0)
23#define GPIO11_GPIO11 MFP_CFG(GPIO11, AF0)
24#define GPIO12_GPIO12 MFP_CFG(GPIO12, AF0)
25#define GPIO13_GPIO13 MFP_CFG(GPIO13, AF0)
26#define GPIO14_GPIO14 MFP_CFG(GPIO14, AF0)
27#define GPIO15_GPIO15 MFP_CFG(GPIO15, AF0)
28#define GPIO16_GPIO16 MFP_CFG(GPIO16, AF0)
29#define GPIO17_GPIO17 MFP_CFG(GPIO17, AF0)
30#define GPIO18_GPIO18 MFP_CFG(GPIO18, AF0)
31#define GPIO19_GPIO19 MFP_CFG(GPIO19, AF0)
32#define GPIO20_GPIO20 MFP_CFG(GPIO20, AF0)
33#define GPIO21_GPIO21 MFP_CFG(GPIO21, AF0)
34#define GPIO22_GPIO22 MFP_CFG(GPIO22, AF0)
35#define GPIO23_GPIO23 MFP_CFG(GPIO23, AF0)
36#define GPIO24_GPIO24 MFP_CFG(GPIO24, AF0)
37#define GPIO25_GPIO25 MFP_CFG(GPIO25, AF0)
38#define GPIO26_GPIO26 MFP_CFG(GPIO26, AF0)
39#define GPIO27_GPIO27 MFP_CFG(GPIO27, AF0)
40#define GPIO28_GPIO28 MFP_CFG(GPIO28, AF0)
41#define GPIO29_GPIO29 MFP_CFG(GPIO29, AF0)
42#define GPIO30_GPIO30 MFP_CFG(GPIO30, AF0)
43#define GPIO31_GPIO31 MFP_CFG(GPIO31, AF0)
44#define GPIO32_GPIO32 MFP_CFG(GPIO32, AF0)
45#define GPIO33_GPIO33 MFP_CFG(GPIO33, AF0)
46#define GPIO34_GPIO34 MFP_CFG(GPIO34, AF0)
47#define GPIO35_GPIO35 MFP_CFG(GPIO35, AF0)
48#define GPIO36_GPIO36 MFP_CFG(GPIO36, AF0)
49#define GPIO37_GPIO37 MFP_CFG(GPIO37, AF0)
50#define GPIO38_GPIO38 MFP_CFG(GPIO38, AF0)
51#define GPIO39_GPIO39 MFP_CFG(GPIO39, AF0)
52#define GPIO40_GPIO40 MFP_CFG(GPIO40, AF0)
53#define GPIO41_GPIO41 MFP_CFG(GPIO41, AF0)
54#define GPIO42_GPIO42 MFP_CFG(GPIO42, AF0)
55#define GPIO43_GPIO43 MFP_CFG(GPIO43, AF0)
56#define GPIO44_GPIO44 MFP_CFG(GPIO44, AF0)
57#define GPIO45_GPIO45 MFP_CFG(GPIO45, AF0)
58#define GPIO46_GPIO46 MFP_CFG(GPIO46, AF0)
59#define GPIO47_GPIO47 MFP_CFG(GPIO47, AF0)
60#define GPIO48_GPIO48 MFP_CFG(GPIO48, AF0)
61#define GPIO49_GPIO49 MFP_CFG(GPIO49, AF0)
62#define GPIO50_GPIO50 MFP_CFG(GPIO50, AF0)
63#define GPIO51_GPIO51 MFP_CFG(GPIO51, AF0)
64#define GPIO52_GPIO52 MFP_CFG(GPIO52, AF0)
65#define GPIO53_GPIO53 MFP_CFG(GPIO53, AF0)
66#define GPIO54_GPIO54 MFP_CFG(GPIO54, AF0)
67#define GPIO55_GPIO55 MFP_CFG(GPIO55, AF0)
68#define GPIO56_GPIO56 MFP_CFG(GPIO56, AF0)
69#define GPIO57_GPIO57 MFP_CFG(GPIO57, AF0)
70#define GPIO58_GPIO58 MFP_CFG(GPIO58, AF0)
71#define GPIO59_GPIO59 MFP_CFG(GPIO59, AF0)
72#define GPIO60_GPIO60 MFP_CFG(GPIO60, AF0)
73#define GPIO61_GPIO61 MFP_CFG(GPIO61, AF0)
74#define GPIO62_GPIO62 MFP_CFG(GPIO62, AF0)
75#define GPIO63_GPIO63 MFP_CFG(GPIO63, AF0)
76#define GPIO64_GPIO64 MFP_CFG(GPIO64, AF0)
77#define GPIO65_GPIO65 MFP_CFG(GPIO65, AF0)
78#define GPIO66_GPIO66 MFP_CFG(GPIO66, AF0)
79#define GPIO67_GPIO67 MFP_CFG(GPIO67, AF0)
80#define GPIO68_GPIO68 MFP_CFG(GPIO68, AF0)
81#define GPIO69_GPIO69 MFP_CFG(GPIO69, AF0)
82#define GPIO70_GPIO70 MFP_CFG(GPIO70, AF0)
83#define GPIO71_GPIO71 MFP_CFG(GPIO71, AF0)
84#define GPIO72_GPIO72 MFP_CFG(GPIO72, AF0)
85#define GPIO73_GPIO73 MFP_CFG(GPIO73, AF0)
86#define GPIO74_GPIO74 MFP_CFG(GPIO74, AF0)
87#define GPIO75_GPIO75 MFP_CFG(GPIO75, AF0)
88#define GPIO76_GPIO76 MFP_CFG(GPIO76, AF0)
89#define GPIO77_GPIO77 MFP_CFG(GPIO77, AF0)
90#define GPIO78_GPIO78 MFP_CFG(GPIO78, AF0)
91#define GPIO79_GPIO79 MFP_CFG(GPIO79, AF0)
92#define GPIO80_GPIO80 MFP_CFG(GPIO80, AF0)
93#define GPIO81_GPIO81 MFP_CFG(GPIO81, AF0)
94#define GPIO82_GPIO82 MFP_CFG(GPIO82, AF0)
95#define GPIO83_GPIO83 MFP_CFG(GPIO83, AF0)
96#define GPIO84_GPIO84 MFP_CFG(GPIO84, AF0)
97#define GPIO85_GPIO85 MFP_CFG(GPIO85, AF0)
98#define GPIO86_GPIO86 MFP_CFG(GPIO86, AF0)
99#define GPIO87_GPIO87 MFP_CFG(GPIO87, AF0)
100#define GPIO88_GPIO88 MFP_CFG(GPIO88, AF0)
101#define GPIO89_GPIO89 MFP_CFG(GPIO89, AF0)
102#define GPIO90_GPIO90 MFP_CFG(GPIO90, AF0)
103#define GPIO91_GPIO91 MFP_CFG(GPIO91, AF0)
104#define GPIO92_GPIO92 MFP_CFG(GPIO92, AF0)
105#define GPIO93_GPIO93 MFP_CFG(GPIO93, AF0)
106#define GPIO94_GPIO94 MFP_CFG(GPIO94, AF0)
107#define GPIO95_GPIO95 MFP_CFG(GPIO95, AF0)
108#define GPIO96_GPIO96 MFP_CFG(GPIO96, AF0)
109#define GPIO97_GPIO97 MFP_CFG(GPIO97, AF0)
110#define GPIO98_GPIO98 MFP_CFG(GPIO98, AF0)
111#define GPIO99_GPIO99 MFP_CFG(GPIO99, AF0)
112#define GPIO100_GPIO100 MFP_CFG(GPIO100, AF0)
113#define GPIO101_GPIO101 MFP_CFG(GPIO101, AF0)
114#define GPIO102_GPIO102 MFP_CFG(GPIO102, AF1)
115#define GPIO103_GPIO103 MFP_CFG(GPIO103, AF1)
116#define GPIO104_GPIO104 MFP_CFG(GPIO104, AF1)
117#define GPIO105_GPIO105 MFP_CFG(GPIO105, AF1)
118#define GPIO106_GPIO106 MFP_CFG(GPIO106, AF1)
119#define GPIO107_GPIO107 MFP_CFG(GPIO107, AF1)
120#define GPIO108_GPIO108 MFP_CFG(GPIO108, AF1)
121#define GPIO109_GPIO109 MFP_CFG(GPIO109, AF1)
122#define GPIO110_GPIO110 MFP_CFG(GPIO110, AF1)
123#define GPIO111_GPIO111 MFP_CFG(GPIO111, AF1)
124#define GPIO112_GPIO112 MFP_CFG(GPIO112, AF1)
125#define GPIO113_GPIO113 MFP_CFG(GPIO113, AF1)
126#define GPIO114_GPIO114 MFP_CFG(GPIO114, AF0)
127#define GPIO115_GPIO115 MFP_CFG(GPIO115, AF0)
128#define GPIO116_GPIO116 MFP_CFG(GPIO116, AF0)
129#define GPIO117_GPIO117 MFP_CFG(GPIO117, AF0)
130#define GPIO118_GPIO118 MFP_CFG(GPIO118, AF0)
131#define GPIO119_GPIO119 MFP_CFG(GPIO119, AF0)
132#define GPIO120_GPIO120 MFP_CFG(GPIO120, AF0)
133#define GPIO121_GPIO121 MFP_CFG(GPIO121, AF0)
134#define GPIO122_GPIO122 MFP_CFG(GPIO122, AF0)
135#define GPIO123_GPIO123 MFP_CFG(GPIO123, AF0)
136#define GPIO124_GPIO124 MFP_CFG(GPIO124, AF0)
137#define GPIO125_GPIO125 MFP_CFG(GPIO125, AF0)
138#define GPIO126_GPIO126 MFP_CFG(GPIO126, AF0)
139#define GPIO127_GPIO127 MFP_CFG(GPIO127, AF0)
140#define GPIO128_GPIO128 MFP_CFG(GPIO128, AF0)
141#define GPIO129_GPIO129 MFP_CFG(GPIO129, AF0)
142#define GPIO130_GPIO130 MFP_CFG(GPIO130, AF0)
143#define GPIO131_GPIO131 MFP_CFG(GPIO131, AF0)
144#define GPIO132_GPIO132 MFP_CFG(GPIO132, AF0)
145#define GPIO133_GPIO133 MFP_CFG(GPIO133, AF0)
146#define GPIO134_GPIO134 MFP_CFG(GPIO134, AF0)
147#define GPIO135_GPIO135 MFP_CFG(GPIO135, AF0)
148#define GPIO136_GPIO136 MFP_CFG(GPIO136, AF0)
149#define GPIO137_GPIO137 MFP_CFG(GPIO137, AF0)
150#define GPIO138_GPIO138 MFP_CFG(GPIO138, AF0)
151#define GPIO139_GPIO139 MFP_CFG(GPIO139, AF0)
152#define GPIO140_GPIO140 MFP_CFG(GPIO140, AF0)
153#define GPIO141_GPIO141 MFP_CFG(GPIO141, AF0)
154#define GPIO142_GPIO142 MFP_CFG(GPIO142, AF1)
155#define GPIO143_GPIO143 MFP_CFG(GPIO143, AF1)
156#define GPIO144_GPIO144 MFP_CFG(GPIO144, AF1)
157#define GPIO145_GPIO145 MFP_CFG(GPIO145, AF1)
158#define GPIO146_GPIO146 MFP_CFG(GPIO146, AF1)
159#define GPIO147_GPIO147 MFP_CFG(GPIO147, AF1)
160#define GPIO148_GPIO148 MFP_CFG(GPIO148, AF1)
161#define GPIO149_GPIO149 MFP_CFG(GPIO149, AF1)
162#define GPIO150_GPIO150 MFP_CFG(GPIO150, AF1)
163#define GPIO151_GPIO151 MFP_CFG(GPIO151, AF1)
164#define GPIO152_GPIO152 MFP_CFG(GPIO152, AF1)
165#define GPIO153_GPIO153 MFP_CFG(GPIO153, AF1)
166#define GPIO154_GPIO154 MFP_CFG(GPIO154, AF1)
167#define GPIO155_GPIO155 MFP_CFG(GPIO155, AF1)
168#define GPIO156_GPIO156 MFP_CFG(GPIO156, AF1)
169#define GPIO157_GPIO157 MFP_CFG(GPIO157, AF1)
170#define GPIO158_GPIO158 MFP_CFG(GPIO158, AF1)
171#define GPIO159_GPIO159 MFP_CFG(GPIO159, AF1)
172#define GPIO160_GPIO160 MFP_CFG(GPIO160, AF1)
173#define GPIO161_GPIO161 MFP_CFG(GPIO161, AF1)
174#define GPIO162_GPIO162 MFP_CFG(GPIO162, AF1)
175#define GPIO163_GPIO163 MFP_CFG(GPIO163, AF1)
176#define GPIO164_GPIO164 MFP_CFG(GPIO164, AF1)
177#define GPIO165_GPIO165 MFP_CFG(GPIO165, AF1)
178#define GPIO166_GPIO166 MFP_CFG(GPIO166, AF1)
179#define GPIO167_GPIO167 MFP_CFG(GPIO167, AF1)
180#define GPIO168_GPIO168 MFP_CFG(GPIO168, AF1)
12 181
13/* DFI */ 182/* DFI */
14#define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0) 183#define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0)
@@ -47,7 +216,6 @@
47 216
48/* Ethernet */ 217/* Ethernet */
49#define GPIO155_SM_ADVMUX MFP_CFG(GPIO155, AF2) 218#define GPIO155_SM_ADVMUX MFP_CFG(GPIO155, AF2)
50#define GPIO155_GPIO155 MFP_CFG(GPIO155, AF1)
51 219
52/* UART1 */ 220/* UART1 */
53#define GPIO45_UART1_RXD MFP_CFG(GPIO45, AF1) 221#define GPIO45_UART1_RXD MFP_CFG(GPIO45, AF1)
@@ -159,6 +327,8 @@
159#define GPIO44_TWSI2_SDA MFP_CFG_DRV(GPIO44, AF1, SLOW) 327#define GPIO44_TWSI2_SDA MFP_CFG_DRV(GPIO44, AF1, SLOW)
160#define GPIO71_TWSI3_SCL MFP_CFG_DRV(GPIO71, AF1, SLOW) 328#define GPIO71_TWSI3_SCL MFP_CFG_DRV(GPIO71, AF1, SLOW)
161#define GPIO72_TWSI3_SDA MFP_CFG_DRV(GPIO72, AF1, SLOW) 329#define GPIO72_TWSI3_SDA MFP_CFG_DRV(GPIO72, AF1, SLOW)
330#define TWSI4_SCL MFP_CFG_DRV(TWSI4_SCL, AF0, SLOW)
331#define TWSI4_SDA MFP_CFG_DRV(TWSI4_SDA, AF0, SLOW)
162#define GPIO99_TWSI5_SCL MFP_CFG_DRV(GPIO99, AF4, SLOW) 332#define GPIO99_TWSI5_SCL MFP_CFG_DRV(GPIO99, AF4, SLOW)
163#define GPIO100_TWSI5_SDA MFP_CFG_DRV(GPIO100, AF4, SLOW) 333#define GPIO100_TWSI5_SDA MFP_CFG_DRV(GPIO100, AF4, SLOW)
164#define GPIO97_TWSI6_SCL MFP_CFG_DRV(GPIO97, AF2, SLOW) 334#define GPIO97_TWSI6_SCL MFP_CFG_DRV(GPIO97, AF2, SLOW)
@@ -218,21 +388,6 @@
218#define GPIO69_CAM_MCLK MFP_CFG_DRV(GPIO69, AF1, FAST) 388#define GPIO69_CAM_MCLK MFP_CFG_DRV(GPIO69, AF1, FAST)
219#define GPIO70_CAM_PCLK MFP_CFG_DRV(GPIO70, AF1, FAST) 389#define GPIO70_CAM_PCLK MFP_CFG_DRV(GPIO70, AF1, FAST)
220 390
221/* Wifi */
222#define GPIO45_GPIO45 MFP_CFG(GPIO45, AF0)
223#define GPIO46_GPIO46 MFP_CFG(GPIO46, AF0)
224#define GPIO21_GPIO21 MFP_CFG(GPIO21, AF0)
225#define GPIO22_GPIO22 MFP_CFG(GPIO22, AF0)
226#define GPIO55_GPIO55 MFP_CFG(GPIO55, AF0)
227#define GPIO56_GPIO56 MFP_CFG(GPIO56, AF0)
228#define GPIO57_GPIO57 MFP_CFG(GPIO57, AF0)
229#define GPIO58_GPIO58 MFP_CFG(GPIO58, AF0)
230
231/* Codec*/
232#define GPIO23_GPIO23 MFP_CFG(GPIO23, AF0)
233
234#define GPIO101_GPIO101 MFP_CFG(GPIO101, AF0)
235
236/* PMIC */ 391/* PMIC */
237#define PMIC_PMIC_INT MFP_CFG(PMIC_INT, AF0) 392#define PMIC_PMIC_INT MFP_CFG(PMIC_INT, AF0)
238 393
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index 459f3be9cfb2..fec220bd5046 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -39,17 +39,17 @@ static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data,
39 int ret; 39 int ret;
40 40
41 switch (id) { 41 switch (id) {
42 case 0: d = &mmp2_device_twsi1; break; 42 case 1: d = &mmp2_device_twsi1; break;
43 case 1: d = &mmp2_device_twsi2; break; 43 case 2: d = &mmp2_device_twsi2; break;
44 case 2: d = &mmp2_device_twsi3; break; 44 case 3: d = &mmp2_device_twsi3; break;
45 case 3: d = &mmp2_device_twsi4; break; 45 case 4: d = &mmp2_device_twsi4; break;
46 case 4: d = &mmp2_device_twsi5; break; 46 case 5: d = &mmp2_device_twsi5; break;
47 case 5: d = &mmp2_device_twsi6; break; 47 case 6: d = &mmp2_device_twsi6; break;
48 default: 48 default:
49 return -EINVAL; 49 return -EINVAL;
50 } 50 }
51 51
52 ret = i2c_register_board_info(id, info, size); 52 ret = i2c_register_board_info(id - 1, info, size);
53 if (ret) 53 if (ret)
54 return ret; 54 return ret;
55 55
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 3ad612cbdf09..3b2bd5d5eb05 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -14,6 +14,11 @@ extern struct pxa_device_desc pxa168_device_pwm1;
14extern struct pxa_device_desc pxa168_device_pwm2; 14extern struct pxa_device_desc pxa168_device_pwm2;
15extern struct pxa_device_desc pxa168_device_pwm3; 15extern struct pxa_device_desc pxa168_device_pwm3;
16extern struct pxa_device_desc pxa168_device_pwm4; 16extern struct pxa_device_desc pxa168_device_pwm4;
17extern struct pxa_device_desc pxa168_device_ssp1;
18extern struct pxa_device_desc pxa168_device_ssp2;
19extern struct pxa_device_desc pxa168_device_ssp3;
20extern struct pxa_device_desc pxa168_device_ssp4;
21extern struct pxa_device_desc pxa168_device_ssp5;
17extern struct pxa_device_desc pxa168_device_nand; 22extern struct pxa_device_desc pxa168_device_nand;
18 23
19static inline int pxa168_add_uart(int id) 24static inline int pxa168_add_uart(int id)
@@ -67,6 +72,22 @@ static inline int pxa168_add_pwm(int id)
67 return pxa_register_device(d, NULL, 0); 72 return pxa_register_device(d, NULL, 0);
68} 73}
69 74
75static inline int pxa168_add_ssp(int id)
76{
77 struct pxa_device_desc *d = NULL;
78
79 switch (id) {
80 case 1: d = &pxa168_device_ssp1; break;
81 case 2: d = &pxa168_device_ssp2; break;
82 case 3: d = &pxa168_device_ssp3; break;
83 case 4: d = &pxa168_device_ssp4; break;
84 case 5: d = &pxa168_device_ssp5; break;
85 default:
86 return -EINVAL;
87 }
88 return pxa_register_device(d, NULL, 0);
89}
90
70static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info) 91static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info)
71{ 92{
72 return pxa_register_device(&pxa168_device_nand, info, sizeof(*info)); 93 return pxa_register_device(&pxa168_device_nand, info, sizeof(*info));
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
index 712af03fd1af..1a96585336ba 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apbc.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -26,8 +26,6 @@
26#define APBC_PXA168_PWM2 APBC_REG(0x010) 26#define APBC_PXA168_PWM2 APBC_REG(0x010)
27#define APBC_PXA168_PWM3 APBC_REG(0x014) 27#define APBC_PXA168_PWM3 APBC_REG(0x014)
28#define APBC_PXA168_PWM4 APBC_REG(0x018) 28#define APBC_PXA168_PWM4 APBC_REG(0x018)
29#define APBC_PXA168_SSP1 APBC_REG(0x01c)
30#define APBC_PXA168_SSP2 APBC_REG(0x020)
31#define APBC_PXA168_RTC APBC_REG(0x028) 29#define APBC_PXA168_RTC APBC_REG(0x028)
32#define APBC_PXA168_TWSI0 APBC_REG(0x02c) 30#define APBC_PXA168_TWSI0 APBC_REG(0x02c)
33#define APBC_PXA168_KPC APBC_REG(0x030) 31#define APBC_PXA168_KPC APBC_REG(0x030)
@@ -35,14 +33,16 @@
35#define APBC_PXA168_AIB APBC_REG(0x03c) 33#define APBC_PXA168_AIB APBC_REG(0x03c)
36#define APBC_PXA168_SW_JTAG APBC_REG(0x040) 34#define APBC_PXA168_SW_JTAG APBC_REG(0x040)
37#define APBC_PXA168_ONEWIRE APBC_REG(0x048) 35#define APBC_PXA168_ONEWIRE APBC_REG(0x048)
38#define APBC_PXA168_SSP3 APBC_REG(0x04c)
39#define APBC_PXA168_ASFAR APBC_REG(0x050) 36#define APBC_PXA168_ASFAR APBC_REG(0x050)
40#define APBC_PXA168_ASSAR APBC_REG(0x054) 37#define APBC_PXA168_ASSAR APBC_REG(0x054)
41#define APBC_PXA168_SSP4 APBC_REG(0x058)
42#define APBC_PXA168_SSP5 APBC_REG(0x05c)
43#define APBC_PXA168_TWSI1 APBC_REG(0x06c) 38#define APBC_PXA168_TWSI1 APBC_REG(0x06c)
44#define APBC_PXA168_UART3 APBC_REG(0x070) 39#define APBC_PXA168_UART3 APBC_REG(0x070)
45#define APBC_PXA168_AC97 APBC_REG(0x084) 40#define APBC_PXA168_AC97 APBC_REG(0x084)
41#define APBC_PXA168_SSP1 APBC_REG(0x81c)
42#define APBC_PXA168_SSP2 APBC_REG(0x820)
43#define APBC_PXA168_SSP3 APBC_REG(0x84c)
44#define APBC_PXA168_SSP4 APBC_REG(0x858)
45#define APBC_PXA168_SSP5 APBC_REG(0x85c)
46 46
47/* 47/*
48 * APB Clock register offsets for PXA910 48 * APB Clock register offsets for PXA910
diff --git a/arch/arm/mach-mmp/include/mach/regs-smc.h b/arch/arm/mach-mmp/include/mach/regs-smc.h
new file mode 100644
index 000000000000..e484d40d71bd
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-smc.h
@@ -0,0 +1,37 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/regs-smc.h
3 *
4 * Static Memory Controller Registers
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_REGS_SMC_H
12#define __ASM_MACH_REGS_SMC_H
13
14#include <mach/addr-map.h>
15
16#define SMC_VIRT_BASE (AXI_VIRT_BASE + 0x83800)
17#define SMC_REG(x) (SMC_VIRT_BASE + (x))
18
19#define SMC_MSC0 SMC_REG(0x0020)
20#define SMC_MSC1 SMC_REG(0x0024)
21#define SMC_SXCNFG0 SMC_REG(0x0030)
22#define SMC_SXCNFG1 SMC_REG(0x0034)
23#define SMC_MEMCLKCFG SMC_REG(0x0068)
24#define SMC_CSDFICFG0 SMC_REG(0x0090)
25#define SMC_CSDFICFG1 SMC_REG(0x0094)
26#define SMC_CLK_RET_DEL SMC_REG(0x00b0)
27#define SMC_ADV_RET_DEL SMC_REG(0x00b4)
28#define SMC_CSADRMAP0 SMC_REG(0x00c0)
29#define SMC_CSADRMAP1 SMC_REG(0x00c4)
30#define SMC_WE_AP0 SMC_REG(0x00e0)
31#define SMC_WE_AP1 SMC_REG(0x00e4)
32#define SMC_OE_AP0 SMC_REG(0x00f0)
33#define SMC_OE_AP1 SMC_REG(0x00f4)
34#define SMC_ADV_AP0 SMC_REG(0x0100)
35#define SMC_ADV_AP1 SMC_REG(0x0104)
36
37#endif /* __ASM_MACH_REGS_SMC_H */
diff --git a/arch/arm/mach-mmp/include/mach/timex.h b/arch/arm/mach-mmp/include/mach/timex.h
index 6cebbd0ca8f4..70c9f1d88c02 100644
--- a/arch/arm/mach-mmp/include/mach/timex.h
+++ b/arch/arm/mach-mmp/include/mach/timex.h
@@ -6,4 +6,8 @@
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8 8
9#ifdef CONFIG_CPU_MMP2
10#define CLOCK_TICK_RATE 6500000
11#else
9#define CLOCK_TICK_RATE 3250000 12#define CLOCK_TICK_RATE 3250000
13#endif
diff --git a/arch/arm/mach-mmp/include/mach/uncompress.h b/arch/arm/mach-mmp/include/mach/uncompress.h
index a7dcc5307216..85bd8a2d84b5 100644
--- a/arch/arm/mach-mmp/include/mach/uncompress.h
+++ b/arch/arm/mach-mmp/include/mach/uncompress.h
@@ -14,7 +14,7 @@
14#define UART2_BASE (APB_PHYS_BASE + 0x17000) 14#define UART2_BASE (APB_PHYS_BASE + 0x17000)
15#define UART3_BASE (APB_PHYS_BASE + 0x18000) 15#define UART3_BASE (APB_PHYS_BASE + 0x18000)
16 16
17static volatile unsigned long *UART = (unsigned long *)UART2_BASE; 17static volatile unsigned long *UART;
18 18
19static inline void putc(char c) 19static inline void putc(char c)
20{ 20{
@@ -37,6 +37,9 @@ static inline void flush(void)
37 37
38static inline void arch_decomp_setup(void) 38static inline void arch_decomp_setup(void)
39{ 39{
40 /* default to UART2 */
41 UART = (unsigned long *)UART2_BASE;
42
40 if (machine_is_avengers_lite()) 43 if (machine_is_avengers_lite())
41 UART = (unsigned long *)UART3_BASE; 44 UART = (unsigned long *)UART3_BASE;
42} 45}
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index cfd4d66ef800..d77dd41d60e1 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -15,12 +15,16 @@
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/regulator/machine.h>
19#include <linux/regulator/max8649.h>
20#include <linux/mfd/max8925.h>
18 21
19#include <asm/mach-types.h> 22#include <asm/mach-types.h>
20#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
21#include <mach/addr-map.h> 24#include <mach/addr-map.h>
22#include <mach/mfp-mmp2.h> 25#include <mach/mfp-mmp2.h>
23#include <mach/mmp2.h> 26#include <mach/mmp2.h>
27#include <mach/irqs.h>
24 28
25#include "common.h" 29#include "common.h"
26 30
@@ -58,6 +62,63 @@ static unsigned long jasper_pin_config[] __initdata = {
58 GPIO149_ND_CLE, 62 GPIO149_ND_CLE,
59 GPIO112_ND_RDY0, 63 GPIO112_ND_RDY0,
60 GPIO160_ND_RDY1, 64 GPIO160_ND_RDY1,
65
66 /* PMIC */
67 PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
68};
69
70static struct regulator_consumer_supply max8649_supply[] = {
71 REGULATOR_SUPPLY("vcc_core", NULL),
72};
73
74static struct regulator_init_data max8649_init_data = {
75 .constraints = {
76 .name = "vcc_core range",
77 .min_uV = 1150000,
78 .max_uV = 1280000,
79 .always_on = 1,
80 .boot_on = 1,
81 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
82 },
83 .num_consumer_supplies = 1,
84 .consumer_supplies = &max8649_supply[0],
85};
86
87static struct max8649_platform_data jasper_max8649_info = {
88 .mode = 2, /* VID1 = 1, VID0 = 0 */
89 .extclk = 0,
90 .ramp_timing = MAX8649_RAMP_32MV,
91 .regulator = &max8649_init_data,
92};
93
94static struct max8925_backlight_pdata jasper_backlight_data = {
95 .dual_string = 0,
96};
97
98static struct max8925_power_pdata jasper_power_data = {
99 .batt_detect = 0, /* can't detect battery by ID pin */
100 .topoff_threshold = MAX8925_TOPOFF_THR_10PER,
101 .fast_charge = MAX8925_FCHG_1000MA,
102};
103
104static struct max8925_platform_data jasper_max8925_info = {
105 .backlight = &jasper_backlight_data,
106 .power = &jasper_power_data,
107 .irq_base = IRQ_BOARD_START,
108};
109
110static struct i2c_board_info jasper_twsi1_info[] = {
111 [0] = {
112 .type = "max8649",
113 .addr = 0x60,
114 .platform_data = &jasper_max8649_info,
115 },
116 [1] = {
117 .type = "max8925",
118 .addr = 0x3c,
119 .irq = IRQ_MMP2_PMIC,
120 .platform_data = &jasper_max8925_info,
121 },
61}; 122};
62 123
63static void __init jasper_init(void) 124static void __init jasper_init(void)
@@ -67,6 +128,9 @@ static void __init jasper_init(void)
67 /* on-chip devices */ 128 /* on-chip devices */
68 mmp2_add_uart(1); 129 mmp2_add_uart(1);
69 mmp2_add_uart(3); 130 mmp2_add_uart(3);
131 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info));
132
133 regulator_has_full_constraints();
70} 134}
71 135
72MACHINE_START(MARVELL_JASPER, "Jasper Development Platform") 136MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 72eb9daeea99..7f5eb059bb01 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -15,11 +15,14 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include <asm/hardware/cache-tauros2.h>
19
18#include <mach/addr-map.h> 20#include <mach/addr-map.h>
19#include <mach/regs-apbc.h> 21#include <mach/regs-apbc.h>
20#include <mach/regs-apmu.h> 22#include <mach/regs-apmu.h>
21#include <mach/cputype.h> 23#include <mach/cputype.h>
22#include <mach/irqs.h> 24#include <mach/irqs.h>
25#include <mach/dma.h>
23#include <mach/mfp.h> 26#include <mach/mfp.h>
24#include <mach/gpio.h> 27#include <mach/gpio.h>
25#include <mach/devices.h> 28#include <mach/devices.h>
@@ -32,7 +35,50 @@
32#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c) 35#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c)
33 36
34static struct mfp_addr_map mmp2_addr_map[] __initdata = { 37static struct mfp_addr_map mmp2_addr_map[] __initdata = {
38
39 MFP_ADDR_X(GPIO0, GPIO58, 0x54),
40 MFP_ADDR_X(GPIO59, GPIO73, 0x280),
41 MFP_ADDR_X(GPIO74, GPIO101, 0x170),
42
43 MFP_ADDR(GPIO102, 0x0),
44 MFP_ADDR(GPIO103, 0x4),
45 MFP_ADDR(GPIO104, 0x1fc),
46 MFP_ADDR(GPIO105, 0x1f8),
47 MFP_ADDR(GPIO106, 0x1f4),
48 MFP_ADDR(GPIO107, 0x1f0),
49 MFP_ADDR(GPIO108, 0x21c),
50 MFP_ADDR(GPIO109, 0x218),
51 MFP_ADDR(GPIO110, 0x214),
52 MFP_ADDR(GPIO111, 0x200),
53 MFP_ADDR(GPIO112, 0x244),
54 MFP_ADDR(GPIO113, 0x25c),
55 MFP_ADDR(GPIO114, 0x164),
56 MFP_ADDR_X(GPIO115, GPIO122, 0x260),
57
58 MFP_ADDR(GPIO123, 0x148),
59 MFP_ADDR_X(GPIO124, GPIO141, 0xc),
60
61 MFP_ADDR(GPIO142, 0x8),
62 MFP_ADDR_X(GPIO143, GPIO151, 0x220),
63 MFP_ADDR_X(GPIO152, GPIO153, 0x248),
64 MFP_ADDR_X(GPIO154, GPIO155, 0x254),
65 MFP_ADDR_X(GPIO156, GPIO159, 0x14c),
66
67 MFP_ADDR(GPIO160, 0x250),
68 MFP_ADDR(GPIO161, 0x210),
69 MFP_ADDR(GPIO162, 0x20c),
70 MFP_ADDR(GPIO163, 0x208),
71 MFP_ADDR(GPIO164, 0x204),
72 MFP_ADDR(GPIO165, 0x1ec),
73 MFP_ADDR(GPIO166, 0x1e8),
74 MFP_ADDR(GPIO167, 0x1e4),
75 MFP_ADDR(GPIO168, 0x1e0),
76
77 MFP_ADDR_X(TWSI1_SCL, TWSI1_SDA, 0x140),
78 MFP_ADDR_X(TWSI4_SCL, TWSI4_SDA, 0x2bc),
79
35 MFP_ADDR(PMIC_INT, 0x2c4), 80 MFP_ADDR(PMIC_INT, 0x2c4),
81 MFP_ADDR(CLK_REQ, 0x160),
36 82
37 MFP_ADDR_END, 83 MFP_ADDR_END,
38}; 84};
@@ -99,9 +145,13 @@ static struct clk_lookup mmp2_clkregs[] = {
99static int __init mmp2_init(void) 145static int __init mmp2_init(void)
100{ 146{
101 if (cpu_is_mmp2()) { 147 if (cpu_is_mmp2()) {
148#ifdef CONFIG_CACHE_TAUROS2
149 tauros2_init();
150#endif
102 mfp_init_base(MFPR_VIRT_BASE); 151 mfp_init_base(MFPR_VIRT_BASE);
103 mfp_init_addr(mmp2_addr_map); 152 mfp_init_addr(mmp2_addr_map);
104 clks_register(ARRAY_AND_SIZE(mmp2_clkregs)); 153 pxa_init_dma(IRQ_MMP2_DMA_RIQ, 16);
154 clkdev_add_table(ARRAY_AND_SIZE(mmp2_clkregs));
105 } 155 }
106 156
107 return 0; 157 return 0;
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 1873c821df90..652ae660634c 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -72,6 +72,11 @@ static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000);
72static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000); 72static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000);
73static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000); 73static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000);
74static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000); 74static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000);
75static APBC_CLK(ssp1, PXA168_SSP1, 4, 0);
76static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
77static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
78static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
79static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
75 80
76static APMU_CLK(nand, NAND, 0x01db, 208000000); 81static APMU_CLK(nand, NAND, 0x01db, 208000000);
77 82
@@ -85,6 +90,11 @@ static struct clk_lookup pxa168_clkregs[] = {
85 INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL), 90 INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
86 INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL), 91 INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
87 INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL), 92 INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
93 INIT_CLKREG(&clk_ssp1, "pxa168-ssp.0", NULL),
94 INIT_CLKREG(&clk_ssp2, "pxa168-ssp.1", NULL),
95 INIT_CLKREG(&clk_ssp3, "pxa168-ssp.2", NULL),
96 INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL),
97 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
88 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 98 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
89}; 99};
90 100
@@ -132,3 +142,8 @@ PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
132PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10); 142PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
133PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10); 143PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
134PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); 144PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
145PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
146PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
147PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
148PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
149PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 07:34:01 -0500