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-rw-r--r--arch/arm/mach-mmp/Kconfig7
-rw-r--r--arch/arm/mach-mmp/Makefile1
-rw-r--r--arch/arm/mach-mmp/aspenite.c90
-rw-r--r--arch/arm/mach-mmp/common.c10
-rw-r--r--arch/arm/mach-mmp/flint.c4
-rw-r--r--arch/arm/mach-mmp/include/mach/cputype.h49
-rw-r--r--arch/arm/mach-mmp/include/mach/irqs.h4
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-pxa168.h7
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h20
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apmu.h12
-rw-r--r--arch/arm/mach-mmp/include/mach/teton_bga.h27
-rw-r--r--arch/arm/mach-mmp/jasper.c5
-rw-r--r--arch/arm/mach-mmp/pxa168.c16
-rw-r--r--arch/arm/mach-mmp/teton_bga.c91
-rw-r--r--arch/arm/mach-mmp/ttc_dkb.c4
15 files changed, 326 insertions, 21 deletions
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index 6ab843eaa35b..0711d3b620ad 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -57,6 +57,13 @@ config MACH_MARVELL_JASPER
57 PXA910-based development board. Since MMP2 is compatible to 57 PXA910-based development board. Since MMP2 is compatible to
58 ARMv6 architecture. 58 ARMv6 architecture.
59 59
60config MACH_TETON_BGA
61 bool "Marvell's PXA168 Teton BGA Development Board"
62 select CPU_PXA168
63 help
64 Say 'Y' here if you want to support the Marvell PXA168-based
65 Teton BGA Development Board.
66
60endmenu 67endmenu
61 68
62config CPU_PXA168 69config CPU_PXA168
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 8b66d06739c4..751cdbf733c8 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
17obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o 17obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o
18obj-$(CONFIG_MACH_FLINT) += flint.o 18obj-$(CONFIG_MACH_FLINT) += flint.o
19obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o 19obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
20obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 0629394a5fb9..4681bedbe788 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -16,6 +16,7 @@
16#include <linux/mtd/mtd.h> 16#include <linux/mtd/mtd.h>
17#include <linux/mtd/partitions.h> 17#include <linux/mtd/partitions.h>
18#include <linux/mtd/nand.h> 18#include <linux/mtd/nand.h>
19#include <linux/interrupt.h>
19 20
20#include <asm/mach-types.h> 21#include <asm/mach-types.h>
21#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
@@ -23,6 +24,9 @@
23#include <mach/mfp-pxa168.h> 24#include <mach/mfp-pxa168.h>
24#include <mach/pxa168.h> 25#include <mach/pxa168.h>
25#include <mach/gpio.h> 26#include <mach/gpio.h>
27#include <video/pxa168fb.h>
28#include <linux/input.h>
29#include <plat/pxa27x_keypad.h>
26 30
27#include "common.h" 31#include "common.h"
28 32
@@ -66,6 +70,43 @@ static unsigned long common_pin_config[] __initdata = {
66 GPIO115_I2S_BCLK, 70 GPIO115_I2S_BCLK,
67 GPIO116_I2S_RXD, 71 GPIO116_I2S_RXD,
68 GPIO117_I2S_TXD, 72 GPIO117_I2S_TXD,
73
74 /* LCD */
75 GPIO56_LCD_FCLK_RD,
76 GPIO57_LCD_LCLK_A0,
77 GPIO58_LCD_PCLK_WR,
78 GPIO59_LCD_DENA_BIAS,
79 GPIO60_LCD_DD0,
80 GPIO61_LCD_DD1,
81 GPIO62_LCD_DD2,
82 GPIO63_LCD_DD3,
83 GPIO64_LCD_DD4,
84 GPIO65_LCD_DD5,
85 GPIO66_LCD_DD6,
86 GPIO67_LCD_DD7,
87 GPIO68_LCD_DD8,
88 GPIO69_LCD_DD9,
89 GPIO70_LCD_DD10,
90 GPIO71_LCD_DD11,
91 GPIO72_LCD_DD12,
92 GPIO73_LCD_DD13,
93 GPIO74_LCD_DD14,
94 GPIO75_LCD_DD15,
95 GPIO76_LCD_DD16,
96 GPIO77_LCD_DD17,
97 GPIO78_LCD_DD18,
98 GPIO79_LCD_DD19,
99 GPIO80_LCD_DD20,
100 GPIO81_LCD_DD21,
101 GPIO82_LCD_DD22,
102 GPIO83_LCD_DD23,
103
104 /* Keypad */
105 GPIO109_KP_MKIN1,
106 GPIO110_KP_MKIN0,
107 GPIO111_KP_MKOUT7,
108 GPIO112_KP_MKOUT6,
109 GPIO121_KP_MKIN4,
69}; 110};
70 111
71static struct smc91x_platdata smc91x_info = { 112static struct smc91x_platdata smc91x_info = {
@@ -134,6 +175,51 @@ static struct i2c_board_info aspenite_i2c_info[] __initdata = {
134 { I2C_BOARD_INFO("wm8753", 0x1b), }, 175 { I2C_BOARD_INFO("wm8753", 0x1b), },
135}; 176};
136 177
178static struct fb_videomode video_modes[] = {
179 [0] = {
180 .pixclock = 30120,
181 .refresh = 60,
182 .xres = 800,
183 .yres = 480,
184 .hsync_len = 1,
185 .left_margin = 215,
186 .right_margin = 40,
187 .vsync_len = 1,
188 .upper_margin = 34,
189 .lower_margin = 10,
190 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
191 },
192};
193
194struct pxa168fb_mach_info aspenite_lcd_info = {
195 .id = "Graphic Frame",
196 .modes = video_modes,
197 .num_modes = ARRAY_SIZE(video_modes),
198 .pix_fmt = PIX_FMT_RGB565,
199 .io_pin_allocation_mode = PIN_MODE_DUMB_24,
200 .dumb_mode = DUMB_MODE_RGB888,
201 .active = 1,
202 .panel_rbswap = 0,
203 .invert_pixclock = 0,
204};
205
206static unsigned int aspenite_matrix_key_map[] = {
207 KEY(0, 6, KEY_UP), /* SW 4 */
208 KEY(0, 7, KEY_DOWN), /* SW 5 */
209 KEY(1, 6, KEY_LEFT), /* SW 6 */
210 KEY(1, 7, KEY_RIGHT), /* SW 7 */
211 KEY(4, 6, KEY_ENTER), /* SW 8 */
212 KEY(4, 7, KEY_ESC), /* SW 9 */
213};
214
215static struct pxa27x_keypad_platform_data aspenite_keypad_info __initdata = {
216 .matrix_key_rows = 5,
217 .matrix_key_cols = 8,
218 .matrix_key_map = aspenite_matrix_key_map,
219 .matrix_key_map_size = ARRAY_SIZE(aspenite_matrix_key_map),
220 .debounce_interval = 30,
221};
222
137static void __init common_init(void) 223static void __init common_init(void)
138{ 224{
139 mfp_config(ARRAY_AND_SIZE(common_pin_config)); 225 mfp_config(ARRAY_AND_SIZE(common_pin_config));
@@ -143,6 +229,8 @@ static void __init common_init(void)
143 pxa168_add_twsi(1, NULL, ARRAY_AND_SIZE(aspenite_i2c_info)); 229 pxa168_add_twsi(1, NULL, ARRAY_AND_SIZE(aspenite_i2c_info));
144 pxa168_add_ssp(1); 230 pxa168_add_ssp(1);
145 pxa168_add_nand(&aspenite_nand_info); 231 pxa168_add_nand(&aspenite_nand_info);
232 pxa168_add_fb(&aspenite_lcd_info);
233 pxa168_add_keypad(&aspenite_keypad_info);
146 234
147 /* off-chip devices */ 235 /* off-chip devices */
148 platform_device_register(&smc91x_device); 236 platform_device_register(&smc91x_device);
@@ -152,6 +240,7 @@ MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
152 .phys_io = APB_PHYS_BASE, 240 .phys_io = APB_PHYS_BASE,
153 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, 241 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
154 .map_io = mmp_map_io, 242 .map_io = mmp_map_io,
243 .nr_irqs = IRQ_BOARD_START,
155 .init_irq = pxa168_init_irq, 244 .init_irq = pxa168_init_irq,
156 .timer = &pxa168_timer, 245 .timer = &pxa168_timer,
157 .init_machine = common_init, 246 .init_machine = common_init,
@@ -161,6 +250,7 @@ MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
161 .phys_io = APB_PHYS_BASE, 250 .phys_io = APB_PHYS_BASE,
162 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, 251 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
163 .map_io = mmp_map_io, 252 .map_io = mmp_map_io,
253 .nr_irqs = IRQ_BOARD_START,
164 .init_irq = pxa168_init_irq, 254 .init_irq = pxa168_init_irq,
165 .timer = &pxa168_timer, 255 .timer = &pxa168_timer,
166 .init_machine = common_init, 256 .init_machine = common_init,
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
index 3b29fa7e9b08..0ec0ca80bb3e 100644
--- a/arch/arm/mach-mmp/common.c
+++ b/arch/arm/mach-mmp/common.c
@@ -10,13 +10,20 @@
10 10
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/module.h>
13 14
14#include <asm/page.h> 15#include <asm/page.h>
15#include <asm/mach/map.h> 16#include <asm/mach/map.h>
16#include <mach/addr-map.h> 17#include <mach/addr-map.h>
18#include <mach/cputype.h>
17 19
18#include "common.h" 20#include "common.h"
19 21
22#define MMP_CHIPID (AXI_VIRT_BASE + 0x82c00)
23
24unsigned int mmp_chip_id;
25EXPORT_SYMBOL(mmp_chip_id);
26
20static struct map_desc standard_io_desc[] __initdata = { 27static struct map_desc standard_io_desc[] __initdata = {
21 { 28 {
22 .pfn = __phys_to_pfn(APB_PHYS_BASE), 29 .pfn = __phys_to_pfn(APB_PHYS_BASE),
@@ -34,4 +41,7 @@ static struct map_desc standard_io_desc[] __initdata = {
34void __init mmp_map_io(void) 41void __init mmp_map_io(void)
35{ 42{
36 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); 43 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
44
45 /* this is early, initialize mmp_chip_id here */
46 mmp_chip_id = __raw_readl(MMP_CHIPID);
37} 47}
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index e4312d238eae..c558425c3613 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -16,6 +16,7 @@
16#include <linux/smc91x.h> 16#include <linux/smc91x.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/interrupt.h>
19 20
20#include <asm/mach-types.h> 21#include <asm/mach-types.h>
21#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
@@ -25,6 +26,8 @@
25 26
26#include "common.h" 27#include "common.h"
27 28
29#define FLINT_NR_IRQS (IRQ_BOARD_START + 48)
30
28static unsigned long flint_pin_config[] __initdata = { 31static unsigned long flint_pin_config[] __initdata = {
29 /* UART1 */ 32 /* UART1 */
30 GPIO45_UART1_RXD, 33 GPIO45_UART1_RXD,
@@ -116,6 +119,7 @@ MACHINE_START(FLINT, "Flint Development Platform")
116 .phys_io = APB_PHYS_BASE, 119 .phys_io = APB_PHYS_BASE,
117 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, 120 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
118 .map_io = mmp_map_io, 121 .map_io = mmp_map_io,
122 .nr_irqs = FLINT_NR_IRQS,
119 .init_irq = mmp2_init_irq, 123 .init_irq = mmp2_init_irq,
120 .timer = &mmp2_timer, 124 .timer = &mmp2_timer,
121 .init_machine = flint_init, 125 .init_machine = flint_init,
diff --git a/arch/arm/mach-mmp/include/mach/cputype.h b/arch/arm/mach-mmp/include/mach/cputype.h
index 83b18721d933..f43a68b213f1 100644
--- a/arch/arm/mach-mmp/include/mach/cputype.h
+++ b/arch/arm/mach-mmp/include/mach/cputype.h
@@ -4,36 +4,51 @@
4#include <asm/cputype.h> 4#include <asm/cputype.h>
5 5
6/* 6/*
7 * CPU Stepping OLD_ID CPU_ID CHIP_ID 7 * CPU Stepping CPU_ID CHIP_ID
8 * 8 *
9 * PXA168 A0 0x41159263 0x56158400 0x00A0A333 9 * PXA168 S0 0x56158400 0x0000C910
10 * PXA910 Y0 0x41159262 0x56158000 0x00F0C910 10 * PXA168 A0 0x56158400 0x00A0A168
11 * MMP2 Z0 0x560f5811 11 * PXA910 Y1 0x56158400 0x00F2C920
12 * PXA910 A0 0x56158400 0x00F2C910
13 * PXA910 A1 0x56158400 0x00A0C910
14 * PXA920 Y0 0x56158400 0x00F2C920
15 * PXA920 A0 0x56158400 0x00A0C920
16 * PXA920 A1 0x56158400 0x00A1C920
17 * MMP2 Z0 0x560f5811 0x00F00410
18 * MMP2 Z1 0x560f5811 0x00E00410
19 * MMP2 A0 0x560f5811 0x00A0A610
12 */ 20 */
13 21
22extern unsigned int mmp_chip_id;
23
14#ifdef CONFIG_CPU_PXA168 24#ifdef CONFIG_CPU_PXA168
15# define __cpu_is_pxa168(id) \ 25static inline int cpu_is_pxa168(void)
16 ({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x84; }) 26{
27 return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
28 ((mmp_chip_id & 0xfff) == 0x168);
29}
17#else 30#else
18# define __cpu_is_pxa168(id) (0) 31#define cpu_is_pxa168() (0)
19#endif 32#endif
20 33
34/* cpu_is_pxa910() is shared on both pxa910 and pxa920 */
21#ifdef CONFIG_CPU_PXA910 35#ifdef CONFIG_CPU_PXA910
22# define __cpu_is_pxa910(id) \ 36static inline int cpu_is_pxa910(void)
23 ({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x80; }) 37{
38 return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
39 (((mmp_chip_id & 0xfff) == 0x910) ||
40 ((mmp_chip_id & 0xfff) == 0x920));
41}
24#else 42#else
25# define __cpu_is_pxa910(id) (0) 43#define cpu_is_pxa910() (0)
26#endif 44#endif
27 45
28#ifdef CONFIG_CPU_MMP2 46#ifdef CONFIG_CPU_MMP2
29# define __cpu_is_mmp2(id) \ 47static inline int cpu_is_mmp2(void)
30 ({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x58; }) 48{
49 return (((cpu_readid_id() >> 8) & 0xff) == 0x58);
31#else 50#else
32# define __cpu_is_mmp2(id) (0) 51#define cpu_is_mmp2() (0)
33#endif 52#endif
34 53
35#define cpu_is_pxa168() ({ __cpu_is_pxa168(read_cpuid_id()); })
36#define cpu_is_pxa910() ({ __cpu_is_pxa910(read_cpuid_id()); })
37#define cpu_is_mmp2() ({ __cpu_is_mmp2(read_cpuid_id()); })
38
39#endif /* __ASM_MACH_CPUTYPE_H */ 54#endif /* __ASM_MACH_CPUTYPE_H */
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index b379cdec4d38..a09d328e2ddd 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -222,10 +222,8 @@
222#define IRQ_GPIO_NUM 192 222#define IRQ_GPIO_NUM 192
223#define IRQ_GPIO(x) (IRQ_GPIO_START + (x)) 223#define IRQ_GPIO(x) (IRQ_GPIO_START + (x))
224 224
225/* Board IRQ - 64 by default, increase if not enough */
226#define IRQ_BOARD_START (IRQ_GPIO_START + IRQ_GPIO_NUM) 225#define IRQ_BOARD_START (IRQ_GPIO_START + IRQ_GPIO_NUM)
227#define IRQ_BOARD_END (IRQ_BOARD_START + 64)
228 226
229#define NR_IRQS (IRQ_BOARD_END) 227#define NR_IRQS (IRQ_BOARD_START)
230 228
231#endif /* __ASM_MACH_IRQS_H */ 229#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
index ded43c455ec3..4621067c7720 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
@@ -289,4 +289,11 @@
289#define GPIO86_PWM1_OUT MFP_CFG(GPIO86, AF2) 289#define GPIO86_PWM1_OUT MFP_CFG(GPIO86, AF2)
290#define GPIO86_PWM2_OUT MFP_CFG(GPIO86, AF3) 290#define GPIO86_PWM2_OUT MFP_CFG(GPIO86, AF3)
291 291
292/* Keypad */
293#define GPIO109_KP_MKIN1 MFP_CFG(GPIO109, AF7)
294#define GPIO110_KP_MKIN0 MFP_CFG(GPIO110, AF7)
295#define GPIO111_KP_MKOUT7 MFP_CFG(GPIO111, AF7)
296#define GPIO112_KP_MKOUT6 MFP_CFG(GPIO112, AF7)
297#define GPIO121_KP_MKIN4 MFP_CFG(GPIO121, AF7)
298
292#endif /* __ASM_MACH_MFP_PXA168_H */ 299#endif /* __ASM_MACH_MFP_PXA168_H */
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 27e1bc758623..1801e4206232 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -5,11 +5,15 @@ struct sys_timer;
5 5
6extern struct sys_timer pxa168_timer; 6extern struct sys_timer pxa168_timer;
7extern void __init pxa168_init_irq(void); 7extern void __init pxa168_init_irq(void);
8extern void pxa168_clear_keypad_wakeup(void);
8 9
9#include <linux/i2c.h> 10#include <linux/i2c.h>
10#include <mach/devices.h> 11#include <mach/devices.h>
11#include <plat/i2c.h> 12#include <plat/i2c.h>
12#include <plat/pxa3xx_nand.h> 13#include <plat/pxa3xx_nand.h>
14#include <video/pxa168fb.h>
15#include <plat/pxa27x_keypad.h>
16#include <mach/cputype.h>
13 17
14extern struct pxa_device_desc pxa168_device_uart1; 18extern struct pxa_device_desc pxa168_device_uart1;
15extern struct pxa_device_desc pxa168_device_uart2; 19extern struct pxa_device_desc pxa168_device_uart2;
@@ -25,6 +29,8 @@ extern struct pxa_device_desc pxa168_device_ssp3;
25extern struct pxa_device_desc pxa168_device_ssp4; 29extern struct pxa_device_desc pxa168_device_ssp4;
26extern struct pxa_device_desc pxa168_device_ssp5; 30extern struct pxa_device_desc pxa168_device_ssp5;
27extern struct pxa_device_desc pxa168_device_nand; 31extern struct pxa_device_desc pxa168_device_nand;
32extern struct pxa_device_desc pxa168_device_fb;
33extern struct pxa_device_desc pxa168_device_keypad;
28 34
29static inline int pxa168_add_uart(int id) 35static inline int pxa168_add_uart(int id)
30{ 36{
@@ -97,4 +103,18 @@ static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info)
97{ 103{
98 return pxa_register_device(&pxa168_device_nand, info, sizeof(*info)); 104 return pxa_register_device(&pxa168_device_nand, info, sizeof(*info));
99} 105}
106
107static inline int pxa168_add_fb(struct pxa168fb_mach_info *mi)
108{
109 return pxa_register_device(&pxa168_device_fb, mi, sizeof(*mi));
110}
111
112static inline int pxa168_add_keypad(struct pxa27x_keypad_platform_data *data)
113{
114 if (cpu_is_pxa168())
115 data->clear_wakeup_event = pxa168_clear_keypad_wakeup;
116
117 return pxa_register_device(&pxa168_device_keypad, data, sizeof(*data));
118}
119
100#endif /* __ASM_MACH_PXA168_H */ 120#endif /* __ASM_MACH_PXA168_H */
diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h b/arch/arm/mach-mmp/include/mach/regs-apmu.h
index 919030514120..ac4702357a6e 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apmu.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apmu.h
@@ -33,4 +33,16 @@
33#define APMU_FNRST_DIS (1 << 1) 33#define APMU_FNRST_DIS (1 << 1)
34#define APMU_AXIRST_DIS (1 << 0) 34#define APMU_AXIRST_DIS (1 << 0)
35 35
36/* Wake Clear Register */
37#define APMU_WAKE_CLR APMU_REG(0x07c)
38
39#define APMU_PXA168_KP_WAKE_CLR (1 << 7)
40#define APMU_PXA168_CFI_WAKE_CLR (1 << 6)
41#define APMU_PXA168_XD_WAKE_CLR (1 << 5)
42#define APMU_PXA168_MSP_WAKE_CLR (1 << 4)
43#define APMU_PXA168_SD4_WAKE_CLR (1 << 3)
44#define APMU_PXA168_SD3_WAKE_CLR (1 << 2)
45#define APMU_PXA168_SD2_WAKE_CLR (1 << 1)
46#define APMU_PXA168_SD1_WAKE_CLR (1 << 0)
47
36#endif /* __ASM_MACH_REGS_APMU_H */ 48#endif /* __ASM_MACH_REGS_APMU_H */
diff --git a/arch/arm/mach-mmp/include/mach/teton_bga.h b/arch/arm/mach-mmp/include/mach/teton_bga.h
new file mode 100644
index 000000000000..61a539b2cc98
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/teton_bga.h
@@ -0,0 +1,27 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/teton_bga.h
3 *
4 * Support for the Marvell PXA168 Teton BGA Development Platform.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * publishhed by the Free Software Foundation.
9 */
10#ifndef __ASM_MACH_TETON_BGA_H
11#define __ASM_MACH_TETON_BGA_H
12
13/* GPIOs */
14#define MMC_PWENA_GPIO 27
15#define USBHPENB_GPIO 55
16#define RTC_INT_GPIO 78
17#define LCD_VBLK_EN_GPIO 79
18#define LCD_DVDD_EN_GPIO 80
19#define RST_WIFI_GPIO 81
20#define CF_PWEN_GPIO 82
21#define USB_OC_GPIO 83
22#define PWM_GPIO 84
23#define USBHPENA_GPIO 85
24#define TS_INT_GPIO 86
25#define CIR_GPIO 108
26
27#endif /* __ASM_MACH_TETON_BGA_H */
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index 80c3e7ab1e17..940ee03e3682 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -18,16 +18,18 @@
18#include <linux/regulator/machine.h> 18#include <linux/regulator/machine.h>
19#include <linux/regulator/max8649.h> 19#include <linux/regulator/max8649.h>
20#include <linux/mfd/max8925.h> 20#include <linux/mfd/max8925.h>
21#include <linux/interrupt.h>
21 22
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <mach/addr-map.h> 25#include <mach/addr-map.h>
25#include <mach/mfp-mmp2.h> 26#include <mach/mfp-mmp2.h>
26#include <mach/mmp2.h> 27#include <mach/mmp2.h>
27#include <mach/irqs.h>
28 28
29#include "common.h" 29#include "common.h"
30 30
31#define JASPER_NR_IRQS (IRQ_BOARD_START + 48)
32
31static unsigned long jasper_pin_config[] __initdata = { 33static unsigned long jasper_pin_config[] __initdata = {
32 /* UART1 */ 34 /* UART1 */
33 GPIO29_UART1_RXD, 35 GPIO29_UART1_RXD,
@@ -137,6 +139,7 @@ MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
137 .phys_io = APB_PHYS_BASE, 139 .phys_io = APB_PHYS_BASE,
138 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, 140 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
139 .map_io = mmp_map_io, 141 .map_io = mmp_map_io,
142 .nr_irqs = JASPER_NR_IRQS,
140 .init_irq = mmp2_init_irq, 143 .init_irq = mmp2_init_irq,
141 .timer = &mmp2_timer, 144 .timer = &mmp2_timer,
142 .init_machine = jasper_init, 145 .init_machine = jasper_init,
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 652ae660634c..72b4e7631583 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -77,8 +77,10 @@ static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
77static APBC_CLK(ssp3, PXA168_SSP3, 4, 0); 77static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
78static APBC_CLK(ssp4, PXA168_SSP4, 4, 0); 78static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
79static APBC_CLK(ssp5, PXA168_SSP5, 4, 0); 79static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
80static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
80 81
81static APMU_CLK(nand, NAND, 0x01db, 208000000); 82static APMU_CLK(nand, NAND, 0x01db, 208000000);
83static APMU_CLK(lcd, LCD, 0x7f, 312000000);
82 84
83/* device and clock bindings */ 85/* device and clock bindings */
84static struct clk_lookup pxa168_clkregs[] = { 86static struct clk_lookup pxa168_clkregs[] = {
@@ -96,6 +98,8 @@ static struct clk_lookup pxa168_clkregs[] = {
96 INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL), 98 INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL),
97 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL), 99 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
98 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 100 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
101 INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
102 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
99}; 103};
100 104
101static int __init pxa168_init(void) 105static int __init pxa168_init(void)
@@ -132,6 +136,16 @@ struct sys_timer pxa168_timer = {
132 .init = pxa168_timer_init, 136 .init = pxa168_timer_init,
133}; 137};
134 138
139void pxa168_clear_keypad_wakeup(void)
140{
141 uint32_t val;
142 uint32_t mask = APMU_PXA168_KP_WAKE_CLR;
143
144 /* wake event clear is needed in order to clear keypad interrupt */
145 val = __raw_readl(APMU_WAKE_CLR);
146 __raw_writel(val | mask, APMU_WAKE_CLR);
147}
148
135/* on-chip devices */ 149/* on-chip devices */
136PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22); 150PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
137PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24); 151PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
@@ -147,3 +161,5 @@ PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
147PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57); 161PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
148PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59); 162PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
149PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61); 163PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
164PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
165PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
new file mode 100644
index 000000000000..a4a375c58e0c
--- /dev/null
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -0,0 +1,91 @@
1/*
2 * linux/arch/arm/mach-mmp/teton_bga.c
3 *
4 * Support for the Marvell PXA168 Teton BGA Development Platform.
5 *
6 * Author: Mark F. Brown <mark.brown314@gmail.com>
7 *
8 * This code is based on aspenite.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * publishhed by the Free Software Foundation.
13 */
14
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18#include <linux/gpio.h>
19#include <linux/input.h>
20#include <plat/pxa27x_keypad.h>
21#include <linux/i2c.h>
22
23#include <asm/mach-types.h>
24#include <asm/mach/arch.h>
25#include <mach/addr-map.h>
26#include <mach/mfp-pxa168.h>
27#include <mach/pxa168.h>
28#include <mach/teton_bga.h>
29
30#include "common.h"
31
32static unsigned long teton_bga_pin_config[] __initdata = {
33 /* UART1 */
34 GPIO107_UART1_TXD,
35 GPIO108_UART1_RXD,
36
37 /* Keypad */
38 GPIO109_KP_MKIN1,
39 GPIO110_KP_MKIN0,
40 GPIO111_KP_MKOUT7,
41 GPIO112_KP_MKOUT6,
42
43 /* I2C Bus */
44 GPIO105_CI2C_SDA,
45 GPIO106_CI2C_SCL,
46
47 /* RTC */
48 GPIO78_GPIO,
49};
50
51static unsigned int teton_bga_matrix_key_map[] = {
52 KEY(0, 6, KEY_ESC),
53 KEY(0, 7, KEY_ENTER),
54 KEY(1, 6, KEY_LEFT),
55 KEY(1, 7, KEY_RIGHT),
56};
57
58static struct pxa27x_keypad_platform_data teton_bga_keypad_info __initdata = {
59 .matrix_key_rows = 2,
60 .matrix_key_cols = 8,
61 .matrix_key_map = teton_bga_matrix_key_map,
62 .matrix_key_map_size = ARRAY_SIZE(teton_bga_matrix_key_map),
63 .debounce_interval = 30,
64};
65
66static struct i2c_board_info teton_bga_i2c_info[] __initdata = {
67 {
68 I2C_BOARD_INFO("ds1337", 0x68),
69 .irq = gpio_to_irq(RTC_INT_GPIO)
70 },
71};
72
73static void __init teton_bga_init(void)
74{
75 mfp_config(ARRAY_AND_SIZE(teton_bga_pin_config));
76
77 /* on-chip devices */
78 pxa168_add_uart(1);
79 pxa168_add_keypad(&teton_bga_keypad_info);
80 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info));
81}
82
83MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
84 .phys_io = APB_PHYS_BASE,
85 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
86 .map_io = mmp_map_io,
87 .nr_irqs = IRQ_BOARD_START,
88 .init_irq = pxa168_init_irq,
89 .timer = &pxa168_timer,
90 .init_machine = teton_bga_init,
91MACHINE_END
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index ee65e05f0cf1..54571139dc4b 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -14,6 +14,7 @@
14#include <linux/mtd/mtd.h> 14#include <linux/mtd/mtd.h>
15#include <linux/mtd/partitions.h> 15#include <linux/mtd/partitions.h>
16#include <linux/mtd/onenand.h> 16#include <linux/mtd/onenand.h>
17#include <linux/interrupt.h>
17 18
18#include <asm/mach-types.h> 19#include <asm/mach-types.h>
19#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
@@ -24,6 +25,8 @@
24 25
25#include "common.h" 26#include "common.h"
26 27
28#define TTCDKB_NR_IRQS (IRQ_BOARD_START + 24)
29
27static unsigned long ttc_dkb_pin_config[] __initdata = { 30static unsigned long ttc_dkb_pin_config[] __initdata = {
28 /* UART2 */ 31 /* UART2 */
29 GPIO47_UART2_RXD, 32 GPIO47_UART2_RXD,
@@ -125,6 +128,7 @@ MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")
125 .phys_io = APB_PHYS_BASE, 128 .phys_io = APB_PHYS_BASE,
126 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, 129 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
127 .map_io = mmp_map_io, 130 .map_io = mmp_map_io,
131 .nr_irqs = TTCDKB_NR_IRQS,
128 .init_irq = pxa910_init_irq, 132 .init_irq = pxa910_init_irq,
129 .timer = &pxa910_timer, 133 .timer = &pxa910_timer,
130 .init_machine = ttc_dkb_init, 134 .init_machine = ttc_dkb_init,