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-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apbc.h41
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
index 98ccbee4bd0c..712af03fd1af 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apbc.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -69,6 +69,47 @@
69#define APBC_PXA910_ASFAR APBC_REG(0x050) 69#define APBC_PXA910_ASFAR APBC_REG(0x050)
70#define APBC_PXA910_ASSAR APBC_REG(0x054) 70#define APBC_PXA910_ASSAR APBC_REG(0x054)
71 71
72/*
73 * APB Clock register offsets for MMP2
74 */
75#define APBC_MMP2_RTC APBC_REG(0x000)
76#define APBC_MMP2_TWSI1 APBC_REG(0x004)
77#define APBC_MMP2_TWSI2 APBC_REG(0x008)
78#define APBC_MMP2_TWSI3 APBC_REG(0x00c)
79#define APBC_MMP2_TWSI4 APBC_REG(0x010)
80#define APBC_MMP2_ONEWIRE APBC_REG(0x014)
81#define APBC_MMP2_KPC APBC_REG(0x018)
82#define APBC_MMP2_TB_ROTARY APBC_REG(0x01c)
83#define APBC_MMP2_SW_JTAG APBC_REG(0x020)
84#define APBC_MMP2_TIMERS APBC_REG(0x024)
85#define APBC_MMP2_UART1 APBC_REG(0x02c)
86#define APBC_MMP2_UART2 APBC_REG(0x030)
87#define APBC_MMP2_UART3 APBC_REG(0x034)
88#define APBC_MMP2_GPIO APBC_REG(0x038)
89#define APBC_MMP2_PWM0 APBC_REG(0x03c)
90#define APBC_MMP2_PWM1 APBC_REG(0x040)
91#define APBC_MMP2_PWM2 APBC_REG(0x044)
92#define APBC_MMP2_PWM3 APBC_REG(0x048)
93#define APBC_MMP2_SSP0 APBC_REG(0x04c)
94#define APBC_MMP2_SSP1 APBC_REG(0x050)
95#define APBC_MMP2_SSP2 APBC_REG(0x054)
96#define APBC_MMP2_SSP3 APBC_REG(0x058)
97#define APBC_MMP2_SSP4 APBC_REG(0x05c)
98#define APBC_MMP2_SSP5 APBC_REG(0x060)
99#define APBC_MMP2_AIB APBC_REG(0x064)
100#define APBC_MMP2_ASFAR APBC_REG(0x068)
101#define APBC_MMP2_ASSAR APBC_REG(0x06c)
102#define APBC_MMP2_USIM APBC_REG(0x070)
103#define APBC_MMP2_MPMU APBC_REG(0x074)
104#define APBC_MMP2_IPC APBC_REG(0x078)
105#define APBC_MMP2_TWSI5 APBC_REG(0x07c)
106#define APBC_MMP2_TWSI6 APBC_REG(0x080)
107#define APBC_MMP2_TWSI_INTSTS APBC_REG(0x084)
108#define APBC_MMP2_UART4 APBC_REG(0x088)
109#define APBC_MMP2_RIPC APBC_REG(0x08c)
110#define APBC_MMP2_THSENS1 APBC_REG(0x090) /* Thermal Sensor */
111#define APBC_MMP2_THSENS_INTSTS APBC_REG(0x0a4)
112
72/* Common APB clock register bit definitions */ 113/* Common APB clock register bit definitions */
73#define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */ 114#define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */
74#define APBC_FNCLK (1 << 1) /* Functional Clock Enable */ 115#define APBC_FNCLK (1 << 1) /* Functional Clock Enable */