diff options
Diffstat (limited to 'arch/arm/mach-mmp/include/mach/irqs.h')
-rw-r--r-- | arch/arm/mach-mmp/include/mach/irqs.h | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h index 91ecb3fbca06..e83e45ebf7a4 100644 --- a/arch/arm/mach-mmp/include/mach/irqs.h +++ b/arch/arm/mach-mmp/include/mach/irqs.h | |||
@@ -49,6 +49,67 @@ | |||
49 | #define IRQ_PXA168_PMU 60 | 49 | #define IRQ_PXA168_PMU 60 |
50 | #define IRQ_PXA168_SM_INT 63 | 50 | #define IRQ_PXA168_SM_INT 63 |
51 | 51 | ||
52 | /* | ||
53 | * Interrupt numbers for PXA910 | ||
54 | */ | ||
55 | #define IRQ_PXA910_AIRQ 0 | ||
56 | #define IRQ_PXA910_SSP3 1 | ||
57 | #define IRQ_PXA910_SSP2 2 | ||
58 | #define IRQ_PXA910_SSP1 3 | ||
59 | #define IRQ_PXA910_PMIC_INT 4 | ||
60 | #define IRQ_PXA910_RTC_INT 5 | ||
61 | #define IRQ_PXA910_RTC_ALARM 6 | ||
62 | #define IRQ_PXA910_TWSI0 7 | ||
63 | #define IRQ_PXA910_GPU 8 | ||
64 | #define IRQ_PXA910_KEYPAD 9 | ||
65 | #define IRQ_PXA910_ROTARY 10 | ||
66 | #define IRQ_PXA910_TRACKBALL 11 | ||
67 | #define IRQ_PXA910_ONEWIRE 12 | ||
68 | #define IRQ_PXA910_AP1_TIMER1 13 | ||
69 | #define IRQ_PXA910_AP1_TIMER2 14 | ||
70 | #define IRQ_PXA910_AP1_TIMER3 15 | ||
71 | #define IRQ_PXA910_IPC_AP0 16 | ||
72 | #define IRQ_PXA910_IPC_AP1 17 | ||
73 | #define IRQ_PXA910_IPC_AP2 18 | ||
74 | #define IRQ_PXA910_IPC_AP3 19 | ||
75 | #define IRQ_PXA910_IPC_AP4 20 | ||
76 | #define IRQ_PXA910_IPC_CP0 21 | ||
77 | #define IRQ_PXA910_IPC_CP1 22 | ||
78 | #define IRQ_PXA910_IPC_CP2 23 | ||
79 | #define IRQ_PXA910_IPC_CP3 24 | ||
80 | #define IRQ_PXA910_IPC_CP4 25 | ||
81 | #define IRQ_PXA910_L2_DDR 26 | ||
82 | #define IRQ_PXA910_UART2 27 | ||
83 | #define IRQ_PXA910_UART3 28 | ||
84 | #define IRQ_PXA910_AP2_TIMER1 29 | ||
85 | #define IRQ_PXA910_AP2_TIMER2 30 | ||
86 | #define IRQ_PXA910_CP2_TIMER1 31 | ||
87 | #define IRQ_PXA910_CP2_TIMER2 32 | ||
88 | #define IRQ_PXA910_CP2_TIMER3 33 | ||
89 | #define IRQ_PXA910_GSSP 34 | ||
90 | #define IRQ_PXA910_CP2_WDT 35 | ||
91 | #define IRQ_PXA910_MAIN_PMU 36 | ||
92 | #define IRQ_PXA910_CP_FREQ_CHG 37 | ||
93 | #define IRQ_PXA910_AP_FREQ_CHG 38 | ||
94 | #define IRQ_PXA910_MMC 39 | ||
95 | #define IRQ_PXA910_AEU 40 | ||
96 | #define IRQ_PXA910_LCD 41 | ||
97 | #define IRQ_PXA910_CCIC 42 | ||
98 | #define IRQ_PXA910_IRE 43 | ||
99 | #define IRQ_PXA910_USB1 44 | ||
100 | #define IRQ_PXA910_NAND 45 | ||
101 | #define IRQ_PXA910_HIFI_DMA 46 | ||
102 | #define IRQ_PXA910_DMA_INT0 47 | ||
103 | #define IRQ_PXA910_DMA_INT1 48 | ||
104 | #define IRQ_PXA910_AP_GPIO 49 | ||
105 | #define IRQ_PXA910_AP2_TIMER3 50 | ||
106 | #define IRQ_PXA910_USB2 51 | ||
107 | #define IRQ_PXA910_TWSI1 54 | ||
108 | #define IRQ_PXA910_CP_GPIO 55 | ||
109 | #define IRQ_PXA910_UART1 59 /* Slow UART */ | ||
110 | #define IRQ_PXA910_AP_PMU 60 | ||
111 | #define IRQ_PXA910_SM_INT 63 /* from PinMux */ | ||
112 | |||
52 | #define IRQ_GPIO_START 64 | 113 | #define IRQ_GPIO_START 64 |
53 | #define IRQ_GPIO_NUM 128 | 114 | #define IRQ_GPIO_NUM 128 |
54 | #define IRQ_GPIO(x) (IRQ_GPIO_START + (x)) | 115 | #define IRQ_GPIO(x) (IRQ_GPIO_START + (x)) |