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-rw-r--r--arch/arm/mach-mmp/clock-pxa910.c67
1 files changed, 67 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/clock-pxa910.c b/arch/arm/mach-mmp/clock-pxa910.c
new file mode 100644
index 000000000000..933ea71d0b56
--- /dev/null
+++ b/arch/arm/mach-mmp/clock-pxa910.c
@@ -0,0 +1,67 @@
1#include <linux/module.h>
2#include <linux/kernel.h>
3#include <linux/init.h>
4#include <linux/list.h>
5#include <linux/io.h>
6#include <linux/clk.h>
7
8#include <mach/addr-map.h>
9
10#include "common.h"
11#include "clock.h"
12
13/*
14 * APB Clock register offsets for PXA910
15 */
16#define APBC_UART0 APBC_REG(0x000)
17#define APBC_UART1 APBC_REG(0x004)
18#define APBC_GPIO APBC_REG(0x008)
19#define APBC_PWM1 APBC_REG(0x00c)
20#define APBC_PWM2 APBC_REG(0x010)
21#define APBC_PWM3 APBC_REG(0x014)
22#define APBC_PWM4 APBC_REG(0x018)
23#define APBC_SSP1 APBC_REG(0x01c)
24#define APBC_SSP2 APBC_REG(0x020)
25#define APBC_RTC APBC_REG(0x028)
26#define APBC_TWSI0 APBC_REG(0x02c)
27#define APBC_KPC APBC_REG(0x030)
28#define APBC_SSP3 APBC_REG(0x04c)
29#define APBC_TWSI1 APBC_REG(0x06c)
30
31#define APMU_NAND APMU_REG(0x060)
32#define APMU_USB APMU_REG(0x05c)
33
34static APBC_CLK(uart1, UART0, 1, 14745600);
35static APBC_CLK(uart2, UART1, 1, 14745600);
36static APBC_CLK(twsi0, TWSI0, 1, 33000000);
37static APBC_CLK(twsi1, TWSI1, 1, 33000000);
38static APBC_CLK(pwm1, PWM1, 1, 13000000);
39static APBC_CLK(pwm2, PWM2, 1, 13000000);
40static APBC_CLK(pwm3, PWM3, 1, 13000000);
41static APBC_CLK(pwm4, PWM4, 1, 13000000);
42static APBC_CLK(gpio, GPIO, 0, 13000000);
43static APBC_CLK(rtc, RTC, 8, 32768);
44
45static APMU_CLK(nand, NAND, 0x19b, 156000000);
46static APMU_CLK(u2o, USB, 0x1b, 480000000);
47
48/* device and clock bindings */
49static struct clk_lookup pxa910_clkregs[] = {
50 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
51 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
52 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
53 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
54 INIT_CLKREG(&clk_pwm1, "pxa910-pwm.0", NULL),
55 INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL),
56 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
57 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
58 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
59 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
60 INIT_CLKREG(&clk_u2o, NULL, "U2OCLK"),
61 INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
62};
63
64void __init pxa910_clk_init(void)
65{
66 clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs));
67}