diff options
Diffstat (limited to 'arch/arm/mach-lpc32xx')
-rw-r--r-- | arch/arm/mach-lpc32xx/Makefile.boot | 2 | ||||
-rw-r--r-- | arch/arm/mach-lpc32xx/common.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-lpc32xx/include/mach/hardware.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-lpc32xx/irq.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-lpc32xx/phy3250.c | 42 |
6 files changed, 26 insertions, 37 deletions
diff --git a/arch/arm/mach-lpc32xx/Makefile.boot b/arch/arm/mach-lpc32xx/Makefile.boot index 697323b5f92d..d7392a475247 100644 --- a/arch/arm/mach-lpc32xx/Makefile.boot +++ b/arch/arm/mach-lpc32xx/Makefile.boot | |||
@@ -1,5 +1,3 @@ | |||
1 | zreladdr-y += 0x80008000 | 1 | zreladdr-y += 0x80008000 |
2 | params_phys-y := 0x80000100 | 2 | params_phys-y := 0x80000100 |
3 | initrd_phys-y := 0x82000000 | 3 | initrd_phys-y := 0x82000000 |
4 | |||
5 | dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb | ||
diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c index a48dc2dec485..0d4db8c544b5 100644 --- a/arch/arm/mach-lpc32xx/common.c +++ b/arch/arm/mach-lpc32xx/common.c | |||
@@ -177,25 +177,25 @@ u32 clk_get_pclk_div(void) | |||
177 | 177 | ||
178 | static struct map_desc lpc32xx_io_desc[] __initdata = { | 178 | static struct map_desc lpc32xx_io_desc[] __initdata = { |
179 | { | 179 | { |
180 | .virtual = IO_ADDRESS(LPC32XX_AHB0_START), | 180 | .virtual = (unsigned long)IO_ADDRESS(LPC32XX_AHB0_START), |
181 | .pfn = __phys_to_pfn(LPC32XX_AHB0_START), | 181 | .pfn = __phys_to_pfn(LPC32XX_AHB0_START), |
182 | .length = LPC32XX_AHB0_SIZE, | 182 | .length = LPC32XX_AHB0_SIZE, |
183 | .type = MT_DEVICE | 183 | .type = MT_DEVICE |
184 | }, | 184 | }, |
185 | { | 185 | { |
186 | .virtual = IO_ADDRESS(LPC32XX_AHB1_START), | 186 | .virtual = (unsigned long)IO_ADDRESS(LPC32XX_AHB1_START), |
187 | .pfn = __phys_to_pfn(LPC32XX_AHB1_START), | 187 | .pfn = __phys_to_pfn(LPC32XX_AHB1_START), |
188 | .length = LPC32XX_AHB1_SIZE, | 188 | .length = LPC32XX_AHB1_SIZE, |
189 | .type = MT_DEVICE | 189 | .type = MT_DEVICE |
190 | }, | 190 | }, |
191 | { | 191 | { |
192 | .virtual = IO_ADDRESS(LPC32XX_FABAPB_START), | 192 | .virtual = (unsigned long)IO_ADDRESS(LPC32XX_FABAPB_START), |
193 | .pfn = __phys_to_pfn(LPC32XX_FABAPB_START), | 193 | .pfn = __phys_to_pfn(LPC32XX_FABAPB_START), |
194 | .length = LPC32XX_FABAPB_SIZE, | 194 | .length = LPC32XX_FABAPB_SIZE, |
195 | .type = MT_DEVICE | 195 | .type = MT_DEVICE |
196 | }, | 196 | }, |
197 | { | 197 | { |
198 | .virtual = IO_ADDRESS(LPC32XX_IRAM_BASE), | 198 | .virtual = (unsigned long)IO_ADDRESS(LPC32XX_IRAM_BASE), |
199 | .pfn = __phys_to_pfn(LPC32XX_IRAM_BASE), | 199 | .pfn = __phys_to_pfn(LPC32XX_IRAM_BASE), |
200 | .length = (LPC32XX_IRAM_BANK_SIZE * 2), | 200 | .length = (LPC32XX_IRAM_BANK_SIZE * 2), |
201 | .type = MT_DEVICE | 201 | .type = MT_DEVICE |
diff --git a/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h b/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h index 1816e22a3479..a544e962a818 100644 --- a/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h +++ b/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h | |||
@@ -30,7 +30,7 @@ | |||
30 | #define LPC32XX_GPIO_P1_MAX 24 | 30 | #define LPC32XX_GPIO_P1_MAX 24 |
31 | #define LPC32XX_GPIO_P2_MAX 13 | 31 | #define LPC32XX_GPIO_P2_MAX 13 |
32 | #define LPC32XX_GPIO_P3_MAX 6 | 32 | #define LPC32XX_GPIO_P3_MAX 6 |
33 | #define LPC32XX_GPI_P3_MAX 28 | 33 | #define LPC32XX_GPI_P3_MAX 29 |
34 | #define LPC32XX_GPO_P3_MAX 24 | 34 | #define LPC32XX_GPO_P3_MAX 24 |
35 | 35 | ||
36 | #define LPC32XX_GPIO_P0_GRP 0 | 36 | #define LPC32XX_GPIO_P0_GRP 0 |
diff --git a/arch/arm/mach-lpc32xx/include/mach/hardware.h b/arch/arm/mach-lpc32xx/include/mach/hardware.h index 33e1dde37bd9..69065de97a3d 100644 --- a/arch/arm/mach-lpc32xx/include/mach/hardware.h +++ b/arch/arm/mach-lpc32xx/include/mach/hardware.h | |||
@@ -25,7 +25,7 @@ | |||
25 | /* | 25 | /* |
26 | * This macro relies on fact that for all HW i/o addresses bits 20-23 are 0 | 26 | * This macro relies on fact that for all HW i/o addresses bits 20-23 are 0 |
27 | */ | 27 | */ |
28 | #define IO_ADDRESS(x) (((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) |\ | 28 | #define IO_ADDRESS(x) IOMEM(((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) |\ |
29 | IO_BASE) | 29 | IO_BASE) |
30 | 30 | ||
31 | #define io_p2v(x) ((void __iomem *) (unsigned long) IO_ADDRESS(x)) | 31 | #define io_p2v(x) ((void __iomem *) (unsigned long) IO_ADDRESS(x)) |
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c index 5b1cc35e6fba..3c6332753358 100644 --- a/arch/arm/mach-lpc32xx/irq.c +++ b/arch/arm/mach-lpc32xx/irq.c | |||
@@ -283,21 +283,25 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type) | |||
283 | case IRQ_TYPE_EDGE_RISING: | 283 | case IRQ_TYPE_EDGE_RISING: |
284 | /* Rising edge sensitive */ | 284 | /* Rising edge sensitive */ |
285 | __lpc32xx_set_irq_type(d->hwirq, 1, 1); | 285 | __lpc32xx_set_irq_type(d->hwirq, 1, 1); |
286 | __irq_set_handler_locked(d->hwirq, handle_edge_irq); | ||
286 | break; | 287 | break; |
287 | 288 | ||
288 | case IRQ_TYPE_EDGE_FALLING: | 289 | case IRQ_TYPE_EDGE_FALLING: |
289 | /* Falling edge sensitive */ | 290 | /* Falling edge sensitive */ |
290 | __lpc32xx_set_irq_type(d->hwirq, 0, 1); | 291 | __lpc32xx_set_irq_type(d->hwirq, 0, 1); |
292 | __irq_set_handler_locked(d->hwirq, handle_edge_irq); | ||
291 | break; | 293 | break; |
292 | 294 | ||
293 | case IRQ_TYPE_LEVEL_LOW: | 295 | case IRQ_TYPE_LEVEL_LOW: |
294 | /* Low level sensitive */ | 296 | /* Low level sensitive */ |
295 | __lpc32xx_set_irq_type(d->hwirq, 0, 0); | 297 | __lpc32xx_set_irq_type(d->hwirq, 0, 0); |
298 | __irq_set_handler_locked(d->hwirq, handle_level_irq); | ||
296 | break; | 299 | break; |
297 | 300 | ||
298 | case IRQ_TYPE_LEVEL_HIGH: | 301 | case IRQ_TYPE_LEVEL_HIGH: |
299 | /* High level sensitive */ | 302 | /* High level sensitive */ |
300 | __lpc32xx_set_irq_type(d->hwirq, 1, 0); | 303 | __lpc32xx_set_irq_type(d->hwirq, 1, 0); |
304 | __irq_set_handler_locked(d->hwirq, handle_level_irq); | ||
301 | break; | 305 | break; |
302 | 306 | ||
303 | /* Other modes are not supported */ | 307 | /* Other modes are not supported */ |
@@ -305,9 +309,6 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type) | |||
305 | return -EINVAL; | 309 | return -EINVAL; |
306 | } | 310 | } |
307 | 311 | ||
308 | /* Ok to use the level handler for all types */ | ||
309 | irq_set_handler(d->hwirq, handle_level_irq); | ||
310 | |||
311 | return 0; | 312 | return 0; |
312 | } | 313 | } |
313 | 314 | ||
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index b07dcc90829d..e8ff4c3f0566 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c | |||
@@ -24,12 +24,9 @@ | |||
24 | #include <linux/irq.h> | 24 | #include <linux/irq.h> |
25 | #include <linux/dma-mapping.h> | 25 | #include <linux/dma-mapping.h> |
26 | #include <linux/device.h> | 26 | #include <linux/device.h> |
27 | #include <linux/spi/spi.h> | ||
28 | #include <linux/spi/eeprom.h> | ||
29 | #include <linux/gpio.h> | 27 | #include <linux/gpio.h> |
30 | #include <linux/amba/bus.h> | 28 | #include <linux/amba/bus.h> |
31 | #include <linux/amba/clcd.h> | 29 | #include <linux/amba/clcd.h> |
32 | #include <linux/amba/pl022.h> | ||
33 | #include <linux/amba/pl08x.h> | 30 | #include <linux/amba/pl08x.h> |
34 | #include <linux/amba/mmci.h> | 31 | #include <linux/amba/mmci.h> |
35 | #include <linux/of.h> | 32 | #include <linux/of.h> |
@@ -37,6 +34,8 @@ | |||
37 | #include <linux/of_irq.h> | 34 | #include <linux/of_irq.h> |
38 | #include <linux/of_platform.h> | 35 | #include <linux/of_platform.h> |
39 | #include <linux/clk.h> | 36 | #include <linux/clk.h> |
37 | #include <linux/mtd/lpc32xx_slc.h> | ||
38 | #include <linux/mtd/lpc32xx_mlc.h> | ||
40 | 39 | ||
41 | #include <asm/setup.h> | 40 | #include <asm/setup.h> |
42 | #include <asm/mach-types.h> | 41 | #include <asm/mach-types.h> |
@@ -156,21 +155,6 @@ static struct clcd_board lpc32xx_clcd_data = { | |||
156 | .remove = lpc32xx_clcd_remove, | 155 | .remove = lpc32xx_clcd_remove, |
157 | }; | 156 | }; |
158 | 157 | ||
159 | /* | ||
160 | * AMBA SSP (SPI) | ||
161 | */ | ||
162 | static struct pl022_ssp_controller lpc32xx_ssp0_data = { | ||
163 | .bus_id = 0, | ||
164 | .num_chipselect = 1, | ||
165 | .enable_dma = 0, | ||
166 | }; | ||
167 | |||
168 | static struct pl022_ssp_controller lpc32xx_ssp1_data = { | ||
169 | .bus_id = 1, | ||
170 | .num_chipselect = 1, | ||
171 | .enable_dma = 0, | ||
172 | }; | ||
173 | |||
174 | static struct pl08x_channel_data pl08x_slave_channels[] = { | 158 | static struct pl08x_channel_data pl08x_slave_channels[] = { |
175 | { | 159 | { |
176 | .bus_id = "nand-slc", | 160 | .bus_id = "nand-slc", |
@@ -223,13 +207,25 @@ static struct mmci_platform_data lpc32xx_mmci_data = { | |||
223 | * gather, and the MMCI driver doesn't do it this way */ | 207 | * gather, and the MMCI driver doesn't do it this way */ |
224 | }; | 208 | }; |
225 | 209 | ||
210 | static struct lpc32xx_slc_platform_data lpc32xx_slc_data = { | ||
211 | .dma_filter = pl08x_filter_id, | ||
212 | }; | ||
213 | |||
214 | static struct lpc32xx_mlc_platform_data lpc32xx_mlc_data = { | ||
215 | .dma_filter = pl08x_filter_id, | ||
216 | }; | ||
217 | |||
226 | static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = { | 218 | static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = { |
227 | OF_DEV_AUXDATA("arm,pl022", 0x20084000, "dev:ssp0", &lpc32xx_ssp0_data), | 219 | OF_DEV_AUXDATA("arm,pl022", 0x20084000, "dev:ssp0", NULL), |
228 | OF_DEV_AUXDATA("arm,pl022", 0x2008C000, "dev:ssp1", &lpc32xx_ssp1_data), | 220 | OF_DEV_AUXDATA("arm,pl022", 0x2008C000, "dev:ssp1", NULL), |
229 | OF_DEV_AUXDATA("arm,pl110", 0x31040000, "dev:clcd", &lpc32xx_clcd_data), | 221 | OF_DEV_AUXDATA("arm,pl110", 0x31040000, "dev:clcd", &lpc32xx_clcd_data), |
230 | OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd), | 222 | OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd), |
231 | OF_DEV_AUXDATA("arm,pl18x", 0x20098000, "20098000.sd", | 223 | OF_DEV_AUXDATA("arm,pl18x", 0x20098000, "20098000.sd", |
232 | &lpc32xx_mmci_data), | 224 | &lpc32xx_mmci_data), |
225 | OF_DEV_AUXDATA("nxp,lpc3220-slc", 0x20020000, "20020000.flash", | ||
226 | &lpc32xx_slc_data), | ||
227 | OF_DEV_AUXDATA("nxp,lpc3220-mlc", 0x200a8000, "200a8000.flash", | ||
228 | &lpc32xx_mlc_data), | ||
233 | { } | 229 | { } |
234 | }; | 230 | }; |
235 | 231 | ||
@@ -253,12 +249,6 @@ static void __init lpc3250_machine_init(void) | |||
253 | 249 | ||
254 | of_platform_populate(NULL, of_default_bus_match_table, | 250 | of_platform_populate(NULL, of_default_bus_match_table, |
255 | lpc32xx_auxdata_lookup, NULL); | 251 | lpc32xx_auxdata_lookup, NULL); |
256 | |||
257 | /* Register GPIOs used on this board */ | ||
258 | if (gpio_request(MMC_PWR_ENABLE_GPIO, "mmc_power_en")) | ||
259 | pr_err("Error requesting gpio %u", MMC_PWR_ENABLE_GPIO); | ||
260 | else if (gpio_direction_output(MMC_PWR_ENABLE_GPIO, 1)) | ||
261 | pr_err("Error setting gpio %u to output", MMC_PWR_ENABLE_GPIO); | ||
262 | } | 252 | } |
263 | 253 | ||
264 | static char const *lpc32xx_dt_compat[] __initdata = { | 254 | static char const *lpc32xx_dt_compat[] __initdata = { |