diff options
Diffstat (limited to 'arch/arm/mach-lpc32xx')
-rw-r--r-- | arch/arm/mach-lpc32xx/include/mach/debug-macro.S | 8 | ||||
-rw-r--r-- | arch/arm/mach-lpc32xx/phy3250.c | 9 |
2 files changed, 4 insertions, 13 deletions
diff --git a/arch/arm/mach-lpc32xx/include/mach/debug-macro.S b/arch/arm/mach-lpc32xx/include/mach/debug-macro.S index 621744d6b152..629e744aeb9e 100644 --- a/arch/arm/mach-lpc32xx/include/mach/debug-macro.S +++ b/arch/arm/mach-lpc32xx/include/mach/debug-macro.S | |||
@@ -20,11 +20,9 @@ | |||
20 | * Debug output is hardcoded to standard UART 5 | 20 | * Debug output is hardcoded to standard UART 5 |
21 | */ | 21 | */ |
22 | 22 | ||
23 | .macro addruart,rx, tmp | 23 | .macro addruart, rp, rv |
24 | mrc p15, 0, \rx, c1, c0 | 24 | ldreq \rp, =0x40090000 |
25 | tst \rx, #1 @ MMU enabled? | 25 | ldrne \rv, =0xF4090000 |
26 | ldreq \rx, =0x40090000 | ||
27 | ldrne \rx, =0xF4090000 | ||
28 | .endm | 26 | .endm |
29 | 27 | ||
30 | #define UART_SHIFT 2 | 28 | #define UART_SHIFT 2 |
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index bc9a42da2145..7993b096778e 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c | |||
@@ -172,18 +172,12 @@ static void phy3250_spi_cs_set(u32 control) | |||
172 | } | 172 | } |
173 | 173 | ||
174 | static struct pl022_config_chip spi0_chip_info = { | 174 | static struct pl022_config_chip spi0_chip_info = { |
175 | .lbm = LOOPBACK_DISABLED, | ||
176 | .com_mode = INTERRUPT_TRANSFER, | 175 | .com_mode = INTERRUPT_TRANSFER, |
177 | .iface = SSP_INTERFACE_MOTOROLA_SPI, | 176 | .iface = SSP_INTERFACE_MOTOROLA_SPI, |
178 | .hierarchy = SSP_MASTER, | 177 | .hierarchy = SSP_MASTER, |
179 | .slave_tx_disable = 0, | 178 | .slave_tx_disable = 0, |
180 | .endian_tx = SSP_TX_LSB, | ||
181 | .endian_rx = SSP_RX_LSB, | ||
182 | .data_size = SSP_DATA_BITS_8, | ||
183 | .rx_lev_trig = SSP_RX_4_OR_MORE_ELEM, | 179 | .rx_lev_trig = SSP_RX_4_OR_MORE_ELEM, |
184 | .tx_lev_trig = SSP_TX_4_OR_MORE_EMPTY_LOC, | 180 | .tx_lev_trig = SSP_TX_4_OR_MORE_EMPTY_LOC, |
185 | .clk_phase = SSP_CLK_FIRST_EDGE, | ||
186 | .clk_pol = SSP_CLK_POL_IDLE_LOW, | ||
187 | .ctrl_len = SSP_BITS_8, | 181 | .ctrl_len = SSP_BITS_8, |
188 | .wait_state = SSP_MWIRE_WAIT_ZERO, | 182 | .wait_state = SSP_MWIRE_WAIT_ZERO, |
189 | .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, | 183 | .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, |
@@ -239,6 +233,7 @@ static int __init phy3250_spi_board_register(void) | |||
239 | .max_speed_hz = 5000000, | 233 | .max_speed_hz = 5000000, |
240 | .bus_num = 0, | 234 | .bus_num = 0, |
241 | .chip_select = 0, | 235 | .chip_select = 0, |
236 | .mode = SPI_MODE_0, | ||
242 | .platform_data = &eeprom, | 237 | .platform_data = &eeprom, |
243 | .controller_data = &spi0_chip_info, | 238 | .controller_data = &spi0_chip_info, |
244 | }, | 239 | }, |
@@ -387,8 +382,6 @@ arch_initcall(lpc32xx_display_uid); | |||
387 | 382 | ||
388 | MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller") | 383 | MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller") |
389 | /* Maintainer: Kevin Wells, NXP Semiconductors */ | 384 | /* Maintainer: Kevin Wells, NXP Semiconductors */ |
390 | .phys_io = LPC32XX_UART5_BASE, | ||
391 | .io_pg_offst = ((IO_ADDRESS(LPC32XX_UART5_BASE))>>18) & 0xfffc, | ||
392 | .boot_params = 0x80000100, | 385 | .boot_params = 0x80000100, |
393 | .map_io = lpc32xx_map_io, | 386 | .map_io = lpc32xx_map_io, |
394 | .init_irq = lpc32xx_init_irq, | 387 | .init_irq = lpc32xx_init_irq, |