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Diffstat (limited to 'arch/arm/mach-lh7a40x/irq-lh7a404.c')
-rw-r--r--arch/arm/mach-lh7a40x/irq-lh7a404.c60
1 files changed, 30 insertions, 30 deletions
diff --git a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c
index 12b045b688c6..14b173389573 100644
--- a/arch/arm/mach-lh7a40x/irq-lh7a404.c
+++ b/arch/arm/mach-lh7a40x/irq-lh7a404.c
@@ -43,64 +43,64 @@ static unsigned char irq_pri_vic2[] = {
43 43
44 /* CPU IRQ handling */ 44 /* CPU IRQ handling */
45 45
46static void lh7a404_vic1_mask_irq (u32 irq) 46static void lh7a404_vic1_mask_irq(struct irq_data *d)
47{ 47{
48 VIC1_INTENCLR = (1 << irq); 48 VIC1_INTENCLR = (1 << d->irq);
49} 49}
50 50
51static void lh7a404_vic1_unmask_irq (u32 irq) 51static void lh7a404_vic1_unmask_irq(struct irq_data *d)
52{ 52{
53 VIC1_INTEN = (1 << irq); 53 VIC1_INTEN = (1 << d->irq);
54} 54}
55 55
56static void lh7a404_vic2_mask_irq (u32 irq) 56static void lh7a404_vic2_mask_irq(struct irq_data *d)
57{ 57{
58 VIC2_INTENCLR = (1 << (irq - 32)); 58 VIC2_INTENCLR = (1 << (d->irq - 32));
59} 59}
60 60
61static void lh7a404_vic2_unmask_irq (u32 irq) 61static void lh7a404_vic2_unmask_irq(struct irq_data *d)
62{ 62{
63 VIC2_INTEN = (1 << (irq - 32)); 63 VIC2_INTEN = (1 << (d->irq - 32));
64} 64}
65 65
66static void lh7a404_vic1_ack_gpio_irq (u32 irq) 66static void lh7a404_vic1_ack_gpio_irq(struct irq_data *d)
67{ 67{
68 GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq)); 68 GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq));
69 VIC1_INTENCLR = (1 << irq); 69 VIC1_INTENCLR = (1 << d->irq);
70} 70}
71 71
72static void lh7a404_vic2_ack_gpio_irq (u32 irq) 72static void lh7a404_vic2_ack_gpio_irq(struct irq_data *d)
73{ 73{
74 GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq)); 74 GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq));
75 VIC2_INTENCLR = (1 << irq); 75 VIC2_INTENCLR = (1 << d->irq);
76} 76}
77 77
78static struct irq_chip lh7a404_vic1_chip = { 78static struct irq_chip lh7a404_vic1_chip = {
79 .name = "VIC1", 79 .name = "VIC1",
80 .ack = lh7a404_vic1_mask_irq, /* Because level-triggered */ 80 .irq_ack = lh7a404_vic1_mask_irq, /* Because level-triggered */
81 .mask = lh7a404_vic1_mask_irq, 81 .irq_mask = lh7a404_vic1_mask_irq,
82 .unmask = lh7a404_vic1_unmask_irq, 82 .irq_unmask = lh7a404_vic1_unmask_irq,
83}; 83};
84 84
85static struct irq_chip lh7a404_vic2_chip = { 85static struct irq_chip lh7a404_vic2_chip = {
86 .name = "VIC2", 86 .name = "VIC2",
87 .ack = lh7a404_vic2_mask_irq, /* Because level-triggered */ 87 .irq_ack = lh7a404_vic2_mask_irq, /* Because level-triggered */
88 .mask = lh7a404_vic2_mask_irq, 88 .irq_mask = lh7a404_vic2_mask_irq,
89 .unmask = lh7a404_vic2_unmask_irq, 89 .irq_unmask = lh7a404_vic2_unmask_irq,
90}; 90};
91 91
92static struct irq_chip lh7a404_gpio_vic1_chip = { 92static struct irq_chip lh7a404_gpio_vic1_chip = {
93 .name = "GPIO-VIC1", 93 .name = "GPIO-VIC1",
94 .ack = lh7a404_vic1_ack_gpio_irq, 94 .irq_ack = lh7a404_vic1_ack_gpio_irq,
95 .mask = lh7a404_vic1_mask_irq, 95 .irq_mask = lh7a404_vic1_mask_irq,
96 .unmask = lh7a404_vic1_unmask_irq, 96 .irq_unmask = lh7a404_vic1_unmask_irq,
97}; 97};
98 98
99static struct irq_chip lh7a404_gpio_vic2_chip = { 99static struct irq_chip lh7a404_gpio_vic2_chip = {
100 .name = "GPIO-VIC2", 100 .name = "GPIO-VIC2",
101 .ack = lh7a404_vic2_ack_gpio_irq, 101 .irq_ack = lh7a404_vic2_ack_gpio_irq,
102 .mask = lh7a404_vic2_mask_irq, 102 .irq_mask = lh7a404_vic2_mask_irq,
103 .unmask = lh7a404_vic2_unmask_irq, 103 .irq_unmask = lh7a404_vic2_unmask_irq,
104}; 104};
105 105
106 /* IRQ initialization */ 106 /* IRQ initialization */