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-rw-r--r--arch/arm/mach-ks8695/include/mach/regs-timer.h40
1 files changed, 0 insertions, 40 deletions
diff --git a/arch/arm/mach-ks8695/include/mach/regs-timer.h b/arch/arm/mach-ks8695/include/mach/regs-timer.h
deleted file mode 100644
index e620cda99d2d..000000000000
--- a/arch/arm/mach-ks8695/include/mach/regs-timer.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * arch/arm/mach-ks8695/include/mach/regs-timer.h
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * KS8695 - Timer registers and bit definitions.
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef KS8695_TIMER_H
15#define KS8695_TIMER_H
16
17#define KS8695_TMR_OFFSET (0xF0000 + 0xE400)
18#define KS8695_TMR_VA (KS8695_IO_VA + KS8695_TMR_OFFSET)
19#define KS8695_TMR_PA (KS8695_IO_PA + KS8695_TMR_OFFSET)
20
21
22/*
23 * Timer registers
24 */
25#define KS8695_TMCON (0x00) /* Timer Control Register */
26#define KS8695_T1TC (0x04) /* Timer 1 Timeout Count Register */
27#define KS8695_T0TC (0x08) /* Timer 0 Timeout Count Register */
28#define KS8695_T1PD (0x0C) /* Timer 1 Pulse Count Register */
29#define KS8695_T0PD (0x10) /* Timer 0 Pulse Count Register */
30
31
32/* Timer Control Register */
33#define TMCON_T1EN (1 << 1) /* Timer 1 Enable */
34#define TMCON_T0EN (1 << 0) /* Timer 0 Enable */
35
36/* Timer0 Timeout Counter Register */
37#define T0TC_WATCHDOG (0xff) /* Enable watchdog mode */
38
39
40#endif