16 files changed, 519 insertions, 103 deletions

diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index b5421cccd7e1..25100f7acf4c 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -20,6 +20,12 @@ config MACH_RD88F6281
           Say 'Y' here if you want your kernel to support the
           Marvell RD-88F6281 Reference Board.
 
+config MACH_MV88F6281GTW_GE
+        bool "Marvell 88F6281 GTW GE Board"
+        help
+          Say 'Y' here if you want your kernel to support the
+          Marvell 88F6281 GTW GE Board.
+
 config MACH_SHEEVAPLUG
         bool "Marvell SheevaPlug Reference Board"
         help
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index 8f03c9b9bdd9..9dd680e964d6 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -3,5 +3,8 @@ obj-y				+= common.o addr-map.o irq.o pcie.o mpp.o
 obj-$(CONFIG_MACH_DB88F6281_BP)         += db88f6281-bp-setup.o
 obj-$(CONFIG_MACH_RD88F6192_NAS)        += rd88f6192-nas-setup.o
 obj-$(CONFIG_MACH_RD88F6281)            += rd88f6281-setup.o
+obj-$(CONFIG_MACH_MV88F6281GTW_GE)      += mv88f6281gtw_ge-setup.o
 obj-$(CONFIG_MACH_SHEEVAPLUG)           += sheevaplug-setup.o
 obj-$(CONFIG_MACH_TS219)                += ts219-setup.o
+
+obj-$(CONFIG_CPU_IDLE)                  += cpuidle.o
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c
index 5db4f0bbe5ee..1da5d1c18ecb 100644
--- a/arch/arm/mach-kirkwood/addr-map.c
+++ b/arch/arm/mach-kirkwood/addr-map.c
@@ -20,6 +20,7 @@
  */
 #define TARGET_DDR              0
 #define TARGET_DEV_BUS          1
+#define TARGET_SRAM             3
 #define TARGET_PCIE             4
 #define ATTR_DEV_SPI_ROM        0x1e
 #define ATTR_DEV_BOOT           0x1d
@@ -30,6 +31,7 @@
 #define ATTR_DEV_CS0            0x3e
 #define ATTR_PCIE_IO            0xe0
 #define ATTR_PCIE_MEM           0xe8
+#define ATTR_SRAM               0x01
 
 /*
  * Helpers to get DDR bank info
@@ -48,7 +50,6 @@
 
 
 struct mbus_dram_target_info kirkwood_mbus_dram_info;
-static int __initdata win_alloc_count;
 
 static int __init cpu_win_can_remap(int win)
 {
@@ -112,7 +113,11 @@ void __init kirkwood_setup_cpu_mbus(void)
         setup_cpu_win(2, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE,
                       TARGET_DEV_BUS, ATTR_DEV_NAND, -1);
 
-        win_alloc_count = 3;
+        /*
+         * Setup window for SRAM.
+         */
+        setup_cpu_win(3, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE,
+                      TARGET_SRAM, ATTR_SRAM, -1);
 
         /*
          * Setup MBUS dram target info.
@@ -140,8 +145,3 @@ void __init kirkwood_setup_cpu_mbus(void)
         }
         kirkwood_mbus_dram_info.num_cs = cs;
 }
-
-void __init kirkwood_setup_sram_win(u32 base, u32 size)
-{
-        setup_cpu_win(win_alloc_count++, base, size, 0x03, 0x00, -1);
-}
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index be1ca28fed3f..0f6919838011 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -16,6 +16,7 @@
 #include <linux/mv643xx_eth.h>
 #include <linux/mv643xx_i2c.h>
 #include <linux/ata_platform.h>
+#include <linux/mtd/nand.h>
 #include <linux/spi/orion_spi.h>
 #include <net/dsa.h>
 #include <asm/page.h>
@@ -29,6 +30,7 @@
 #include <plat/mvsdio.h>
 #include <plat/mv_xor.h>
 #include <plat/orion_nand.h>
+#include <plat/orion_wdt.h>
 #include <plat/time.h>
 #include "common.h"
 
@@ -54,6 +56,13 @@ void __init kirkwood_map_io(void)
         iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
 }
 
+/*
+ * Default clock control bits.  Any bit _not_ set in this variable
+ * will be cleared from the hardware after platform devices have been
+ * registered.  Some reserved bits must be set to 1.
+ */
+unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
+        
 
 /*****************************************************************************
  * EHCI
@@ -95,6 +104,7 @@ static struct platform_device kirkwood_ehci = {
 
 void __init kirkwood_ehci_init(void)
 {
+        kirkwood_clk_ctrl |= CGC_USB0;
         platform_device_register(&kirkwood_ehci);
 }
 
@@ -151,6 +161,7 @@ static struct platform_device kirkwood_ge00 = {
 
 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
+        kirkwood_clk_ctrl |= CGC_GE0;
         eth_data->shared = &kirkwood_ge00_shared;
         kirkwood_ge00.dev.platform_data = eth_data;
 
@@ -212,6 +223,7 @@ static struct platform_device kirkwood_ge01 = {
 
 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 {
+        kirkwood_clk_ctrl |= CGC_GE1;
         eth_data->shared = &kirkwood_ge01_shared;
         kirkwood_ge01.dev.platform_data = eth_data;
 
@@ -258,6 +270,43 @@ void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
 
 
 /*****************************************************************************
+ * NAND flash
+ ****************************************************************************/
+static struct resource kirkwood_nand_resource = {
+        .flags          = IORESOURCE_MEM,
+        .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
+        .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
+                                KIRKWOOD_NAND_MEM_SIZE - 1,
+};
+
+static struct orion_nand_data kirkwood_nand_data = {
+        .cle            = 0,
+        .ale            = 1,
+        .width          = 8,
+};
+
+static struct platform_device kirkwood_nand_flash = {
+        .name           = "orion_nand",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &kirkwood_nand_data,
+        },
+        .resource       = &kirkwood_nand_resource,
+        .num_resources  = 1,
+};
+
+void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
+                               int chip_delay)
+{
+        kirkwood_clk_ctrl |= CGC_RUNIT;
+        kirkwood_nand_data.parts = parts;
+        kirkwood_nand_data.nr_parts = nr_parts;
+        kirkwood_nand_data.chip_delay = chip_delay;
+        platform_device_register(&kirkwood_nand_flash);
+}
+
+
+/*****************************************************************************
  * SoC RTC
  ****************************************************************************/
 static struct resource kirkwood_rtc_resource = {
@@ -301,6 +350,9 @@ static struct platform_device kirkwood_sata = {
 
 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
 {
+        kirkwood_clk_ctrl |= CGC_SATA0;
+        if (sata_data->n_ports > 1)
+                kirkwood_clk_ctrl |= CGC_SATA1;
         sata_data->dram = &kirkwood_mbus_dram_info;
         kirkwood_sata.dev.platform_data = sata_data;
         platform_device_register(&kirkwood_sata);
@@ -346,6 +398,7 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
         else
                 mvsdio_data->clock = 200000000;
         mvsdio_data->dram = &kirkwood_mbus_dram_info;
+        kirkwood_clk_ctrl |= CGC_SDIO;
         kirkwood_sdio.dev.platform_data = mvsdio_data;
         platform_device_register(&kirkwood_sdio);
 }
@@ -377,6 +430,7 @@ static struct platform_device kirkwood_spi = {
 
 void __init kirkwood_spi_init()
 {
+        kirkwood_clk_ctrl |= CGC_RUNIT;
         platform_device_register(&kirkwood_spi);
 }
 
@@ -507,6 +561,43 @@ void __init kirkwood_uart1_init(void)
 
 
 /*****************************************************************************
+ * Cryptographic Engines and Security Accelerator (CESA)
+ ****************************************************************************/
+
+static struct resource kirkwood_crypto_res[] = {
+        {
+                .name   = "regs",
+                .start  = CRYPTO_PHYS_BASE,
+                .end    = CRYPTO_PHYS_BASE + 0xffff,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .name   = "sram",
+                .start  = KIRKWOOD_SRAM_PHYS_BASE,
+                .end    = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .name   = "crypto interrupt",
+                .start  = IRQ_KIRKWOOD_CRYPTO,
+                .end    = IRQ_KIRKWOOD_CRYPTO,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device kirkwood_crypto_device = {
+        .name           = "mv_crypto",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(kirkwood_crypto_res),
+        .resource       = kirkwood_crypto_res,
+};
+
+void __init kirkwood_crypto_init(void)
+{
+        kirkwood_clk_ctrl |= CGC_CRYPTO;
+        platform_device_register(&kirkwood_crypto_device);
+}
+
+
+/*****************************************************************************
  * XOR
  ****************************************************************************/
 static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
@@ -597,6 +688,7 @@ static struct platform_device kirkwood_xor01_channel = {
 
 static void __init kirkwood_xor0_init(void)
 {
+        kirkwood_clk_ctrl |= CGC_XOR0;
         platform_device_register(&kirkwood_xor0_shared);
 
         /*
@@ -695,6 +787,7 @@ static struct platform_device kirkwood_xor11_channel = {
 
 static void __init kirkwood_xor1_init(void)
 {
+        kirkwood_clk_ctrl |= CGC_XOR1;
         platform_device_register(&kirkwood_xor1_shared);
 
         /*
@@ -713,6 +806,29 @@ static void __init kirkwood_xor1_init(void)
 
 
 /*****************************************************************************
+ * Watchdog
+ ****************************************************************************/
+static struct orion_wdt_platform_data kirkwood_wdt_data = {
+        .tclk           = 0,
+};
+
+static struct platform_device kirkwood_wdt_device = {
+        .name           = "orion_wdt",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &kirkwood_wdt_data,
+        },
+        .num_resources  = 0,
+};
+
+static void __init kirkwood_wdt_init(void)
+{
+        kirkwood_wdt_data.tclk = kirkwood_tclk;
+        platform_device_register(&kirkwood_wdt_device);
+}
+
+
+/*****************************************************************************
  * Time handling
  ****************************************************************************/
 int kirkwood_tclk;
@@ -804,6 +920,49 @@ void __init kirkwood_init(void)
 
         /* internal devices that every board has */
         kirkwood_rtc_init();
+        kirkwood_wdt_init();
         kirkwood_xor0_init();
         kirkwood_xor1_init();
+        kirkwood_crypto_init();
+}
+
+static int __init kirkwood_clock_gate(void)
+{
+        unsigned int curr = readl(CLOCK_GATING_CTRL);
+
+        printk(KERN_DEBUG "Gating clock of unused units\n");
+        printk(KERN_DEBUG "before: 0x%08x\n", curr);
+
+        /* Make sure those units are accessible */
+        writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0, CLOCK_GATING_CTRL);
+
+        /* For SATA: first shutdown the phy */
+        if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
+                /* Disable PLL and IVREF */
+                writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
+                /* Disable PHY */
+                writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
+        }
+        if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
+                /* Disable PLL and IVREF */
+                writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
+                /* Disable PHY */
+                writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
+        }
+        
+        /* For PCIe: first shutdown the phy */
+        if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
+                writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
+                while (1)
+                        if (readl(PCIE_STATUS) & 0x1)
+                                break;
+                writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
+        }
+
+        /* Now gate clock the required units */
+        writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
+        printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
+
+        return 0;
 }
+late_initcall(kirkwood_clock_gate);
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 6ee88406f381..d7de43464358 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -15,6 +15,7 @@ struct dsa_platform_data;
 struct mv643xx_eth_platform_data;
 struct mv_sata_platform_data;
 struct mvsdio_platform_data;
+struct mtd_partition;
 
 /*
  * Basic Kirkwood init functions used early by machine-setup.
@@ -25,7 +26,6 @@ void kirkwood_init_irq(void);
 
 extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
 void kirkwood_setup_cpu_mbus(void);
-void kirkwood_setup_sram_win(u32 base, u32 size);
 
 void kirkwood_pcie_id(u32 *dev, u32 *rev);
 
@@ -40,9 +40,11 @@ void kirkwood_spi_init(void);
 void kirkwood_i2c_init(void);
 void kirkwood_uart0_init(void);
 void kirkwood_uart1_init(void);
+void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay);
 
 extern int kirkwood_tclk;
 extern struct sys_timer kirkwood_timer;
 
+#define ARRAY_AND_SIZE(x)       (x), ARRAY_SIZE(x)
 
 #endif
diff --git a/arch/arm/mach-kirkwood/cpuidle.c b/arch/arm/mach-kirkwood/cpuidle.c
new file mode 100644
index 000000000000..f68d33f1f396
--- /dev/null
+++ b/arch/arm/mach-kirkwood/cpuidle.c
@@ -0,0 +1,96 @@
+/*
+ * arch/arm/mach-kirkwood/cpuidle.c
+ *
+ * CPU idle Marvell Kirkwood SoCs
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ * The cpu idle uses wait-for-interrupt and DDR self refresh in order
+ * to implement two idle states -
+ * #1 wait-for-interrupt
+ * #2 wait-for-interrupt and DDR self refresh
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/cpuidle.h>
+#include <linux/io.h>
+#include <asm/proc-fns.h>
+#include <mach/kirkwood.h>
+
+#define KIRKWOOD_MAX_STATES     2
+
+static struct cpuidle_driver kirkwood_idle_driver = {
+        .name =         "kirkwood_idle",
+        .owner =        THIS_MODULE,
+};
+
+static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device);
+
+/* Actual code that puts the SoC in different idle states */
+static int kirkwood_enter_idle(struct cpuidle_device *dev,
+                               struct cpuidle_state *state)
+{
+        struct timeval before, after;
+        int idle_time;
+
+        local_irq_disable();
+        do_gettimeofday(&before);
+        if (state == &dev->states[0])
+                /* Wait for interrupt state */
+                cpu_do_idle();
+        else if (state == &dev->states[1]) {
+                /*
+                 * Following write will put DDR in self refresh.
+                 * Note that we have 256 cycles before DDR puts it
+                 * self in self-refresh, so the wait-for-interrupt
+                 * call afterwards won't get the DDR from self refresh
+                 * mode.
+                 */
+                writel(0x7, DDR_OPERATION_BASE);
+                cpu_do_idle();
+        }
+        do_gettimeofday(&after);
+        local_irq_enable();
+        idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
+                        (after.tv_usec - before.tv_usec);
+        return idle_time;
+}
+
+/* Initialize CPU idle by registering the idle states */
+static int kirkwood_init_cpuidle(void)
+{
+        struct cpuidle_device *device;
+
+        cpuidle_register_driver(&kirkwood_idle_driver);
+
+        device = &per_cpu(kirkwood_cpuidle_device, smp_processor_id());
+        device->state_count = KIRKWOOD_MAX_STATES;
+
+        /* Wait for interrupt state */
+        device->states[0].enter = kirkwood_enter_idle;
+        device->states[0].exit_latency = 1;
+        device->states[0].target_residency = 10000;
+        device->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
+        strcpy(device->states[0].name, "WFI");
+        strcpy(device->states[0].desc, "Wait for interrupt");
+
+        /* Wait for interrupt and DDR self refresh state */
+        device->states[1].enter = kirkwood_enter_idle;
+        device->states[1].exit_latency = 10;
+        device->states[1].target_residency = 10000;
+        device->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
+        strcpy(device->states[1].name, "DDR SR");
+        strcpy(device->states[1].desc, "WFI and DDR Self Refresh");
+
+        if (cpuidle_register_device(device)) {
+                printk(KERN_ERR "kirkwood_init_cpuidle: Failed registering\n");
+                return -EIO;
+        }
+        return 0;
+}
+
+device_initcall(kirkwood_init_cpuidle);
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
index 5505d5837752..39bdf4bcace9 100644
--- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -11,14 +11,12 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <mach/kirkwood.h>
-#include <plat/orion_nand.h>
 #include <plat/mvsdio.h>
 #include "common.h"
 #include "mpp.h"
@@ -39,32 +37,6 @@ static struct mtd_partition db88f6281_nand_parts[] = {
         },
 };
 
-static struct resource db88f6281_nand_resource = {
-        .flags          = IORESOURCE_MEM,
-        .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
-        .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
-                          KIRKWOOD_NAND_MEM_SIZE - 1,
-};
-
-static struct orion_nand_data db88f6281_nand_data = {
-        .parts          = db88f6281_nand_parts,
-        .nr_parts       = ARRAY_SIZE(db88f6281_nand_parts),
-        .cle            = 0,
-        .ale            = 1,
-        .width          = 8,
-        .chip_delay     = 25,
-};
-
-static struct platform_device db88f6281_nand_flash = {
-        .name           = "orion_nand",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &db88f6281_nand_data,
-        },
-        .resource       = &db88f6281_nand_resource,
-        .num_resources  = 1,
-};
-
 static struct mv643xx_eth_platform_data db88f6281_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
 };
@@ -92,13 +64,12 @@ static void __init db88f6281_init(void)
         kirkwood_init();
         kirkwood_mpp_conf(db88f6281_mpp_config);
 
+        kirkwood_nand_init(ARRAY_AND_SIZE(db88f6281_nand_parts), 25);
         kirkwood_ehci_init();
         kirkwood_ge00_init(&db88f6281_ge00_data);
         kirkwood_sata_init(&db88f6281_sata_data);
         kirkwood_uart0_init();
         kirkwood_sdio_init(&db88f6281_mvsdio_data);
-        
-        platform_device_register(&db88f6281_nand_flash);
 }
 
 static int __init db88f6281_pci_init(void)
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index 4f7029f521cc..9e80d9232c83 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -17,12 +17,15 @@
 #define CPU_RESET               0x00000002
 
 #define RSTOUTn_MASK            (BRIDGE_VIRT_BASE | 0x0108)
+#define WDT_RESET_OUT_EN        0x00000002
 #define SOFT_RESET_OUT_EN       0x00000004
 
 #define SYSTEM_SOFT_RESET       (BRIDGE_VIRT_BASE | 0x010c)
 #define SOFT_RESET              0x00000001
 
 #define BRIDGE_CAUSE            (BRIDGE_VIRT_BASE | 0x0110)
+#define WDT_INT_REQ             0x0008
+
 #define BRIDGE_MASK             (BRIDGE_VIRT_BASE | 0x0114)
 #define BRIDGE_INT_TIMER0       0x0002
 #define BRIDGE_INT_TIMER1       0x0004
@@ -39,4 +42,22 @@
 #define L2_CONFIG_REG           (BRIDGE_VIRT_BASE | 0x0128)
 #define L2_WRITETHROUGH         0x00000010
 
+#define CLOCK_GATING_CTRL       (BRIDGE_VIRT_BASE | 0x11c)
+#define CGC_GE0                 (1 << 0)
+#define CGC_PEX0                (1 << 2)
+#define CGC_USB0                (1 << 3)
+#define CGC_SDIO                (1 << 4)
+#define CGC_TSU                 (1 << 5)
+#define CGC_DUNIT               (1 << 6)
+#define CGC_RUNIT               (1 << 7)
+#define CGC_XOR0                (1 << 8)
+#define CGC_AUDIO               (1 << 9)
+#define CGC_SATA0               (1 << 14)
+#define CGC_SATA1               (1 << 15)
+#define CGC_XOR1                (1 << 16)
+#define CGC_CRYPTO              (1 << 17)
+#define CGC_GE1                 (1 << 19)
+#define CGC_TDM                 (1 << 20)
+#define CGC_RESERVED            ((1 << 18) | (0x6 << 21))
+
 #endif
diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h
index be07be0ef522..a643a846d5fb 100644
--- a/arch/arm/mach-kirkwood/include/mach/io.h
+++ b/arch/arm/mach-kirkwood/include/mach/io.h
@@ -19,6 +19,31 @@ static inline void __iomem *__io(unsigned long addr)
                                         + KIRKWOOD_PCIE_IO_VIRT_BASE);
 }
 
+static inline void __iomem *
+__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype)
+{
+        void __iomem *retval;
+        unsigned long offs = paddr - KIRKWOOD_REGS_PHYS_BASE;
+        if (mtype == MT_DEVICE && size && offs < KIRKWOOD_REGS_SIZE &&
+            size <= KIRKWOOD_REGS_SIZE && offs + size <= KIRKWOOD_REGS_SIZE) {
+                retval = (void __iomem *)KIRKWOOD_REGS_VIRT_BASE + offs;
+        } else {
+                retval = __arm_ioremap(paddr, size, mtype);
+        }
+
+        return retval;
+}
+
+static inline void
+__arch_iounmap(void __iomem *addr)
+{
+        if (addr < (void __iomem *)KIRKWOOD_REGS_VIRT_BASE ||
+            addr >= (void __iomem *)(KIRKWOOD_REGS_VIRT_BASE + KIRKWOOD_REGS_SIZE))
+                __iounmap(addr);
+}
+
+#define __arch_ioremap(p, s, m) __arch_ioremap(p, s, m)
+#define __arch_iounmap(a)       __arch_iounmap(a)
 #define __io(a)                 __io(a)
 #define __mem_pci(a)            (a)
 
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index b3e13958821d..07af858814a0 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -20,16 +20,18 @@
  * f1000000     on-chip peripheral registers
  * f2000000     PCIe I/O space
  * f3000000     NAND controller address window
+ * f4000000     Security Accelerator SRAM
  *
  * virt         phys            size
  * fee00000     f1000000        1M      on-chip peripheral registers
  * fef00000     f2000000        1M      PCIe I/O space
  */
 
+#define KIRKWOOD_SRAM_PHYS_BASE         0xf4000000
+#define KIRKWOOD_SRAM_SIZE              SZ_2K
+
 #define KIRKWOOD_NAND_MEM_PHYS_BASE     0xf3000000
-#define KIRKWOOD_NAND_MEM_SIZE          SZ_64K /* 1K is sufficient, but 64K
-                                                * is the minimal window size
-                                                */
+#define KIRKWOOD_NAND_MEM_SIZE          SZ_1K
 
 #define KIRKWOOD_PCIE_IO_PHYS_BASE      0xf2000000
 #define KIRKWOOD_PCIE_IO_VIRT_BASE      0xfef00000
@@ -48,6 +50,7 @@
  */
 #define DDR_VIRT_BASE           (KIRKWOOD_REGS_VIRT_BASE | 0x00000)
 #define  DDR_WINDOW_CPU_BASE    (DDR_VIRT_BASE | 0x1500)
+#define DDR_OPERATION_BASE      (DDR_VIRT_BASE | 0x1418)
 
 #define DEV_BUS_PHYS_BASE       (KIRKWOOD_REGS_PHYS_BASE | 0x10000)
 #define DEV_BUS_VIRT_BASE       (KIRKWOOD_REGS_VIRT_BASE | 0x10000)
@@ -63,7 +66,11 @@
 
 #define BRIDGE_VIRT_BASE        (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
 
+#define CRYPTO_PHYS_BASE        (KIRKWOOD_REGS_PHYS_BASE | 0x30000)
+
 #define PCIE_VIRT_BASE          (KIRKWOOD_REGS_VIRT_BASE | 0x40000)
+#define PCIE_LINK_CTRL          (PCIE_VIRT_BASE | 0x70)
+#define PCIE_STATUS             (PCIE_VIRT_BASE | 0x1a04)
 
 #define USB_PHYS_BASE           (KIRKWOOD_REGS_PHYS_BASE | 0x50000)
 
@@ -80,6 +87,11 @@
 #define GE01_PHYS_BASE          (KIRKWOOD_REGS_PHYS_BASE | 0x74000)
 
 #define SATA_PHYS_BASE          (KIRKWOOD_REGS_PHYS_BASE | 0x80000)
+#define SATA_VIRT_BASE          (KIRKWOOD_REGS_VIRT_BASE | 0x80000)
+#define SATA0_IF_CTRL           (SATA_VIRT_BASE | 0x2050)
+#define SATA0_PHY_MODE_2        (SATA_VIRT_BASE | 0x2330)
+#define SATA1_IF_CTRL           (SATA_VIRT_BASE | 0x4050)
+#define SATA1_PHY_MODE_2        (SATA_VIRT_BASE | 0x4330)
 
 #define SDIO_PHYS_BASE          (KIRKWOOD_REGS_PHYS_BASE | 0x90000)
 
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index 63c44934391a..a5900f64e38c 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -48,6 +48,9 @@ void __init kirkwood_mpp_conf(unsigned int *mpp_list)
         if (!variant_mask)
                 return;
 
+        /* Initialize gpiolib. */
+        orion_gpio_init();
+
         printk(KERN_DEBUG "initial MPP regs:");
         for (i = 0; i < MPP_NR_REGS; i++) {
                 mpp_ctrl[i] = readl(MPP_CTRL(i));
diff --git a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
new file mode 100644
index 000000000000..0358f45766cb
--- /dev/null
+++ b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
@@ -0,0 +1,173 @@
+/*
+ * arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
+ *
+ * Marvell 88F6281 GTW GE Board Setup
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/pci.h>
+#include <linux/irq.h>
+#include <linux/mtd/physmap.h>
+#include <linux/timer.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/ethtool.h>
+#include <linux/gpio.h>
+#include <linux/leds.h>
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/orion_spi.h>
+#include <net/dsa.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/pci.h>
+#include <mach/kirkwood.h>
+#include "common.h"
+#include "mpp.h"
+
+static struct mv643xx_eth_platform_data mv88f6281gtw_ge_ge00_data = {
+        .phy_addr       = MV643XX_ETH_PHY_NONE,
+        .speed          = SPEED_1000,
+        .duplex         = DUPLEX_FULL,
+};
+
+static struct dsa_chip_data mv88f6281gtw_ge_switch_chip_data = {
+        .port_names[0]  = "lan1",
+        .port_names[1]  = "lan2",
+        .port_names[2]  = "lan3",
+        .port_names[3]  = "lan4",
+        .port_names[4]  = "wan",
+        .port_names[5]  = "cpu",
+};
+
+static struct dsa_platform_data mv88f6281gtw_ge_switch_plat_data = {
+        .nr_chips       = 1,
+        .chip           = &mv88f6281gtw_ge_switch_chip_data,
+};
+
+static const struct flash_platform_data mv88f6281gtw_ge_spi_slave_data = {
+        .type           = "mx25l12805d",
+};
+
+static struct spi_board_info __initdata mv88f6281gtw_ge_spi_slave_info[] = {
+        {
+                .modalias       = "m25p80",
+                .platform_data  = &mv88f6281gtw_ge_spi_slave_data,
+                .irq            = -1,
+                .max_speed_hz   = 50000000,
+                .bus_num        = 0,
+                .chip_select    = 0,
+        },
+};
+
+static struct gpio_keys_button mv88f6281gtw_ge_button_pins[] = {
+        {
+                .code           = KEY_RESTART,
+                .gpio           = 47,
+                .desc           = "SWR Button",
+                .active_low     = 1,
+        }, {
+                .code           = KEY_F1,
+                .gpio           = 46,
+                .desc           = "WPS Button(F1)",
+                .active_low     = 1,
+        },
+};
+
+static struct gpio_keys_platform_data mv88f6281gtw_ge_button_data = {
+        .buttons        = mv88f6281gtw_ge_button_pins,
+        .nbuttons       = ARRAY_SIZE(mv88f6281gtw_ge_button_pins),
+};
+
+static struct platform_device mv88f6281gtw_ge_buttons = {
+        .name           = "gpio-keys",
+        .id             = -1,
+        .num_resources  = 0,
+        .dev            = {
+                .platform_data  = &mv88f6281gtw_ge_button_data,
+        },
+};
+
+static struct gpio_led mv88f6281gtw_ge_led_pins[] = {
+        {
+                .name           = "gtw:green:Status",
+                .gpio           = 20,
+                .active_low     = 0,
+        }, {
+                .name           = "gtw:red:Status",
+                .gpio           = 21,
+                .active_low     = 0,
+        }, {
+                .name           = "gtw:green:USB",
+                .gpio           = 12,
+                .active_low     = 0,
+        },
+};
+
+static struct gpio_led_platform_data mv88f6281gtw_ge_led_data = {
+        .leds           = mv88f6281gtw_ge_led_pins,
+        .num_leds       = ARRAY_SIZE(mv88f6281gtw_ge_led_pins),
+};
+
+static struct platform_device mv88f6281gtw_ge_leds = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &mv88f6281gtw_ge_led_data,
+        },
+};
+
+static unsigned int mv88f6281gtw_ge_mpp_config[] __initdata = {
+        MPP12_GPO,      /* Status#_USB pin  */
+        MPP20_GPIO,     /* Status#_GLED pin */
+        MPP21_GPIO,     /* Status#_RLED pin */
+        MPP46_GPIO,     /* WPS_Switch pin   */
+        MPP47_GPIO,     /* SW_Init pin      */
+        0
+};
+
+static void __init mv88f6281gtw_ge_init(void)
+{
+        /*
+         * Basic setup. Needs to be called early.
+         */
+        kirkwood_init();
+        kirkwood_mpp_conf(mv88f6281gtw_ge_mpp_config);
+
+        kirkwood_ehci_init();
+        kirkwood_ge00_init(&mv88f6281gtw_ge_ge00_data);
+        kirkwood_ge00_switch_init(&mv88f6281gtw_ge_switch_plat_data, NO_IRQ);
+        spi_register_board_info(mv88f6281gtw_ge_spi_slave_info,
+                                ARRAY_SIZE(mv88f6281gtw_ge_spi_slave_info));
+        kirkwood_spi_init();
+        kirkwood_uart0_init();
+        platform_device_register(&mv88f6281gtw_ge_leds);
+        platform_device_register(&mv88f6281gtw_ge_buttons);
+}
+
+static int __init mv88f6281gtw_ge_pci_init(void)
+{
+        if (machine_is_mv88f6281gtw_ge())
+                kirkwood_pcie_init();
+
+        return 0;
+}
+subsys_initcall(mv88f6281gtw_ge_pci_init);
+
+MACHINE_START(MV88F6281GTW_GE, "Marvell 88F6281 GTW GE Board")
+        /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
+        .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
+        .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .init_machine   = mv88f6281gtw_ge_init,
+        .map_io         = kirkwood_map_io,
+        .init_irq       = kirkwood_init_irq,
+        .timer          = &kirkwood_timer,
+MACHINE_END
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index 73fccacd1a73..d90b9aae308d 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -14,6 +14,7 @@
 #include <asm/irq.h>
 #include <asm/mach/pci.h>
 #include <plat/pcie.h>
+#include <mach/bridge-regs.h>
 #include "common.h"
 
 
@@ -95,6 +96,7 @@ static struct pci_ops pcie_ops = {
 static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
 {
         struct resource *res;
+        extern unsigned int kirkwood_clk_ctrl;
 
         /*
          * Generic PCIe unit setup.
@@ -133,6 +135,8 @@ static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
         sys->resource[2] = NULL;
         sys->io_offset = 0;
 
+        kirkwood_clk_ctrl |= CGC_PEX0;
+
         return 1;
 }
 
diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
index 2f0e4ef3db0f..8bf4153d0840 100644
--- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
@@ -11,8 +11,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/partitions.h>
 #include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/spi/flash.h>
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index 31e996d65fc4..31708ddbc83e 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -12,7 +12,6 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/irq.h>
-#include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
@@ -22,7 +21,6 @@
 #include <asm/mach/arch.h>
 #include <mach/kirkwood.h>
 #include <plat/mvsdio.h>
-#include <plat/orion_nand.h>
 #include "common.h"
 #include "mpp.h"
 
@@ -42,32 +40,6 @@ static struct mtd_partition rd88f6281_nand_parts[] = {
         },
 };
 
-static struct resource rd88f6281_nand_resource = {
-        .flags          = IORESOURCE_MEM,
-        .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
-        .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
-                          KIRKWOOD_NAND_MEM_SIZE - 1,
-};
-
-static struct orion_nand_data rd88f6281_nand_data = {
-        .parts          = rd88f6281_nand_parts,
-        .nr_parts       = ARRAY_SIZE(rd88f6281_nand_parts),
-        .cle            = 0,
-        .ale            = 1,
-        .width          = 8,
-        .chip_delay     = 25,
-};
-
-static struct platform_device rd88f6281_nand_flash = {
-        .name           = "orion_nand",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &rd88f6281_nand_data,
-        },
-        .resource       = &rd88f6281_nand_resource,
-        .num_resources  = 1,
-};
-
 static struct mv643xx_eth_platform_data rd88f6281_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_NONE,
         .speed          = SPEED_1000,
@@ -114,6 +86,7 @@ static void __init rd88f6281_init(void)
         kirkwood_init();
         kirkwood_mpp_conf(rd88f6281_mpp_config);
 
+        kirkwood_nand_init(ARRAY_AND_SIZE(rd88f6281_nand_parts), 25);
         kirkwood_ehci_init();
 
         kirkwood_ge00_init(&rd88f6281_ge00_data);
@@ -129,8 +102,6 @@ static void __init rd88f6281_init(void)
         kirkwood_sata_init(&rd88f6281_sata_data);
         kirkwood_sdio_init(&rd88f6281_mvsdio_data);
         kirkwood_uart0_init();
-
-        platform_device_register(&rd88f6281_nand_flash);
 }
 
 static int __init rd88f6281_pci_init(void)
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index 831e4a56cae1..c7319eeac8bb 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -11,7 +11,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/gpio.h>
@@ -20,7 +19,6 @@
 #include <asm/mach/arch.h>
 #include <mach/kirkwood.h>
 #include <plat/mvsdio.h>
-#include <plat/orion_nand.h>
 #include "common.h"
 #include "mpp.h"
 
@@ -40,38 +38,12 @@ static struct mtd_partition sheevaplug_nand_parts[] = {
         },
 };
 
-static struct resource sheevaplug_nand_resource = {
-        .flags          = IORESOURCE_MEM,
-        .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
-        .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
-                          KIRKWOOD_NAND_MEM_SIZE - 1,
-};
-
-static struct orion_nand_data sheevaplug_nand_data = {
-        .parts          = sheevaplug_nand_parts,
-        .nr_parts       = ARRAY_SIZE(sheevaplug_nand_parts),
-        .cle            = 0,
-        .ale            = 1,
-        .width          = 8,
-        .chip_delay     = 25,
-};
-
-static struct platform_device sheevaplug_nand_flash = {
-        .name           = "orion_nand",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &sheevaplug_nand_data,
-        },
-        .resource       = &sheevaplug_nand_resource,
-        .num_resources  = 1,
-};
-
 static struct mv643xx_eth_platform_data sheevaplug_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
 };
 
 static struct mvsdio_platform_data sheevaplug_mvsdio_data = {
-        // unfortunately the CD signal has not been connected */
+        /* unfortunately the CD signal has not been connected */
 };
 
 static struct gpio_led sheevaplug_led_pins[] = {
@@ -111,6 +83,7 @@ static void __init sheevaplug_init(void)
         kirkwood_mpp_conf(sheevaplug_mpp_config);
 
         kirkwood_uart0_init();
+        kirkwood_nand_init(ARRAY_AND_SIZE(sheevaplug_nand_parts), 25);
 
         if (gpio_request(29, "USB Power Enable") != 0 ||
             gpio_direction_output(29, 1) != 0)
@@ -120,7 +93,6 @@ static void __init sheevaplug_init(void)
         kirkwood_ge00_init(&sheevaplug_ge00_data);
         kirkwood_sdio_init(&sheevaplug_mvsdio_data);
 
-        platform_device_register(&sheevaplug_nand_flash);
         platform_device_register(&sheevaplug_leds);
 }