diff options
Diffstat (limited to 'arch/arm/mach-kirkwood')
-rw-r--r-- | arch/arm/mach-kirkwood/addr-map.c | 14 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/common.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/kirkwood.h | 4 |
3 files changed, 11 insertions, 8 deletions
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c index 5db4f0bbe5ee..1da5d1c18ecb 100644 --- a/arch/arm/mach-kirkwood/addr-map.c +++ b/arch/arm/mach-kirkwood/addr-map.c | |||
@@ -20,6 +20,7 @@ | |||
20 | */ | 20 | */ |
21 | #define TARGET_DDR 0 | 21 | #define TARGET_DDR 0 |
22 | #define TARGET_DEV_BUS 1 | 22 | #define TARGET_DEV_BUS 1 |
23 | #define TARGET_SRAM 3 | ||
23 | #define TARGET_PCIE 4 | 24 | #define TARGET_PCIE 4 |
24 | #define ATTR_DEV_SPI_ROM 0x1e | 25 | #define ATTR_DEV_SPI_ROM 0x1e |
25 | #define ATTR_DEV_BOOT 0x1d | 26 | #define ATTR_DEV_BOOT 0x1d |
@@ -30,6 +31,7 @@ | |||
30 | #define ATTR_DEV_CS0 0x3e | 31 | #define ATTR_DEV_CS0 0x3e |
31 | #define ATTR_PCIE_IO 0xe0 | 32 | #define ATTR_PCIE_IO 0xe0 |
32 | #define ATTR_PCIE_MEM 0xe8 | 33 | #define ATTR_PCIE_MEM 0xe8 |
34 | #define ATTR_SRAM 0x01 | ||
33 | 35 | ||
34 | /* | 36 | /* |
35 | * Helpers to get DDR bank info | 37 | * Helpers to get DDR bank info |
@@ -48,7 +50,6 @@ | |||
48 | 50 | ||
49 | 51 | ||
50 | struct mbus_dram_target_info kirkwood_mbus_dram_info; | 52 | struct mbus_dram_target_info kirkwood_mbus_dram_info; |
51 | static int __initdata win_alloc_count; | ||
52 | 53 | ||
53 | static int __init cpu_win_can_remap(int win) | 54 | static int __init cpu_win_can_remap(int win) |
54 | { | 55 | { |
@@ -112,7 +113,11 @@ void __init kirkwood_setup_cpu_mbus(void) | |||
112 | setup_cpu_win(2, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE, | 113 | setup_cpu_win(2, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE, |
113 | TARGET_DEV_BUS, ATTR_DEV_NAND, -1); | 114 | TARGET_DEV_BUS, ATTR_DEV_NAND, -1); |
114 | 115 | ||
115 | win_alloc_count = 3; | 116 | /* |
117 | * Setup window for SRAM. | ||
118 | */ | ||
119 | setup_cpu_win(3, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE, | ||
120 | TARGET_SRAM, ATTR_SRAM, -1); | ||
116 | 121 | ||
117 | /* | 122 | /* |
118 | * Setup MBUS dram target info. | 123 | * Setup MBUS dram target info. |
@@ -140,8 +145,3 @@ void __init kirkwood_setup_cpu_mbus(void) | |||
140 | } | 145 | } |
141 | kirkwood_mbus_dram_info.num_cs = cs; | 146 | kirkwood_mbus_dram_info.num_cs = cs; |
142 | } | 147 | } |
143 | |||
144 | void __init kirkwood_setup_sram_win(u32 base, u32 size) | ||
145 | { | ||
146 | setup_cpu_win(win_alloc_count++, base, size, 0x03, 0x00, -1); | ||
147 | } | ||
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h index 9de525664bb3..d7de43464358 100644 --- a/arch/arm/mach-kirkwood/common.h +++ b/arch/arm/mach-kirkwood/common.h | |||
@@ -26,7 +26,6 @@ void kirkwood_init_irq(void); | |||
26 | 26 | ||
27 | extern struct mbus_dram_target_info kirkwood_mbus_dram_info; | 27 | extern struct mbus_dram_target_info kirkwood_mbus_dram_info; |
28 | void kirkwood_setup_cpu_mbus(void); | 28 | void kirkwood_setup_cpu_mbus(void); |
29 | void kirkwood_setup_sram_win(u32 base, u32 size); | ||
30 | 29 | ||
31 | void kirkwood_pcie_id(u32 *dev, u32 *rev); | 30 | void kirkwood_pcie_id(u32 *dev, u32 *rev); |
32 | 31 | ||
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h index 00be8c524f06..2172224d7e2d 100644 --- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h +++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h | |||
@@ -20,12 +20,16 @@ | |||
20 | * f1000000 on-chip peripheral registers | 20 | * f1000000 on-chip peripheral registers |
21 | * f2000000 PCIe I/O space | 21 | * f2000000 PCIe I/O space |
22 | * f3000000 NAND controller address window | 22 | * f3000000 NAND controller address window |
23 | * f4000000 Security Accelerator SRAM | ||
23 | * | 24 | * |
24 | * virt phys size | 25 | * virt phys size |
25 | * fee00000 f1000000 1M on-chip peripheral registers | 26 | * fee00000 f1000000 1M on-chip peripheral registers |
26 | * fef00000 f2000000 1M PCIe I/O space | 27 | * fef00000 f2000000 1M PCIe I/O space |
27 | */ | 28 | */ |
28 | 29 | ||
30 | #define KIRKWOOD_SRAM_PHYS_BASE 0xf4000000 | ||
31 | #define KIRKWOOD_SRAM_SIZE SZ_2K | ||
32 | |||
29 | #define KIRKWOOD_NAND_MEM_PHYS_BASE 0xf3000000 | 33 | #define KIRKWOOD_NAND_MEM_PHYS_BASE 0xf3000000 |
30 | #define KIRKWOOD_NAND_MEM_SIZE SZ_1K | 34 | #define KIRKWOOD_NAND_MEM_SIZE SZ_1K |
31 | 35 | ||