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-rw-r--r--arch/arm/mach-kirkwood/addr-map.c2
-rw-r--r--arch/arm/mach-kirkwood/common.c10
-rw-r--r--arch/arm/mach-kirkwood/include/mach/bridge-regs.h3
-rw-r--r--arch/arm/mach-kirkwood/include/mach/io.h2
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h1
-rw-r--r--arch/arm/mach-kirkwood/openrd_base-setup.c12
-rw-r--r--arch/arm/mach-kirkwood/pcie.c6
7 files changed, 30 insertions, 6 deletions
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c
index 1da5d1c18ecb..2e69168fc699 100644
--- a/arch/arm/mach-kirkwood/addr-map.c
+++ b/arch/arm/mach-kirkwood/addr-map.c
@@ -105,7 +105,7 @@ void __init kirkwood_setup_cpu_mbus(void)
105 setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE, 105 setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE,
106 TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE); 106 TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE);
107 setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE, 107 setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE,
108 TARGET_PCIE, ATTR_PCIE_MEM, -1); 108 TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE);
109 109
110 /* 110 /*
111 * Setup window for NAND controller. 111 * Setup window for NAND controller.
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 0acb61f3c10b..242dd0775343 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -845,7 +845,7 @@ int __init kirkwood_find_tclk(void)
845 return 166666667; 845 return 166666667;
846} 846}
847 847
848static void kirkwood_timer_init(void) 848static void __init kirkwood_timer_init(void)
849{ 849{
850 kirkwood_tclk = kirkwood_find_tclk(); 850 kirkwood_tclk = kirkwood_find_tclk();
851 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk); 851 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
@@ -915,6 +915,14 @@ void __init kirkwood_init(void)
915 kirkwood_uart0_data[0].uartclk = kirkwood_tclk; 915 kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
916 kirkwood_uart1_data[0].uartclk = kirkwood_tclk; 916 kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
917 917
918 /*
919 * Disable propagation of mbus errors to the CPU local bus,
920 * as this causes mbus errors (which can occur for example
921 * for PCI aborts) to throw CPU aborts, which we're not set
922 * up to deal with.
923 */
924 writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
925
918 kirkwood_setup_cpu_mbus(); 926 kirkwood_setup_cpu_mbus();
919 927
920#ifdef CONFIG_CACHE_FEROCEON_L2 928#ifdef CONFIG_CACHE_FEROCEON_L2
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index 9e80d9232c83..418f5017c50e 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -13,6 +13,9 @@
13 13
14#include <mach/kirkwood.h> 14#include <mach/kirkwood.h>
15 15
16#define CPU_CONFIG (BRIDGE_VIRT_BASE | 0x0100)
17#define CPU_CONFIG_ERROR_PROP 0x00000004
18
16#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) 19#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104)
17#define CPU_RESET 0x00000002 20#define CPU_RESET 0x00000002
18 21
diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h
index a643a846d5fb..44e8be04f259 100644
--- a/arch/arm/mach-kirkwood/include/mach/io.h
+++ b/arch/arm/mach-kirkwood/include/mach/io.h
@@ -15,7 +15,7 @@
15 15
16static inline void __iomem *__io(unsigned long addr) 16static inline void __iomem *__io(unsigned long addr)
17{ 17{
18 return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_PHYS_BASE) 18 return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_BUS_BASE)
19 + KIRKWOOD_PCIE_IO_VIRT_BASE); 19 + KIRKWOOD_PCIE_IO_VIRT_BASE);
20} 20}
21 21
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index 54c132731d2d..a15cf0ee22bd 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -43,6 +43,7 @@
43#define KIRKWOOD_REGS_SIZE SZ_1M 43#define KIRKWOOD_REGS_SIZE SZ_1M
44 44
45#define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000 45#define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000
46#define KIRKWOOD_PCIE_MEM_BUS_BASE 0xe0000000
46#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M 47#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M
47 48
48/* 49/*
diff --git a/arch/arm/mach-kirkwood/openrd_base-setup.c b/arch/arm/mach-kirkwood/openrd_base-setup.c
index 947dfb8cd5b2..77617c722299 100644
--- a/arch/arm/mach-kirkwood/openrd_base-setup.c
+++ b/arch/arm/mach-kirkwood/openrd_base-setup.c
@@ -70,8 +70,20 @@ static void __init openrd_base_init(void)
70 kirkwood_ge00_init(&openrd_base_ge00_data); 70 kirkwood_ge00_init(&openrd_base_ge00_data);
71 kirkwood_sata_init(&openrd_base_sata_data); 71 kirkwood_sata_init(&openrd_base_sata_data);
72 kirkwood_sdio_init(&openrd_base_mvsdio_data); 72 kirkwood_sdio_init(&openrd_base_mvsdio_data);
73
74 kirkwood_i2c_init();
73} 75}
74 76
77static int __init openrd_base_pci_init(void)
78{
79 if (machine_is_openrd_base())
80 kirkwood_pcie_init();
81
82 return 0;
83 }
84subsys_initcall(openrd_base_pci_init);
85
86
75MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board") 87MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
76 /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */ 88 /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
77 .phys_io = KIRKWOOD_REGS_PHYS_BASE, 89 .phys_io = KIRKWOOD_REGS_PHYS_BASE,
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index d90b9aae308d..a604b2a701aa 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -93,7 +93,7 @@ static struct pci_ops pcie_ops = {
93}; 93};
94 94
95 95
96static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) 96static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
97{ 97{
98 struct resource *res; 98 struct resource *res;
99 extern unsigned int kirkwood_clk_ctrl; 99 extern unsigned int kirkwood_clk_ctrl;
@@ -115,7 +115,7 @@ static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
115 */ 115 */
116 res[0].name = "PCIe I/O Space"; 116 res[0].name = "PCIe I/O Space";
117 res[0].flags = IORESOURCE_IO; 117 res[0].flags = IORESOURCE_IO;
118 res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE; 118 res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE;
119 res[0].end = res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1; 119 res[0].end = res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;
120 if (request_resource(&ioport_resource, &res[0])) 120 if (request_resource(&ioport_resource, &res[0]))
121 panic("Request PCIe IO resource failed\n"); 121 panic("Request PCIe IO resource failed\n");
@@ -126,7 +126,7 @@ static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
126 */ 126 */
127 res[1].name = "PCIe Memory Space"; 127 res[1].name = "PCIe Memory Space";
128 res[1].flags = IORESOURCE_MEM; 128 res[1].flags = IORESOURCE_MEM;
129 res[1].start = KIRKWOOD_PCIE_MEM_PHYS_BASE; 129 res[1].start = KIRKWOOD_PCIE_MEM_BUS_BASE;
130 res[1].end = res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1; 130 res[1].end = res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1;
131 if (request_resource(&iomem_resource, &res[1])) 131 if (request_resource(&iomem_resource, &res[1]))
132 panic("Request PCIe Memory resource failed\n"); 132 panic("Request PCIe Memory resource failed\n");