3 files changed, 61 insertions, 3 deletions

diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index 4f7029f521cc..9e80d9232c83 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -17,12 +17,15 @@
 #define CPU_RESET               0x00000002
 
 #define RSTOUTn_MASK            (BRIDGE_VIRT_BASE | 0x0108)
+#define WDT_RESET_OUT_EN        0x00000002
 #define SOFT_RESET_OUT_EN       0x00000004
 
 #define SYSTEM_SOFT_RESET       (BRIDGE_VIRT_BASE | 0x010c)
 #define SOFT_RESET              0x00000001
 
 #define BRIDGE_CAUSE            (BRIDGE_VIRT_BASE | 0x0110)
+#define WDT_INT_REQ             0x0008
+
 #define BRIDGE_MASK             (BRIDGE_VIRT_BASE | 0x0114)
 #define BRIDGE_INT_TIMER0       0x0002
 #define BRIDGE_INT_TIMER1       0x0004
@@ -39,4 +42,22 @@
 #define L2_CONFIG_REG           (BRIDGE_VIRT_BASE | 0x0128)
 #define L2_WRITETHROUGH         0x00000010
 
+#define CLOCK_GATING_CTRL       (BRIDGE_VIRT_BASE | 0x11c)
+#define CGC_GE0                 (1 << 0)
+#define CGC_PEX0                (1 << 2)
+#define CGC_USB0                (1 << 3)
+#define CGC_SDIO                (1 << 4)
+#define CGC_TSU                 (1 << 5)
+#define CGC_DUNIT               (1 << 6)
+#define CGC_RUNIT               (1 << 7)
+#define CGC_XOR0                (1 << 8)
+#define CGC_AUDIO               (1 << 9)
+#define CGC_SATA0               (1 << 14)
+#define CGC_SATA1               (1 << 15)
+#define CGC_XOR1                (1 << 16)
+#define CGC_CRYPTO              (1 << 17)
+#define CGC_GE1                 (1 << 19)
+#define CGC_TDM                 (1 << 20)
+#define CGC_RESERVED            ((1 << 18) | (0x6 << 21))
+
 #endif
diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h
index be07be0ef522..a643a846d5fb 100644
--- a/arch/arm/mach-kirkwood/include/mach/io.h
+++ b/arch/arm/mach-kirkwood/include/mach/io.h
@@ -19,6 +19,31 @@ static inline void __iomem *__io(unsigned long addr)
                                         + KIRKWOOD_PCIE_IO_VIRT_BASE);
 }
 
+static inline void __iomem *
+__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype)
+{
+        void __iomem *retval;
+        unsigned long offs = paddr - KIRKWOOD_REGS_PHYS_BASE;
+        if (mtype == MT_DEVICE && size && offs < KIRKWOOD_REGS_SIZE &&
+            size <= KIRKWOOD_REGS_SIZE && offs + size <= KIRKWOOD_REGS_SIZE) {
+                retval = (void __iomem *)KIRKWOOD_REGS_VIRT_BASE + offs;
+        } else {
+                retval = __arm_ioremap(paddr, size, mtype);
+        }
+
+        return retval;
+}
+
+static inline void
+__arch_iounmap(void __iomem *addr)
+{
+        if (addr < (void __iomem *)KIRKWOOD_REGS_VIRT_BASE ||
+            addr >= (void __iomem *)(KIRKWOOD_REGS_VIRT_BASE + KIRKWOOD_REGS_SIZE))
+                __iounmap(addr);
+}
+
+#define __arch_ioremap(p, s, m) __arch_ioremap(p, s, m)
+#define __arch_iounmap(a)       __arch_iounmap(a)
 #define __io(a)                 __io(a)
 #define __mem_pci(a)            (a)
 
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index b3e13958821d..07af858814a0 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -20,16 +20,18 @@
  * f1000000     on-chip peripheral registers
  * f2000000     PCIe I/O space
  * f3000000     NAND controller address window
+ * f4000000     Security Accelerator SRAM
  *
  * virt         phys            size
  * fee00000     f1000000        1M      on-chip peripheral registers
  * fef00000     f2000000        1M      PCIe I/O space
  */
 
+#define KIRKWOOD_SRAM_PHYS_BASE         0xf4000000
+#define KIRKWOOD_SRAM_SIZE              SZ_2K
+
 #define KIRKWOOD_NAND_MEM_PHYS_BASE     0xf3000000
-#define KIRKWOOD_NAND_MEM_SIZE          SZ_64K /* 1K is sufficient, but 64K
-                                                * is the minimal window size
-                                                */
+#define KIRKWOOD_NAND_MEM_SIZE          SZ_1K
 
 #define KIRKWOOD_PCIE_IO_PHYS_BASE      0xf2000000
 #define KIRKWOOD_PCIE_IO_VIRT_BASE      0xfef00000
@@ -48,6 +50,7 @@
  */
 #define DDR_VIRT_BASE           (KIRKWOOD_REGS_VIRT_BASE | 0x00000)
 #define  DDR_WINDOW_CPU_BASE    (DDR_VIRT_BASE | 0x1500)
+#define DDR_OPERATION_BASE      (DDR_VIRT_BASE | 0x1418)
 
 #define DEV_BUS_PHYS_BASE       (KIRKWOOD_REGS_PHYS_BASE | 0x10000)
 #define DEV_BUS_VIRT_BASE       (KIRKWOOD_REGS_VIRT_BASE | 0x10000)
@@ -63,7 +66,11 @@
 
 #define BRIDGE_VIRT_BASE        (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
 
+#define CRYPTO_PHYS_BASE        (KIRKWOOD_REGS_PHYS_BASE | 0x30000)
+
 #define PCIE_VIRT_BASE          (KIRKWOOD_REGS_VIRT_BASE | 0x40000)
+#define PCIE_LINK_CTRL          (PCIE_VIRT_BASE | 0x70)
+#define PCIE_STATUS             (PCIE_VIRT_BASE | 0x1a04)
 
 #define USB_PHYS_BASE           (KIRKWOOD_REGS_PHYS_BASE | 0x50000)
 
@@ -80,6 +87,11 @@
 #define GE01_PHYS_BASE          (KIRKWOOD_REGS_PHYS_BASE | 0x74000)
 
 #define SATA_PHYS_BASE          (KIRKWOOD_REGS_PHYS_BASE | 0x80000)
+#define SATA_VIRT_BASE          (KIRKWOOD_REGS_VIRT_BASE | 0x80000)
+#define SATA0_IF_CTRL           (SATA_VIRT_BASE | 0x2050)
+#define SATA0_PHY_MODE_2        (SATA_VIRT_BASE | 0x2330)
+#define SATA1_IF_CTRL           (SATA_VIRT_BASE | 0x4050)
+#define SATA1_PHY_MODE_2        (SATA_VIRT_BASE | 0x4330)
 
 #define SDIO_PHYS_BASE          (KIRKWOOD_REGS_PHYS_BASE | 0x90000)