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-rw-r--r--arch/arm/mach-kirkwood/include/mach/bridge-regs.h18
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h7
2 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index 4f7029f521cc..00d96abb718c 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -39,4 +39,22 @@
39#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128) 39#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128)
40#define L2_WRITETHROUGH 0x00000010 40#define L2_WRITETHROUGH 0x00000010
41 41
42#define CLOCK_GATING_CTRL (BRIDGE_VIRT_BASE | 0x11c)
43#define CGC_GE0 (1 << 0)
44#define CGC_PEX0 (1 << 2)
45#define CGC_USB0 (1 << 3)
46#define CGC_SDIO (1 << 4)
47#define CGC_TSU (1 << 5)
48#define CGC_DUNIT (1 << 6)
49#define CGC_RUNIT (1 << 7)
50#define CGC_XOR0 (1 << 8)
51#define CGC_AUDIO (1 << 9)
52#define CGC_SATA0 (1 << 14)
53#define CGC_SATA1 (1 << 15)
54#define CGC_XOR1 (1 << 16)
55#define CGC_CRYPTO (1 << 17)
56#define CGC_GE1 (1 << 19)
57#define CGC_TDM (1 << 20)
58#define CGC_RESERVED ((1 << 18) | (0x6 << 21))
59
42#endif 60#endif
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index f20ff6460485..f49a29bf3369 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -65,6 +65,8 @@
65#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000) 65#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
66 66
67#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000) 67#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000)
68#define PCIE_LINK_CTRL (PCIE_VIRT_BASE | 0x70)
69#define PCIE_STATUS (PCIE_VIRT_BASE | 0x1a04)
68 70
69#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000) 71#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000)
70 72
@@ -81,6 +83,11 @@
81#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000) 83#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000)
82 84
83#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000) 85#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000)
86#define SATA_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x80000)
87#define SATA0_IF_CTRL (SATA_VIRT_BASE | 0x2050)
88#define SATA0_PHY_MODE_2 (SATA_VIRT_BASE | 0x2330)
89#define SATA1_IF_CTRL (SATA_VIRT_BASE | 0x4050)
90#define SATA1_PHY_MODE_2 (SATA_VIRT_BASE | 0x4330)
84 91
85#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000) 92#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000)
86 93