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-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h53
1 files changed, 15 insertions, 38 deletions
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index 38c986853590..b3e13958821d 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -44,44 +44,6 @@
44#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M 44#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M
45 45
46/* 46/*
47 * MBUS bridge registers.
48 */
49#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
50#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104)
51#define CPU_RESET 0x00000002
52#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
53#define SOFT_RESET_OUT_EN 0x00000004
54#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
55#define SOFT_RESET 0x00000001
56#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
57#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
58#define BRIDGE_INT_TIMER0 0x0002
59#define BRIDGE_INT_TIMER1 0x0004
60#define BRIDGE_INT_TIMER1_CLR (~0x0004)
61#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
62#define IRQ_CAUSE_LOW_OFF 0x0000
63#define IRQ_MASK_LOW_OFF 0x0004
64#define IRQ_CAUSE_HIGH_OFF 0x0010
65#define IRQ_MASK_HIGH_OFF 0x0014
66#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
67#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128)
68#define L2_WRITETHROUGH 0x00000010
69
70/*
71 * Supported devices and revisions.
72 */
73#define MV88F6281_DEV_ID 0x6281
74#define MV88F6281_REV_Z0 0
75#define MV88F6281_REV_A0 2
76
77#define MV88F6192_DEV_ID 0x6192
78#define MV88F6192_REV_Z0 0
79#define MV88F6192_REV_A0 2
80
81#define MV88F6180_DEV_ID 0x6180
82#define MV88F6180_REV_A0 2
83
84/*
85 * Register Map 47 * Register Map
86 */ 48 */
87#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000) 49#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000)
@@ -99,6 +61,8 @@
99#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100) 61#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100)
100#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) 62#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100)
101 63
64#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
65
102#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000) 66#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000)
103 67
104#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000) 68#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000)
@@ -119,5 +83,18 @@
119 83
120#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000) 84#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000)
121 85
86/*
87 * Supported devices and revisions.
88 */
89#define MV88F6281_DEV_ID 0x6281
90#define MV88F6281_REV_Z0 0
91#define MV88F6281_REV_A0 2
92
93#define MV88F6192_DEV_ID 0x6192
94#define MV88F6192_REV_Z0 0
95#define MV88F6192_REV_A0 2
96
97#define MV88F6180_DEV_ID 0x6180
98#define MV88F6180_REV_A0 2
122 99
123#endif 100#endif