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-rw-r--r--arch/arm/mach-ixp4xx/Kconfig8
-rw-r--r--arch/arm/mach-ixp4xx/Makefile1
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c23
-rw-r--r--arch/arm/mach-ixp4xx/common.c20
-rw-r--r--arch/arm/mach-ixp4xx/coyote-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/coyote-setup.c10
-rw-r--r--arch/arm/mach-ixp4xx/gtwx5715-setup.c15
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-pci.c5
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-setup.c13
-rw-r--r--arch/arm/mach-ixp4xx/ixdpg425-pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-pci.c71
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-power.c67
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-setup.c135
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-pci.c8
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-power.c3
15 files changed, 345 insertions, 40 deletions
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index 385285851cb5..daadc78e271b 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -71,6 +71,14 @@ config ARCH_PRPMC1100
71 PrPCM1100 Processor Mezanine Module. For more information on 71 PrPCM1100 Processor Mezanine Module. For more information on
72 this platform, see <file:Documentation/arm/IXP4xx>. 72 this platform, see <file:Documentation/arm/IXP4xx>.
73 73
74config MACH_NAS100D
75 bool
76 prompt "NAS100D"
77 help
78 Say 'Y' here if you want your kernel to support Iomega's
79 NAS 100d device. For more information on this platform,
80 see http://www.nslu2-linux.org/wiki/NAS100d/HomePage
81
74# 82#
75# Avila and IXDP share the same source for now. Will change in future 83# Avila and IXDP share the same source for now. Will change in future
76# 84#
diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile
index 7a15629c18d0..0471044fa179 100644
--- a/arch/arm/mach-ixp4xx/Makefile
+++ b/arch/arm/mach-ixp4xx/Makefile
@@ -9,4 +9,5 @@ obj-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o coyote-setup.o
9obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o coyote-setup.o 9obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o coyote-setup.o
10obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o gtwx5715-setup.o 10obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o gtwx5715-setup.o
11obj-$(CONFIG_MACH_NSLU2) += nslu2-pci.o nslu2-setup.o nslu2-power.o 11obj-$(CONFIG_MACH_NSLU2) += nslu2-pci.o nslu2-setup.o nslu2-power.o
12obj-$(CONFIG_MACH_NAS100D) += nas100d-pci.o nas100d-setup.o nas100d-power.o
12 13
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 9795da270e3a..6e3462ed5306 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -341,6 +341,29 @@ int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
341 return (dev->bus == &pci_bus_type ) && ((dma_addr + size) >= SZ_64M); 341 return (dev->bus == &pci_bus_type ) && ((dma_addr + size) >= SZ_64M);
342} 342}
343 343
344/*
345 * Only first 64MB of memory can be accessed via PCI.
346 * We use GFP_DMA to allocate safe buffers to do map/unmap.
347 * This is really ugly and we need a better way of specifying
348 * DMA-capable regions of memory.
349 */
350void __init ixp4xx_adjust_zones(int node, unsigned long *zone_size,
351 unsigned long *zhole_size)
352{
353 unsigned int sz = SZ_64M >> PAGE_SHIFT;
354
355 /*
356 * Only adjust if > 64M on current system
357 */
358 if (node || (zone_size[0] <= sz))
359 return;
360
361 zone_size[1] = zone_size[0] - sz;
362 zone_size[0] = sz;
363 zhole_size[1] = zhole_size[0];
364 zhole_size[0] = 0;
365}
366
344void __init ixp4xx_pci_preinit(void) 367void __init ixp4xx_pci_preinit(void)
345{ 368{
346 unsigned long processor_id; 369 unsigned long processor_id;
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index f3c687cf0071..6b393691d0e8 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -142,6 +142,8 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
142 *int_reg &= ~(IXP4XX_GPIO_STYLE_CLEAR << 142 *int_reg &= ~(IXP4XX_GPIO_STYLE_CLEAR <<
143 (line * IXP4XX_GPIO_STYLE_SIZE)); 143 (line * IXP4XX_GPIO_STYLE_SIZE));
144 144
145 *IXP4XX_GPIO_GPISR = (1 << line);
146
145 /* Set the new style */ 147 /* Set the new style */
146 *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE)); 148 *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE));
147 149
@@ -169,7 +171,7 @@ static void ixp4xx_irq_ack(unsigned int irq)
169 int line = (irq < 32) ? irq2gpio[irq] : -1; 171 int line = (irq < 32) ? irq2gpio[irq] : -1;
170 172
171 if (line >= 0) 173 if (line >= 0)
172 gpio_line_isr_clear(line); 174 *IXP4XX_GPIO_GPISR = (1 << line);
173} 175}
174 176
175/* 177/*
@@ -330,11 +332,27 @@ static struct platform_device *ixp46x_devices[] __initdata = {
330 &ixp46x_i2c_controller 332 &ixp46x_i2c_controller
331}; 333};
332 334
335unsigned long ixp4xx_exp_bus_size;
336
333void __init ixp4xx_sys_init(void) 337void __init ixp4xx_sys_init(void)
334{ 338{
339 ixp4xx_exp_bus_size = SZ_16M;
340
335 if (cpu_is_ixp46x()) { 341 if (cpu_is_ixp46x()) {
342 int region;
343
336 platform_add_devices(ixp46x_devices, 344 platform_add_devices(ixp46x_devices,
337 ARRAY_SIZE(ixp46x_devices)); 345 ARRAY_SIZE(ixp46x_devices));
346
347 for (region = 0; region < 7; region++) {
348 if((*(IXP4XX_EXP_REG(0x4 * region)) & 0x200)) {
349 ixp4xx_exp_bus_size = SZ_32M;
350 break;
351 }
352 }
338 } 353 }
354
355 printk("IXP4xx: Using %uMiB expansion bus window size\n",
356 ixp4xx_exp_bus_size >> 20);
339} 357}
340 358
diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c
index 60de8a94cff5..e6b7fcd923fa 100644
--- a/arch/arm/mach-ixp4xx/coyote-pci.c
+++ b/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -33,9 +33,6 @@ void __init coyote_pci_preinit(void)
33 set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQT_LOW); 33 set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQT_LOW);
34 set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQT_LOW); 34 set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQT_LOW);
35 35
36 gpio_line_isr_clear(COYOTE_PCI_SLOT0_PIN);
37 gpio_line_isr_clear(COYOTE_PCI_SLOT1_PIN);
38
39 ixp4xx_pci_preinit(); 36 ixp4xx_pci_preinit();
40} 37}
41 38
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c
index 050c92768913..679594a73981 100644
--- a/arch/arm/mach-ixp4xx/coyote-setup.c
+++ b/arch/arm/mach-ixp4xx/coyote-setup.c
@@ -14,6 +14,7 @@
14#include <linux/serial.h> 14#include <linux/serial.h>
15#include <linux/tty.h> 15#include <linux/tty.h>
16#include <linux/serial_8250.h> 16#include <linux/serial_8250.h>
17#include <linux/slab.h>
17 18
18#include <asm/types.h> 19#include <asm/types.h>
19#include <asm/setup.h> 20#include <asm/setup.h>
@@ -30,8 +31,6 @@ static struct flash_platform_data coyote_flash_data = {
30}; 31};
31 32
32static struct resource coyote_flash_resource = { 33static struct resource coyote_flash_resource = {
33 .start = COYOTE_FLASH_BASE,
34 .end = COYOTE_FLASH_BASE + COYOTE_FLASH_SIZE - 1,
35 .flags = IORESOURCE_MEM, 34 .flags = IORESOURCE_MEM,
36}; 35};
37 36
@@ -81,6 +80,11 @@ static struct platform_device *coyote_devices[] __initdata = {
81 80
82static void __init coyote_init(void) 81static void __init coyote_init(void)
83{ 82{
83 ixp4xx_sys_init();
84
85 coyote_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
86 coyote_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
87
84 *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; 88 *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
85 *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; 89 *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
86 90
@@ -91,8 +95,6 @@ static void __init coyote_init(void)
91 coyote_uart_data[0].irq = IRQ_IXP4XX_UART1; 95 coyote_uart_data[0].irq = IRQ_IXP4XX_UART1;
92 } 96 }
93 97
94
95 ixp4xx_sys_init();
96 platform_add_devices(coyote_devices, ARRAY_SIZE(coyote_devices)); 98 platform_add_devices(coyote_devices, ARRAY_SIZE(coyote_devices));
97} 99}
98 100
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
index 29a6d02fa851..038670489970 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
@@ -27,6 +27,7 @@
27#include <linux/serial.h> 27#include <linux/serial.h>
28#include <linux/tty.h> 28#include <linux/tty.h>
29#include <linux/serial_8250.h> 29#include <linux/serial_8250.h>
30#include <linux/slab.h>
30 31
31#include <asm/types.h> 32#include <asm/types.h>
32#include <asm/setup.h> 33#include <asm/setup.h>
@@ -106,11 +107,9 @@ static struct flash_platform_data gtwx5715_flash_data = {
106 .width = 2, 107 .width = 2,
107}; 108};
108 109
109static struct resource gtwx5715_flash_resource = { 110static struct gtw5715_flash_resource = {
110 .start = GTWX5715_FLASH_BASE,
111 .end = GTWX5715_FLASH_BASE + GTWX5715_FLASH_SIZE - 1,
112 .flags = IORESOURCE_MEM, 111 .flags = IORESOURCE_MEM,
113}; 112}
114 113
115static struct platform_device gtwx5715_flash = { 114static struct platform_device gtwx5715_flash = {
116 .name = "IXP4XX-Flash", 115 .name = "IXP4XX-Flash",
@@ -129,6 +128,14 @@ static struct platform_device *gtwx5715_devices[] __initdata = {
129 128
130static void __init gtwx5715_init(void) 129static void __init gtwx5715_init(void)
131{ 130{
131 ixp4xx_sys_init();
132
133 if (!flash_resource)
134 printk(KERN_ERR "Could not allocate flash resource\n");
135
136 gtwx5715_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
137 gtwx5715_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_8M - 1;
138
132 platform_add_devices(gtwx5715_devices, ARRAY_SIZE(gtwx5715_devices)); 139 platform_add_devices(gtwx5715_devices, ARRAY_SIZE(gtwx5715_devices));
133} 140}
134 141
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c
index f9a1d3e7d692..da415d5d7f37 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
@@ -32,11 +32,6 @@ void __init ixdp425_pci_preinit(void)
32 set_irq_type(IRQ_IXDP425_PCI_INTC, IRQT_LOW); 32 set_irq_type(IRQ_IXDP425_PCI_INTC, IRQT_LOW);
33 set_irq_type(IRQ_IXDP425_PCI_INTD, IRQT_LOW); 33 set_irq_type(IRQ_IXDP425_PCI_INTD, IRQT_LOW);
34 34
35 gpio_line_isr_clear(IXDP425_PCI_INTA_PIN);
36 gpio_line_isr_clear(IXDP425_PCI_INTB_PIN);
37 gpio_line_isr_clear(IXDP425_PCI_INTC_PIN);
38 gpio_line_isr_clear(IXDP425_PCI_INTD_PIN);
39
40 ixp4xx_pci_preinit(); 35 ixp4xx_pci_preinit();
41} 36}
42 37
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index 3a22d84e1047..c2e105c89c95 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -14,6 +14,7 @@
14#include <linux/serial.h> 14#include <linux/serial.h>
15#include <linux/tty.h> 15#include <linux/tty.h>
16#include <linux/serial_8250.h> 16#include <linux/serial_8250.h>
17#include <linux/slab.h>
17 18
18#include <asm/types.h> 19#include <asm/types.h>
19#include <asm/setup.h> 20#include <asm/setup.h>
@@ -30,8 +31,6 @@ static struct flash_platform_data ixdp425_flash_data = {
30}; 31};
31 32
32static struct resource ixdp425_flash_resource = { 33static struct resource ixdp425_flash_resource = {
33 .start = IXDP425_FLASH_BASE,
34 .end = IXDP425_FLASH_BASE + IXDP425_FLASH_SIZE - 1,
35 .flags = IORESOURCE_MEM, 34 .flags = IORESOURCE_MEM,
36}; 35};
37 36
@@ -108,17 +107,13 @@ static struct platform_device *ixdp425_devices[] __initdata = {
108 &ixdp425_uart 107 &ixdp425_uart
109}; 108};
110 109
111
112static void __init ixdp425_init(void) 110static void __init ixdp425_init(void)
113{ 111{
114 ixp4xx_sys_init(); 112 ixp4xx_sys_init();
115 113
116 /* 114 ixdp425_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
117 * IXP465 has 32MB window 115 ixdp425_flash_resource.end =
118 */ 116 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
119 if (machine_is_ixdp465()) {
120 ixdp425_flash_resource.end += IXDP425_FLASH_SIZE;
121 }
122 117
123 platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices)); 118 platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
124} 119}
diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
index fe5e7660de1d..526fb6175bc3 100644
--- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
@@ -32,9 +32,6 @@ void __init ixdpg425_pci_preinit(void)
32 set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW); 32 set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW);
33 set_irq_type(IRQ_IXP4XX_GPIO7, IRQT_LOW); 33 set_irq_type(IRQ_IXP4XX_GPIO7, IRQT_LOW);
34 34
35 gpio_line_isr_clear(6);
36 gpio_line_isr_clear(7);
37
38 ixp4xx_pci_preinit(); 35 ixp4xx_pci_preinit();
39} 36}
40 37
diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c
new file mode 100644
index 000000000000..26b7c001ff64
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/nas100d-pci.c
@@ -0,0 +1,71 @@
1/*
2 * arch/arm/mach-ixp4xx/nas100d-pci.c
3 *
4 * NAS 100d board-level PCI initialization
5 *
6 * based on ixdp425-pci.c:
7 * Copyright (C) 2002 Intel Corporation.
8 * Copyright (C) 2003-2004 MontaVista Software, Inc.
9 *
10 * Maintainer: http://www.nslu2-linux.org/
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17
18#include <linux/config.h>
19#include <linux/pci.h>
20#include <linux/init.h>
21
22#include <asm/mach/pci.h>
23#include <asm/mach-types.h>
24
25void __init nas100d_pci_preinit(void)
26{
27 set_irq_type(IRQ_NAS100D_PCI_INTA, IRQT_LOW);
28 set_irq_type(IRQ_NAS100D_PCI_INTB, IRQT_LOW);
29 set_irq_type(IRQ_NAS100D_PCI_INTC, IRQT_LOW);
30 set_irq_type(IRQ_NAS100D_PCI_INTD, IRQT_LOW);
31 set_irq_type(IRQ_NAS100D_PCI_INTE, IRQT_LOW);
32
33 ixp4xx_pci_preinit();
34}
35
36static int __init nas100d_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
37{
38 static int pci_irq_table[NAS100D_PCI_MAX_DEV][NAS100D_PCI_IRQ_LINES] =
39 {
40 { IRQ_NAS100D_PCI_INTA, -1, -1 },
41 { IRQ_NAS100D_PCI_INTB, -1, -1 },
42 { IRQ_NAS100D_PCI_INTC, IRQ_NAS100D_PCI_INTD, IRQ_NAS100D_PCI_INTE },
43 };
44
45 int irq = -1;
46
47 if (slot >= 1 && slot <= NAS100D_PCI_MAX_DEV &&
48 pin >= 1 && pin <= NAS100D_PCI_IRQ_LINES)
49 irq = pci_irq_table[slot-1][pin-1];
50
51 return irq;
52}
53
54struct hw_pci __initdata nas100d_pci = {
55 .nr_controllers = 1,
56 .preinit = nas100d_pci_preinit,
57 .swizzle = pci_std_swizzle,
58 .setup = ixp4xx_setup,
59 .scan = ixp4xx_scan_bus,
60 .map_irq = nas100d_map_irq,
61};
62
63int __init nas100d_pci_init(void)
64{
65 if (machine_is_nas100d())
66 pci_common_init(&nas100d_pci);
67
68 return 0;
69}
70
71subsys_initcall(nas100d_pci_init);
diff --git a/arch/arm/mach-ixp4xx/nas100d-power.c b/arch/arm/mach-ixp4xx/nas100d-power.c
new file mode 100644
index 000000000000..2bec69bfa715
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/nas100d-power.c
@@ -0,0 +1,67 @@
1/*
2 * arch/arm/mach-ixp4xx/nas100d-power.c
3 *
4 * NAS 100d Power/Reset driver
5 *
6 * Copyright (C) 2005 Tower Technologies
7 *
8 * based on nas100d-io.c
9 * Copyright (C) 2004 Karen Spearel
10 *
11 * Author: Alessandro Zummo <a.zummo@towertech.it>
12 * Maintainers: http://www.nslu2-linux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/reboot.h>
22#include <linux/interrupt.h>
23
24#include <asm/mach-types.h>
25
26extern void ctrl_alt_del(void);
27
28static irqreturn_t nas100d_reset_handler(int irq, void *dev_id, struct pt_regs *regs)
29{
30 /* Signal init to do the ctrlaltdel action, this will bypass init if
31 * it hasn't started and do a kernel_restart.
32 */
33 ctrl_alt_del();
34
35 return IRQ_HANDLED;
36}
37
38static int __init nas100d_power_init(void)
39{
40 if (!(machine_is_nas100d()))
41 return 0;
42
43 set_irq_type(NAS100D_RB_IRQ, IRQT_LOW);
44
45 if (request_irq(NAS100D_RB_IRQ, &nas100d_reset_handler,
46 SA_INTERRUPT, "NAS100D reset button", NULL) < 0) {
47
48 printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
49 NAS100D_RB_IRQ);
50
51 return -EIO;
52 }
53
54 return 0;
55}
56
57static void __exit nas100d_power_exit(void)
58{
59 free_irq(NAS100D_RB_IRQ, NULL);
60}
61
62module_init(nas100d_power_init);
63module_exit(nas100d_power_exit);
64
65MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
66MODULE_DESCRIPTION("NAS100D Power/Reset driver");
67MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
new file mode 100644
index 000000000000..49998a8bd4e8
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -0,0 +1,135 @@
1/*
2 * arch/arm/mach-ixp4xx/nas100d-setup.c
3 *
4 * NAS 100d board-setup
5 *
6 * based ixdp425-setup.c:
7 * Copyright (C) 2003-2004 MontaVista Software, Inc.
8 *
9 * Author: Alessandro Zummo <a.zummo@towertech.it>
10 * Author: Rod Whitby <rod@whitby.id.au>
11 * Maintainers: http://www.nslu2-linux.org/
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/serial.h>
17#include <linux/serial_8250.h>
18
19#include <asm/mach-types.h>
20#include <asm/mach/arch.h>
21#include <asm/mach/flash.h>
22
23static struct flash_platform_data nas100d_flash_data = {
24 .map_name = "cfi_probe",
25 .width = 2,
26};
27
28static struct resource nas100d_flash_resource = {
29 .flags = IORESOURCE_MEM,
30};
31
32static struct platform_device nas100d_flash = {
33 .name = "IXP4XX-Flash",
34 .id = 0,
35 .dev.platform_data = &nas100d_flash_data,
36 .num_resources = 1,
37 .resource = &nas100d_flash_resource,
38};
39
40static struct ixp4xx_i2c_pins nas100d_i2c_gpio_pins = {
41 .sda_pin = NAS100D_SDA_PIN,
42 .scl_pin = NAS100D_SCL_PIN,
43};
44
45static struct platform_device nas100d_i2c_controller = {
46 .name = "IXP4XX-I2C",
47 .id = 0,
48 .dev.platform_data = &nas100d_i2c_gpio_pins,
49 .num_resources = 0,
50};
51
52static struct resource nas100d_uart_resources[] = {
53 {
54 .start = IXP4XX_UART1_BASE_PHYS,
55 .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
56 .flags = IORESOURCE_MEM,
57 },
58 {
59 .start = IXP4XX_UART2_BASE_PHYS,
60 .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
61 .flags = IORESOURCE_MEM,
62 }
63};
64
65static struct plat_serial8250_port nas100d_uart_data[] = {
66 {
67 .mapbase = IXP4XX_UART1_BASE_PHYS,
68 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
69 .irq = IRQ_IXP4XX_UART1,
70 .flags = UPF_BOOT_AUTOCONF,
71 .iotype = UPIO_MEM,
72 .regshift = 2,
73 .uartclk = IXP4XX_UART_XTAL,
74 },
75 {
76 .mapbase = IXP4XX_UART2_BASE_PHYS,
77 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
78 .irq = IRQ_IXP4XX_UART2,
79 .flags = UPF_BOOT_AUTOCONF,
80 .iotype = UPIO_MEM,
81 .regshift = 2,
82 .uartclk = IXP4XX_UART_XTAL,
83 },
84 { }
85};
86
87static struct platform_device nas100d_uart = {
88 .name = "serial8250",
89 .id = PLAT8250_DEV_PLATFORM,
90 .dev.platform_data = nas100d_uart_data,
91 .num_resources = 2,
92 .resource = nas100d_uart_resources,
93};
94
95static struct platform_device *nas100d_devices[] __initdata = {
96 &nas100d_i2c_controller,
97 &nas100d_flash,
98 &nas100d_uart,
99};
100
101static void nas100d_power_off(void)
102{
103 /* This causes the box to drop the power and go dead. */
104
105 /* enable the pwr cntl gpio */
106 gpio_line_config(NAS100D_PO_GPIO, IXP4XX_GPIO_OUT);
107
108 /* do the deed */
109 gpio_line_set(NAS100D_PO_GPIO, IXP4XX_GPIO_HIGH);
110}
111
112static void __init nas100d_init(void)
113{
114 ixp4xx_sys_init();
115
116 nas100d_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
117 nas100d_flash_resource.end =
118 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
119
120 pm_power_off = nas100d_power_off;
121
122 platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices));
123}
124
125MACHINE_START(NAS100D, "Iomega NAS 100d")
126 /* Maintainer: www.nslu2-linux.org */
127 .phys_ram = PHYS_OFFSET,
128 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
129 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC,
130 .boot_params = 0x00000100,
131 .map_io = ixp4xx_map_io,
132 .init_irq = ixp4xx_init_irq,
133 .timer = &ixp4xx_timer,
134 .init_machine = nas100d_init,
135MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
index a575f2e0b2c8..ece860444d5b 100644
--- a/arch/arm/mach-ixp4xx/nslu2-pci.c
+++ b/arch/arm/mach-ixp4xx/nslu2-pci.c
@@ -28,14 +28,6 @@ void __init nslu2_pci_preinit(void)
28 set_irq_type(IRQ_NSLU2_PCI_INTB, IRQT_LOW); 28 set_irq_type(IRQ_NSLU2_PCI_INTB, IRQT_LOW);
29 set_irq_type(IRQ_NSLU2_PCI_INTC, IRQT_LOW); 29 set_irq_type(IRQ_NSLU2_PCI_INTC, IRQT_LOW);
30 30
31 gpio_line_isr_clear(NSLU2_PCI_INTA_PIN);
32 gpio_line_isr_clear(NSLU2_PCI_INTB_PIN);
33 gpio_line_isr_clear(NSLU2_PCI_INTC_PIN);
34
35 /* INTD is not configured as GPIO is used
36 * for the power input button.
37 */
38
39 ixp4xx_pci_preinit(); 31 ixp4xx_pci_preinit();
40} 32}
41 33
diff --git a/arch/arm/mach-ixp4xx/nslu2-power.c b/arch/arm/mach-ixp4xx/nslu2-power.c
index 18fbc8c0fb30..b0ad9e901f6e 100644
--- a/arch/arm/mach-ixp4xx/nslu2-power.c
+++ b/arch/arm/mach-ixp4xx/nslu2-power.c
@@ -54,9 +54,6 @@ static int __init nslu2_power_init(void)
54 set_irq_type(NSLU2_RB_IRQ, IRQT_LOW); 54 set_irq_type(NSLU2_RB_IRQ, IRQT_LOW);
55 set_irq_type(NSLU2_PB_IRQ, IRQT_HIGH); 55 set_irq_type(NSLU2_PB_IRQ, IRQT_HIGH);
56 56
57 gpio_line_isr_clear(NSLU2_RB_GPIO);
58 gpio_line_isr_clear(NSLU2_PB_GPIO);
59
60 if (request_irq(NSLU2_RB_IRQ, &nslu2_reset_handler, 57 if (request_irq(NSLU2_RB_IRQ, &nslu2_reset_handler,
61 SA_INTERRUPT, "NSLU2 reset button", NULL) < 0) { 58 SA_INTERRUPT, "NSLU2 reset button", NULL) < 0) {
62 59