diff options
Diffstat (limited to 'arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h')
-rw-r--r-- | arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h | 46 |
1 files changed, 19 insertions, 27 deletions
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h index eb68b61ce975..c5bae9c035d5 100644 --- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h +++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h | |||
@@ -30,51 +30,43 @@ | |||
30 | * | 30 | * |
31 | * 0x50000000 0x10000000 ioremap'd EXP BUS | 31 | * 0x50000000 0x10000000 ioremap'd EXP BUS |
32 | * | 32 | * |
33 | * 0x6000000 0x00004000 ioremap'd QMgr | 33 | * 0xC8000000 0x00013000 0xFEF00000 On-Chip Peripherals |
34 | * | 34 | * |
35 | * 0xC0000000 0x00001000 0xffbff000 PCI CFG | 35 | * 0xC0000000 0x00001000 0xFEF13000 PCI CFG |
36 | * | 36 | * |
37 | * 0xC4000000 0x00001000 0xffbfe000 EXP CFG | 37 | * 0xC4000000 0x00001000 0xFEF14000 EXP CFG |
38 | * | 38 | * |
39 | * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals | 39 | * 0x60000000 0x00004000 0xFEF15000 QMgr |
40 | */ | 40 | */ |
41 | 41 | ||
42 | /* | 42 | /* |
43 | * Queue Manager | 43 | * Queue Manager |
44 | */ | 44 | */ |
45 | #define IXP4XX_QMGR_BASE_PHYS (0x60000000) | 45 | #define IXP4XX_QMGR_BASE_PHYS 0x60000000 |
46 | #define IXP4XX_QMGR_REGION_SIZE (0x00004000) | 46 | #define IXP4XX_QMGR_BASE_VIRT IOMEM(0xFEF15000) |
47 | #define IXP4XX_QMGR_REGION_SIZE 0x00004000 | ||
47 | 48 | ||
48 | /* | 49 | /* |
49 | * Expansion BUS Configuration registers | 50 | * Peripheral space, including debug UART. Must be section-aligned so that |
51 | * it can be used with the low-level debug code. | ||
50 | */ | 52 | */ |
51 | #define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) | 53 | #define IXP4XX_PERIPHERAL_BASE_PHYS 0xC8000000 |
52 | #define IXP4XX_EXP_CFG_BASE_VIRT IOMEM(0xFFBFE000) | 54 | #define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFEF00000) |
53 | #define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) | 55 | #define IXP4XX_PERIPHERAL_REGION_SIZE 0x00013000 |
54 | 56 | ||
55 | /* | 57 | /* |
56 | * PCI Config registers | 58 | * PCI Config registers |
57 | */ | 59 | */ |
58 | #define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) | 60 | #define IXP4XX_PCI_CFG_BASE_PHYS 0xC0000000 |
59 | #define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFFBFF000) | 61 | #define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFEF13000) |
60 | #define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) | 62 | #define IXP4XX_PCI_CFG_REGION_SIZE 0x00001000 |
61 | |||
62 | /* | ||
63 | * Peripheral space | ||
64 | */ | ||
65 | #define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000) | ||
66 | #define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFFBEB000) | ||
67 | #define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000) | ||
68 | 63 | ||
69 | /* | 64 | /* |
70 | * Debug UART | 65 | * Expansion BUS Configuration registers |
71 | * | ||
72 | * This is basically a remap of UART1 into a region that is section | ||
73 | * aligned so that it * can be used with the low-level debug code. | ||
74 | */ | 66 | */ |
75 | #define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000) | 67 | #define IXP4XX_EXP_CFG_BASE_PHYS 0xC4000000 |
76 | #define IXP4XX_DEBUG_UART_BASE_VIRT IOMEM(0xffb00000) | 68 | #define IXP4XX_EXP_CFG_BASE_VIRT 0xFEF14000 |
77 | #define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000) | 69 | #define IXP4XX_EXP_CFG_REGION_SIZE 0x00001000 |
78 | 70 | ||
79 | #define IXP4XX_EXP_CS0_OFFSET 0x00 | 71 | #define IXP4XX_EXP_CS0_OFFSET 0x00 |
80 | #define IXP4XX_EXP_CS1_OFFSET 0x04 | 72 | #define IXP4XX_EXP_CS1_OFFSET 0x04 |