diff options
Diffstat (limited to 'arch/arm/mach-ixp2000/ixdp2x01.c')
-rw-r--r-- | arch/arm/mach-ixp2000/ixdp2x01.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c index b21249908ae4..e6a882f35da2 100644 --- a/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/arch/arm/mach-ixp2000/ixdp2x01.c | |||
@@ -51,7 +51,7 @@ | |||
51 | *************************************************************************/ | 51 | *************************************************************************/ |
52 | static void ixdp2x01_irq_mask(unsigned int irq) | 52 | static void ixdp2x01_irq_mask(unsigned int irq) |
53 | { | 53 | { |
54 | ixp2000_reg_write(IXDP2X01_INT_MASK_SET_REG, | 54 | ixp2000_reg_wrb(IXDP2X01_INT_MASK_SET_REG, |
55 | IXP2000_BOARD_IRQ_MASK(irq)); | 55 | IXP2000_BOARD_IRQ_MASK(irq)); |
56 | } | 56 | } |
57 | 57 | ||
@@ -114,7 +114,7 @@ void __init ixdp2x01_init_irq(void) | |||
114 | 114 | ||
115 | /* Mask all interrupts from CPLD, disable simulation */ | 115 | /* Mask all interrupts from CPLD, disable simulation */ |
116 | ixp2000_reg_write(IXDP2X01_INT_MASK_SET_REG, 0xffffffff); | 116 | ixp2000_reg_write(IXDP2X01_INT_MASK_SET_REG, 0xffffffff); |
117 | ixp2000_reg_write(IXDP2X01_INT_SIM_REG, 0); | 117 | ixp2000_reg_wrb(IXDP2X01_INT_SIM_REG, 0); |
118 | 118 | ||
119 | for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) { | 119 | for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) { |
120 | if (irq & valid_irq_mask) { | 120 | if (irq & valid_irq_mask) { |
@@ -299,7 +299,6 @@ struct hw_pci ixdp2x01_pci __initdata = { | |||
299 | 299 | ||
300 | int __init ixdp2x01_pci_init(void) | 300 | int __init ixdp2x01_pci_init(void) |
301 | { | 301 | { |
302 | |||
303 | pci_common_init(&ixdp2x01_pci); | 302 | pci_common_init(&ixdp2x01_pci); |
304 | return 0; | 303 | return 0; |
305 | } | 304 | } |
@@ -316,7 +315,7 @@ static struct flash_platform_data ixdp2x01_flash_platform_data = { | |||
316 | 315 | ||
317 | static unsigned long ixdp2x01_flash_bank_setup(unsigned long ofs) | 316 | static unsigned long ixdp2x01_flash_bank_setup(unsigned long ofs) |
318 | { | 317 | { |
319 | ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG, | 318 | ixp2000_reg_wrb(IXDP2X01_CPLD_FLASH_REG, |
320 | ((ofs >> IXDP2X01_FLASH_WINDOW_BITS) | IXDP2X01_CPLD_FLASH_INTERN)); | 319 | ((ofs >> IXDP2X01_FLASH_WINDOW_BITS) | IXDP2X01_CPLD_FLASH_INTERN)); |
321 | return (ofs & IXDP2X01_FLASH_WINDOW_MASK); | 320 | return (ofs & IXDP2X01_FLASH_WINDOW_MASK); |
322 | } | 321 | } |
@@ -363,7 +362,7 @@ static struct platform_device *ixdp2x01_devices[] __initdata = { | |||
363 | 362 | ||
364 | static void __init ixdp2x01_init_machine(void) | 363 | static void __init ixdp2x01_init_machine(void) |
365 | { | 364 | { |
366 | ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG, | 365 | ixp2000_reg_wrb(IXDP2X01_CPLD_FLASH_REG, |
367 | (IXDP2X01_CPLD_FLASH_BANK_MASK | IXDP2X01_CPLD_FLASH_INTERN)); | 366 | (IXDP2X01_CPLD_FLASH_BANK_MASK | IXDP2X01_CPLD_FLASH_INTERN)); |
368 | 367 | ||
369 | ixdp2x01_flash_data.nr_banks = | 368 | ixdp2x01_flash_data.nr_banks = |