diff options
Diffstat (limited to 'arch/arm/mach-ixp2000/include/mach/io.h')
| -rw-r--r-- | arch/arm/mach-ixp2000/include/mach/io.h | 133 |
1 files changed, 0 insertions, 133 deletions
diff --git a/arch/arm/mach-ixp2000/include/mach/io.h b/arch/arm/mach-ixp2000/include/mach/io.h deleted file mode 100644 index f6552d6f35ab..000000000000 --- a/arch/arm/mach-ixp2000/include/mach/io.h +++ /dev/null | |||
| @@ -1,133 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-ixp2000/include/mach/io.h | ||
| 3 | * | ||
| 4 | * Original Author: Naeem M Afzal <naeem.m.afzal@intel.com> | ||
| 5 | * Maintainer: Deepak Saxena <dsaxena@plexity.net> | ||
| 6 | * | ||
| 7 | * Copyright (C) 2002 Intel Corp. | ||
| 8 | * Copyrgiht (C) 2003-2004 MontaVista Software, Inc. | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __ASM_ARM_ARCH_IO_H | ||
| 16 | #define __ASM_ARM_ARCH_IO_H | ||
| 17 | |||
| 18 | #include <mach/hardware.h> | ||
| 19 | |||
| 20 | #define IO_SPACE_LIMIT 0xffffffff | ||
| 21 | |||
| 22 | /* | ||
| 23 | * The A? revisions of the IXP2000s assert byte lanes for PCI I/O | ||
| 24 | * transactions the other way round (MEM transactions don't have this | ||
| 25 | * issue), so if we want to support those models, we need to override | ||
| 26 | * the standard I/O functions. | ||
| 27 | * | ||
| 28 | * B0 and later have a bit that can be set to 1 to get the proper | ||
| 29 | * behavior for I/O transactions, which then allows us to use the | ||
| 30 | * standard I/O functions. This is what we do if the user does not | ||
| 31 | * explicitly ask for support for pre-B0. | ||
| 32 | */ | ||
| 33 | #ifdef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO | ||
| 34 | #define ___io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE)) | ||
| 35 | |||
| 36 | #define alignb(addr) (void __iomem *)((unsigned long)(addr) ^ 3) | ||
| 37 | #define alignw(addr) (void __iomem *)((unsigned long)(addr) ^ 2) | ||
| 38 | |||
| 39 | #define outb(v,p) __raw_writeb((v),alignb(___io(p))) | ||
| 40 | #define outw(v,p) __raw_writew((v),alignw(___io(p))) | ||
| 41 | #define outl(v,p) __raw_writel((v),___io(p)) | ||
| 42 | |||
| 43 | #define inb(p) ({ unsigned int __v = __raw_readb(alignb(___io(p))); __v; }) | ||
| 44 | #define inw(p) \ | ||
| 45 | ({ unsigned int __v = (__raw_readw(alignw(___io(p)))); __v; }) | ||
| 46 | #define inl(p) \ | ||
| 47 | ({ unsigned int __v = (__raw_readl(___io(p))); __v; }) | ||
| 48 | |||
| 49 | #define outsb(p,d,l) __raw_writesb(alignb(___io(p)),d,l) | ||
| 50 | #define outsw(p,d,l) __raw_writesw(alignw(___io(p)),d,l) | ||
| 51 | #define outsl(p,d,l) __raw_writesl(___io(p),d,l) | ||
| 52 | |||
| 53 | #define insb(p,d,l) __raw_readsb(alignb(___io(p)),d,l) | ||
| 54 | #define insw(p,d,l) __raw_readsw(alignw(___io(p)),d,l) | ||
| 55 | #define insl(p,d,l) __raw_readsl(___io(p),d,l) | ||
| 56 | |||
| 57 | #define __is_io_address(p) ((((unsigned long)(p)) & ~(IXP2000_PCI_IO_SIZE - 1)) == IXP2000_PCI_IO_VIRT_BASE) | ||
| 58 | |||
| 59 | #define ioread8(p) \ | ||
| 60 | ({ \ | ||
| 61 | unsigned int __v; \ | ||
| 62 | \ | ||
| 63 | if (__is_io_address(p)) { \ | ||
| 64 | __v = __raw_readb(alignb(p)); \ | ||
| 65 | } else { \ | ||
| 66 | __v = __raw_readb(p); \ | ||
| 67 | } \ | ||
| 68 | \ | ||
| 69 | __v; \ | ||
| 70 | }) \ | ||
| 71 | |||
| 72 | #define ioread16(p) \ | ||
| 73 | ({ \ | ||
| 74 | unsigned int __v; \ | ||
| 75 | \ | ||
| 76 | if (__is_io_address(p)) { \ | ||
| 77 | __v = __raw_readw(alignw(p)); \ | ||
| 78 | } else { \ | ||
| 79 | __v = le16_to_cpu(__raw_readw(p)); \ | ||
| 80 | } \ | ||
| 81 | \ | ||
| 82 | __v; \ | ||
| 83 | }) | ||
| 84 | |||
| 85 | #define ioread32(p) \ | ||
| 86 | ({ \ | ||
| 87 | unsigned int __v; \ | ||
| 88 | \ | ||
| 89 | if (__is_io_address(p)) { \ | ||
| 90 | __v = __raw_readl(p); \ | ||
| 91 | } else { \ | ||
| 92 | __v = le32_to_cpu(__raw_readl(p)); \ | ||
| 93 | } \ | ||
| 94 | \ | ||
| 95 | __v; \ | ||
| 96 | }) | ||
| 97 | |||
| 98 | #define iowrite8(v,p) \ | ||
| 99 | ({ \ | ||
| 100 | if (__is_io_address(p)) { \ | ||
| 101 | __raw_writeb((v), alignb(p)); \ | ||
| 102 | } else { \ | ||
| 103 | __raw_writeb((v), p); \ | ||
| 104 | } \ | ||
| 105 | }) | ||
| 106 | |||
| 107 | #define iowrite16(v,p) \ | ||
| 108 | ({ \ | ||
| 109 | if (__is_io_address(p)) { \ | ||
| 110 | __raw_writew((v), alignw(p)); \ | ||
| 111 | } else { \ | ||
| 112 | __raw_writew(cpu_to_le16(v), p); \ | ||
| 113 | } \ | ||
| 114 | }) | ||
| 115 | |||
| 116 | #define iowrite32(v,p) \ | ||
| 117 | ({ \ | ||
| 118 | if (__is_io_address(p)) { \ | ||
| 119 | __raw_writel((v), p); \ | ||
| 120 | } else { \ | ||
| 121 | __raw_writel(cpu_to_le32(v), p); \ | ||
| 122 | } \ | ||
| 123 | }) | ||
| 124 | |||
| 125 | #define ioport_map(port, nr) ___io(port) | ||
| 126 | |||
| 127 | #define ioport_unmap(addr) | ||
| 128 | #else | ||
| 129 | #define __io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE)) | ||
| 130 | #endif | ||
| 131 | |||
| 132 | |||
| 133 | #endif | ||