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-rw-r--r--arch/arm/mach-iop33x/iq80331.c2
-rw-r--r--arch/arm/mach-iop33x/iq80332.c2
-rw-r--r--arch/arm/mach-iop33x/irq.c12
3 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index 376c932830be..2b063180687a 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -55,7 +55,7 @@ static struct sys_timer iq80331_timer = {
55/* 55/*
56 * IQ80331 PCI. 56 * IQ80331 PCI.
57 */ 57 */
58static inline int __init 58static int __init
59iq80331_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 59iq80331_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
60{ 60{
61 int irq; 61 int irq;
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index 58c81496c6f6..7889ce3cb08e 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -55,7 +55,7 @@ static struct sys_timer iq80332_timer = {
55/* 55/*
56 * IQ80332 PCI. 56 * IQ80332 PCI.
57 */ 57 */
58static inline int __init 58static int __init
59iq80332_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 59iq80332_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
60{ 60{
61 int irq; 61 int irq;
diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c
index c65ea78a2427..f09dd054b9c0 100644
--- a/arch/arm/mach-iop33x/irq.c
+++ b/arch/arm/mach-iop33x/irq.c
@@ -22,32 +22,32 @@
22static u32 iop33x_mask0; 22static u32 iop33x_mask0;
23static u32 iop33x_mask1; 23static u32 iop33x_mask1;
24 24
25static inline void intctl0_write(u32 val) 25static void intctl0_write(u32 val)
26{ 26{
27 asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); 27 asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
28} 28}
29 29
30static inline void intctl1_write(u32 val) 30static void intctl1_write(u32 val)
31{ 31{
32 asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val)); 32 asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val));
33} 33}
34 34
35static inline void intstr0_write(u32 val) 35static void intstr0_write(u32 val)
36{ 36{
37 asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val)); 37 asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val));
38} 38}
39 39
40static inline void intstr1_write(u32 val) 40static void intstr1_write(u32 val)
41{ 41{
42 asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val)); 42 asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val));
43} 43}
44 44
45static inline void intbase_write(u32 val) 45static void intbase_write(u32 val)
46{ 46{
47 asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val)); 47 asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val));
48} 48}
49 49
50static inline void intsize_write(u32 val) 50static void intsize_write(u32 val)
51{ 51{
52 asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val)); 52 asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val));
53} 53}