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-rw-r--r--arch/arm/mach-iop32x/Makefile2
-rw-r--r--arch/arm/mach-iop32x/setup.c15
-rw-r--r--arch/arm/mach-iop32x/time.c108
3 files changed, 12 insertions, 113 deletions
diff --git a/arch/arm/mach-iop32x/Makefile b/arch/arm/mach-iop32x/Makefile
index 7266224ab6d7..ef561db20c9b 100644
--- a/arch/arm/mach-iop32x/Makefile
+++ b/arch/arm/mach-iop32x/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-y := common.o setup.o irq.o time.o 5obj-y := common.o setup.o irq.o
6obj-m := 6obj-m :=
7obj-n := 7obj-n :=
8obj- := 8obj- :=
diff --git a/arch/arm/mach-iop32x/setup.c b/arch/arm/mach-iop32x/setup.c
index 1a03b0b41baa..68de247a4cca 100644
--- a/arch/arm/mach-iop32x/setup.c
+++ b/arch/arm/mach-iop32x/setup.c
@@ -29,6 +29,7 @@
29#include <asm/hardware.h> 29#include <asm/hardware.h>
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32#include <asm/mach/time.h>
32#include <asm/hardware/iop3xx.h> 33#include <asm/hardware/iop3xx.h>
33 34
34#define IOP321_UART_XTAL 1843200 35#define IOP321_UART_XTAL 1843200
@@ -67,16 +68,22 @@ void __init iop32x_init(void)
67 68
68#ifdef CONFIG_ARCH_IQ80321 69#ifdef CONFIG_ARCH_IQ80321
69extern void iq80321_map_io(void); 70extern void iq80321_map_io(void);
70extern struct sys_timer iop321_timer;
71extern void iop321_init_time(void);
72#endif 71#endif
73 72
74#ifdef CONFIG_ARCH_IQ31244 73#ifdef CONFIG_ARCH_IQ31244
75extern void iq31244_map_io(void); 74extern void iq31244_map_io(void);
76extern struct sys_timer iop321_timer;
77extern void iop321_init_time(void);
78#endif 75#endif
79 76
77static void __init iop3xx_timer_init(void)
78{
79 iop3xx_init_time(IOP321_TICK_RATE);
80}
81
82struct sys_timer iop321_timer = {
83 .init = iop3xx_timer_init,
84 .offset = iop3xx_gettimeoffset,
85};
86
80#if defined(CONFIG_ARCH_IQ80321) 87#if defined(CONFIG_ARCH_IQ80321)
81MACHINE_START(IQ80321, "Intel IQ80321") 88MACHINE_START(IQ80321, "Intel IQ80321")
82 /* Maintainer: Intel Corporation */ 89 /* Maintainer: Intel Corporation */
diff --git a/arch/arm/mach-iop32x/time.c b/arch/arm/mach-iop32x/time.c
deleted file mode 100644
index 3cabbbca0a02..000000000000
--- a/arch/arm/mach-iop32x/time.c
+++ /dev/null
@@ -1,108 +0,0 @@
1/*
2 * arch/arm/mach-iop32x/time.c
3 *
4 * Timer code for IOP321 based systems
5 *
6 * Author: Deepak Saxena <dsaxena@mvista.com>
7 *
8 * Copyright 2002-2003 MontaVista Software Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/kernel.h>
17#include <linux/interrupt.h>
18#include <linux/time.h>
19#include <linux/init.h>
20#include <linux/timex.h>
21
22#include <asm/hardware.h>
23#include <asm/io.h>
24#include <asm/irq.h>
25#include <asm/uaccess.h>
26#include <asm/mach/irq.h>
27#include <asm/mach/time.h>
28
29#define IOP321_TIME_SYNC 0
30
31static inline unsigned long get_elapsed(void)
32{
33 return LATCH - *IOP321_TU_TCR0;
34}
35
36static unsigned long iop321_gettimeoffset(void)
37{
38 unsigned long elapsed, usec;
39 u32 tisr1, tisr2;
40
41 /*
42 * If an interrupt was pending before we read the timer,
43 * we've already wrapped. Factor this into the time.
44 * If an interrupt was pending after we read the timer,
45 * it may have wrapped between checking the interrupt
46 * status and reading the timer. Re-read the timer to
47 * be sure its value is after the wrap.
48 */
49
50 asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr1));
51 elapsed = get_elapsed();
52 asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr2));
53
54 if(tisr1 & 1)
55 elapsed += LATCH;
56 else if (tisr2 & 1)
57 elapsed = LATCH + get_elapsed();
58
59 /*
60 * Now convert them to usec.
61 */
62 usec = (unsigned long)(elapsed / (CLOCK_TICK_RATE/1000000));
63
64 return usec;
65}
66
67static irqreturn_t
68iop321_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
69{
70 u32 tisr;
71
72 write_seqlock(&xtime_lock);
73
74 asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr));
75 tisr |= 1;
76 asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (tisr));
77
78 timer_tick(regs);
79
80 write_sequnlock(&xtime_lock);
81
82 return IRQ_HANDLED;
83}
84
85static struct irqaction iop321_timer_irq = {
86 .name = "IOP321 Timer Tick",
87 .handler = iop321_timer_interrupt,
88 .flags = IRQF_DISABLED | IRQF_TIMER,
89};
90
91static void __init iop321_timer_init(void)
92{
93 u32 timer_ctl;
94
95 setup_irq(IRQ_IOP321_TIMER0, &iop321_timer_irq);
96
97 timer_ctl = IOP321_TMR_EN | IOP321_TMR_PRIVILEGED | IOP321_TMR_RELOAD |
98 IOP321_TMR_RATIO_1_1;
99
100 asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (LATCH));
101
102 asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
103}
104
105struct sys_timer iop321_timer = {
106 .init = &iop321_timer_init,
107 .offset = iop321_gettimeoffset,
108};