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-rw-r--r--arch/arm/mach-iop32x/irq.c76
1 files changed, 76 insertions, 0 deletions
diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c
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index 000000000000..69d6302f40cf
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+++ b/arch/arm/mach-iop32x/irq.c
@@ -0,0 +1,76 @@
1/*
2 * arch/arm/mach-iop32x/irq.c
3 *
4 * Generic IOP32X IRQ handling functionality
5 *
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <asm/mach/irq.h>
18#include <asm/irq.h>
19#include <asm/hardware.h>
20#include <asm/mach-types.h>
21
22static u32 iop32x_mask;
23
24static inline void intctl_write(u32 val)
25{
26 iop3xx_cp6_enable();
27 asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
28 iop3xx_cp6_disable();
29}
30
31static inline void intstr_write(u32 val)
32{
33 iop3xx_cp6_enable();
34 asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val));
35 iop3xx_cp6_disable();
36}
37
38static void
39iop32x_irq_mask(unsigned int irq)
40{
41 iop32x_mask &= ~(1 << irq);
42 intctl_write(iop32x_mask);
43}
44
45static void
46iop32x_irq_unmask(unsigned int irq)
47{
48 iop32x_mask |= 1 << irq;
49 intctl_write(iop32x_mask);
50}
51
52struct irq_chip ext_chip = {
53 .name = "IOP32x",
54 .ack = iop32x_irq_mask,
55 .mask = iop32x_irq_mask,
56 .unmask = iop32x_irq_unmask,
57};
58
59void __init iop32x_init_irq(void)
60{
61 int i;
62
63 intctl_write(0);
64 intstr_write(0);
65 if (machine_is_glantank() ||
66 machine_is_iq80321() ||
67 machine_is_iq31244() ||
68 machine_is_n2100())
69 *IOP3XX_PCIIRSR = 0x0f;
70
71 for (i = 0; i < NR_IRQS; i++) {
72 set_irq_chip(i, &ext_chip);
73 set_irq_handler(i, do_level_IRQ);
74 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
75 }
76}